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Author SHA1 Message Date
David Hunter
47a4e1969b Appease iverilog 13.0 2026-03-27 21:48:19 -07:00
David Hunter
4e33b7bbac HuC6272 CPU KRAM read/write 2026-03-25 22:05:51 -07:00
David Hunter
94465f6f12 HuC6272 refactor 
Move CPU and SCSI into their own modules
 2026-03-21 21:20:43 -07:00
David Hunter
9840ace59a HuC6272 BG video 
Use microprogram to drive fetch
 2026-03-15 21:53:42 -07:00
David Hunter
0ea919738d HuC6272 BG video 
Add BG register file
 2026-03-15 21:53:37 -07:00
David Hunter
64466cff52 HuC6272 BG video (WIP) 2026-03-08 16:47:49 -07:00
David Hunter
10b6e30e3e Release 20260214 
You love to see it.
 2026-02-14 16:16:38 -08:00
David Hunter
37e72c7adf Color space conversion 2026-02-14 15:47:33 -08:00
David Hunter
3f37207dbb Pick up V810 update: Appease Quartus 
New OSD feature (load FX-BMP ROM) is verified working.
 2026-02-11 22:21:09 -08:00
David Hunter
3e111955b5 Support building in Quartus 25 (for the fun of it) 
You can still build this project in Quartus 17.
 2026-02-11 22:20:01 -08:00
David Hunter
c3c9430da9 New OSD feature: load FX-BMP ROM 
This is a shortcut for mounting an .FXB as FX-BMP backup RAM and then
loading it. Additionally, the "Save backup RAM" option cannot save
over it.
 2026-02-07 16:57:45 -08:00
David Hunter
b026355e16 Pick up V810 update: MOVBSU (WIP) 2026-02-04 23:11:27 -08:00
David Hunter
1de764e03e memif_sdram: Clear pending request on reset 
This was causing the first instruction fetch out of reset to be
skipped, causing the CPU to eventually leap into space and the ERROR
LED[7] to light up.
 2026-01-25 23:11:28 -08:00
David Hunter
1e926652be Disable SDRAM clkref for now 
This feature resets the state counter Q with no regard for activity on
the ls_* pins.  This will need to be reworked.
 2026-01-25 18:05:57 -08:00
David Hunter
bd908cda3c Fix backup mem. load on real SDRAM 
SDRAM burst reads/writes wrap column adds at the burst length.  And
pcfx_top was illegally doing a 32-bit write at an odd 16-bit boundary.
Thus every other 16-bit word was being written to zero.  This fixes
both the SDRAM burst simulation and the odd address read/write.
 2026-01-25 18:01:57 -08:00
David Hunter
fe0ccdcf5e Verify SRAM/BMP load 2026-01-25 16:34:54 -08:00
David Hunter
6f6d075d8a Refine FX-BMP implementation 
- Add battery status readout
- Narrow address range to E800_0000 .. EBFF_FFFF
- Enable BMP only if it's mounted
- Configure BMP size according to mounted image size
 2026-01-24 18:44:06 -08:00
David Hunter
554b19a237 Correct img_mounted and status_menumask usage 2026-01-22 22:41:41 -08:00
David Hunter
093579c1b6 Enable saving both backup SRAMs to SD 2026-01-19 15:42:14 -08:00
David Hunter
7bc6250385 Implement BMP (external SRAM), and hook it up to SD loader 2026-01-19 13:51:21 -08:00
David Hunter
8fc354d5d7 Hook internal backup SRAM up to the SD block device interface 2026-01-19 01:54:33 -08:00
David Hunter
01018f429a Pick up V810 update: DIVU (unsigned) and DIV (signed) 2026-01-17 22:46:12 -08:00
David Hunter
cd529be82d Use USER LED to indicate fatal error 
Error is currently defined as:
- Invalid Instruction Exception (read 0xFFFF_FF90)
- Duplexed Exception (read 0xFFFF_FFD0)
 2026-01-16 23:13:50 -08:00
David Hunter
91c356c4ed Get internal SRAM working (really) 
Need to assert SZRQn to enable reads at A[1]=1

Now the BIOS decides the memory is writable, and checksums the first
128 bytes (twice).

And then it hits a DIV instruction and throws an exception.
 2026-01-16 23:11:06 -08:00
David Hunter
e7d8876e76 huc6261: Implement 320 dots (7MHz dot clock) mode 2026-01-16 20:53:36 -08:00
David Hunter
48bf9f80cd Get internal SRAM working 2026-01-15 23:32:21 -08:00
David Hunter
fa0e45c92a Add 4 I/O wait states; fix HuC6270 BUSY_N and CPU_CE use 
HuC6270 signals are now more closely aligned with how huc6280.vhd uses
them.

This fixes a freeze on entering the backup memory screen.
 2026-01-14 00:45:40 -08:00
David Hunter
01cae25670 Merge branch 'dev2' into dev 2026-01-10 22:30:49 -08:00
David Hunter
6053cbe0f0 Fix always statement syntax 2026-01-10 20:46:40 -08:00
David Hunter
575769715e Pick up V810 update with cache invalidate fix 
v810_icache: Invalidate old subblocks on tag update
 2026-01-10 20:46:27 -08:00
David Hunter
b9c1ec33ad Add internal SRAM (WIP) 2026-01-10 19:12:17 -08:00
David Hunter
38c80851f4 Merge remote-tracking branch 'test/dev' into dev 2026-01-10 17:16:58 -08:00
David Hunter
efeac7cf46 Timing is (once again) closed 2026-01-10 17:08:08 -08:00
David Hunter
7c688af179 v810_tag/dataram: Drop the manual Megafunction instantiations 2026-01-10 17:08:08 -08:00
David Hunter
6d915b6a91 Pick up v810 update 2026-01-10 17:08:08 -08:00
David Hunter
544b4df63b Trying to close timing, step 1 
Currently Test_V810 is failing setup for -3 end point TNS.  Top 10
failing paths are sdram|dout[] to v810_exec|imi_a_new.  I don't think
that's where the real problem lies...
 2026-01-10 17:08:08 -08:00
David Hunter
c9d050b1b2 Pick up v810 update to add instruction cache 2026-01-10 17:08:08 -08:00
David Hunter
59a350e6ed Timing is (once again) closed 2026-01-10 16:44:52 -08:00
David Hunter
38445cea56 v810_tag/dataram: Drop the manual Megafunction instantiations 2026-01-10 12:59:14 -08:00
David Hunter
f48e95ebdf Pick up v810 update 2026-01-08 00:38:59 -08:00
David Hunter
497f0026b8 Trying to close timing, step 1 
Currently Test_V810 is failing setup for -3 end point TNS.  Top 10
failing paths are sdram|dout[] to v810_exec|imi_a_new.  I don't think
that's where the real problem lies...
 2026-01-08 00:31:58 -08:00
David Hunter
856293c688 Pick up v810 update to add instruction cache 2026-01-06 22:44:48 -08:00
David Hunter
9a4418bfb1 Roll back core to be just a CPU test again 2026-01-06 22:44:47 -08:00
David Hunter
43e24c628b Fix disc error message on start screen 
Three bugs:
- Sense data was missing additional sense length and code
- HuC6272 must not drive SCSI data out when IO line is asserted (bus contention)
- SCSI data into HuC6272 was delayed one clock, causing a full byte shift
 2026-01-03 23:18:57 -08:00
David Hunter
b4ff06e2bb Release 20260102 
The very first release of the core.

The BIOS boots, displays the startup menu, and responds to joystick input.
 2026-01-02 23:29:06 -08:00
David Hunter
db75b26824 Might as well start calling this the real core 
Test_V810 -> PCFX
mycore -> pcfx_top
 2026-01-02 22:44:45 -08:00
David Hunter
de32e9bb4e Add virtual K-Port joypads 2026-01-02 21:40:29 -08:00
David Hunter
ee24ce9cc1 FXGA: Implement K-Port controller 2026-01-02 19:00:57 -08:00
David Hunter
d016d7eeaa huc6261: Appease Iverilog 2026-01-01 20:21:52 -08:00
David Hunter
ffc527951b huc6261: Match huc6260.vhd pixel clock timings 2026-01-01 11:39:37 -08:00