This release completes my deep dive into reverse-engineering the Epoch
TV-1 video chip.
All known display issues are now resolved.
A new OSD menu option is added to mask the edges of the overscan
region -- the portions that would normally be hidden behind the
television bezel. Most scrolling games benefit from setting this
option to "large", which is now the default.
epochtv1:
- Make overscan mask user-configurable
- Fix spr_nc might stay high after sofp_row_end
- More accurate VRAM address bus computation
- CPU ownership of VRAM bus is tied to RDB/WRB
- Re-observe WAITB and implement address-based state machine
- Remove SOFP 2-color flush state
- Hide overscan
- Fix OAM copy timing and CPU access during
- Fix interaction of sprite split attribute and 2-color mode
- Fix 2-color sprite color transform
- Fix sprite width and 2-color handling
- Implement R0.3 = disable OAM copy
- Add control register shadow copy
- Fix shadow terminology
- Registers are write-only
- Tidy row parameters
- More accurate BGM / OAM / VRAM access
- Use start_line as current row counter
- Cap sprite eval+render at 251 VRAM bus cycles
upd7800:
- upd7800: BLOCK cycles should be idle (M2), read (M3), write (M4)
- upd7800: RDB should assert in T1 on CP1 rising
- Fix WAITB timing to be 1 cycle on writes
- Fix effect of RDB posedge on WAITB
- Cycle timing now verified to match HW for block instruction VRAM copies
Split (half-width) takes priority over 2-color mode: only 8 pixels are
fetched and rendered per row. But the other effects of 2-color mode
-- eg, disabling double-height linked sprites -- still apply.
HW testing reveals that:
1. Only the link X/Y bits determine how the second sprite color is
derived from the main sprite color
2. The color LSB is not affected
3. Setting only one of link X or Y rotates the 3 MSB of color
4. Setting both link bits inverts the (3 MSB of) color
- Don't copy BGM to a shadow copy
- CPU access to BGM and rendering can occur concurrently
- VRAM bus cycle rate is 1/2 pixel clock rate
- CPU access to VRAM zeroes concurrent sprite data read
- WAITB asserts on CSB, de-asserts on VRAM cycle
This mirrors how actual silicon behaves. Weird edge cases that, for
example, seemingly cause the sprite to wrap around the top of the
screen, are faithfully reproduced.
- Re-codify sofp FSM to produce _next, simplifying old and new state actions
- Extend VRAM fetch to the full 2px cycle length
- VRAM fetch must start one cycle before drawing
- Register sprite VRAM address on fetches
upd7800: A few fixes, found by running cputest on HW, which should
have no effect whatsoever on any game.
epochtv1: Based on testing actual HW:
- Widen output to 204x230
- Fix background and sprite alignment
- Add OSD option to select RGB vs. RF color palette
