mirror of
https://github.com/MiSTer-devel/PCXT_MiSTer.git
synced 2026-05-17 03:04:20 +00:00
Change mouse port to COM1
For the time being, the COM2 port is deleted.
This commit is contained in:
@@ -99,14 +99,13 @@ module CHIPSET (
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output logic tandy_16_gfx,
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// UART
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input logic clk_uart,
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input logic clk_uart2,
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input logic uart_rx,
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output logic uart_tx,
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input logic uart_cts_n,
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input logic uart_dcd_n,
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input logic uart_dsr_n,
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output logic uart_rts_n,
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output logic uart_dtr_n,
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input logic uart2_rx,
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output logic uart2_tx,
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input logic uart2_cts_n,
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input logic uart2_dcd_n,
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input logic uart2_dsr_n,
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output logic uart2_rts_n,
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output logic uart2_dtr_n,
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// SDRAM
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input logic enable_sdram,
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output logic initilized_sdram,
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@@ -258,7 +257,6 @@ module CHIPSET (
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.clk_sys (clk_sys),
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.cpu_clock (cpu_clock),
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.clk_uart (clk_uart),
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.clk_uart2 (clk_uart2),
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.peripheral_clock (peripheral_clock),
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.turbo_mode (turbo_mode),
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.reset (reset),
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@@ -323,13 +321,13 @@ module CHIPSET (
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.tandy_snd_e (tandy_snd_e),
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.tandy_snd_rdy (tandy_snd_rdy),
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.tandy_16_gfx (tandy_16_gfx),
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.uart_rx (uart_rx),
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.uart_tx (uart_tx),
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.uart_cts_n (uart_cts_n),
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.uart_dcd_n (uart_dcd_n),
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.uart_dsr_n (uart_dsr_n),
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.uart_rts_n (uart_rts_n),
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.uart_dtr_n (uart_dtr_n),
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.uart2_rx (uart2_rx),
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.uart2_tx (uart2_tx),
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.uart2_cts_n (uart2_cts_n),
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.uart2_dcd_n (uart2_dcd_n),
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.uart2_dsr_n (uart2_dsr_n),
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.uart2_rts_n (uart2_rts_n),
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.uart2_dtr_n (uart2_dtr_n),
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.ems_enabled (ems_enabled),
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.ems_address (ems_address),
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.map_ems (map_ems),
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@@ -82,14 +82,13 @@ module PERIPHERALS #(
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output logic tandy_16_gfx,
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// UART
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input logic clk_uart,
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input logic clk_uart2,
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input logic uart_rx,
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output logic uart_tx,
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input logic uart_cts_n,
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input logic uart_dcd_n,
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input logic uart_dsr_n,
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output logic uart_rts_n,
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output logic uart_dtr_n,
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input logic uart2_rx,
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output logic uart2_tx,
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input logic uart2_cts_n,
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input logic uart2_dcd_n,
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input logic uart2_dsr_n,
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output logic uart2_rts_n,
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output logic uart2_dtr_n,
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// EMS
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input logic ems_enabled,
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input logic [1:0] ems_address,
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@@ -194,7 +193,7 @@ module PERIPHERALS #(
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wire cga_chip_select_n = ~(~iorq && ~address_enable_n && enable_cga & (address[19:15] == 5'b10111)); // B8000 - BFFFF (16 KB / 32 KB)
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wire mda_chip_select_n = ~(~iorq && ~address_enable_n && enable_mda & (address[19:15] == 6'b10110)); // B0000 - B7FFF (8 repeated blocks of 4Kb)
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wire uart_cs = (~address_enable_n && {address[15:3], 3'd0} == 16'h03F8);
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wire uart2_cs = (~address_enable_n && {address[15:3], 3'd0} == 16'h02F8);
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// wire uart2_cs = (~address_enable_n && {address[15:3], 3'd0} == 16'h02F8);
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wire lpt_cs = (iorq && ~address_enable_n && address[15:0] == 16'h0378);
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wire tandy_page_cs = (iorq && ~address_enable_n && address[15:0] == 16'h03DF);
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wire xtctl_cs = (iorq && ~address_enable_n && address[15:0] == 16'h8888);
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@@ -265,7 +264,7 @@ module PERIPHERALS #(
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logic keybord_interrupt;
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logic uart_interrupt;
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logic fdd_interrupt;
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logic uart2_interrupt;
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//logic uart2_interrupt;
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logic [7:0] interrupt_data_bus_out;
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KF8259 u_KF8259
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@@ -293,7 +292,7 @@ module PERIPHERALS #(
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fdd_interrupt,
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interrupt_request[5],
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uart_interrupt,
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uart2_interrupt,
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interrupt_request[3], // uart2_interrupt
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interrupt_request[2],
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keybord_interrupt,
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timer_interrupt})
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@@ -400,7 +399,7 @@ module PERIPHERALS #(
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logic ps2_send_clock;
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logic keybord_irq;
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logic uart_irq;
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logic uart2_irq;
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//logic uart2_irq;
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logic [7:0] keycode;
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logic [7:0] tandy_keycode;
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logic prev_ps2_reset;
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@@ -508,7 +507,7 @@ module PERIPHERALS #(
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logic keybord_interrupt_ff;
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logic uart_interrupt_ff;
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logic uart2_interrupt_ff;
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//logic uart2_interrupt_ff;
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always_ff @(posedge clock, posedge reset)
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begin
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if (reset)
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@@ -517,8 +516,8 @@ module PERIPHERALS #(
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keybord_interrupt <= 1'b0;
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uart_interrupt_ff <= 1'b0;
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uart_interrupt <= 1'b0;
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uart2_interrupt_ff <= 1'b0;
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uart2_interrupt <= 1'b0;
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//uart2_interrupt_ff <= 1'b0;
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//uart2_interrupt <= 1'b0;
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end
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else
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begin
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@@ -526,19 +525,19 @@ module PERIPHERALS #(
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keybord_interrupt <= keybord_interrupt_ff;
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uart_interrupt_ff <= uart_irq;
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uart_interrupt <= uart_interrupt_ff;
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uart2_interrupt_ff <= uart2_irq;
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uart2_interrupt <= uart2_interrupt_ff;
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//uart2_interrupt_ff <= uart2_irq;
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//uart2_interrupt <= uart2_interrupt_ff;
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end
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end
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logic prev_io_read_n;
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logic prev_io_write_n;
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logic [7:0] write_to_uart;
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logic [7:0] write_to_uart2;
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//logic [7:0] write_to_uart2;
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logic [7:0] uart_readdata_1;
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logic [7:0] uart_readdata;
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logic [7:0] uart2_readdata_1;
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logic [7:0] uart2_readdata;
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//logic [7:0] uart2_readdata_1;
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//logic [7:0] uart2_readdata;
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always_ff @(posedge clock)
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begin
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@@ -572,12 +571,12 @@ module PERIPHERALS #(
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if (~io_write_n)
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begin
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write_to_uart <= internal_data_bus;
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write_to_uart2 <= internal_data_bus;
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//write_to_uart2 <= internal_data_bus;
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end
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else
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begin
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write_to_uart <= write_to_uart;
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write_to_uart2 <= write_to_uart2;
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//write_to_uart2 <= write_to_uart2;
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end
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if ((lpt_cs) && (~io_write_n))
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@@ -596,6 +595,9 @@ module PERIPHERALS #(
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end
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wire iorq_uart = (io_write_n & ~prev_io_write_n) || (~io_read_n & prev_io_read_n);
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wire uart_tx;
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wire rts_n;
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uart uart1
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(
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.clk (clock),
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@@ -608,26 +610,20 @@ module PERIPHERALS #(
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.write (io_write_n & ~prev_io_write_n),
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.readdata (uart_readdata_1),
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.cs (uart_cs & iorq_uart),
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.rx (uart_rx),
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.tx (uart_tx),
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.cts_n (uart_cts_n),
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.dcd_n (uart_dcd_n),
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.dsr_n (uart_dsr_n),
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.rts_n (uart_rts_n),
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.dtr_n (uart_dtr_n),
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.rx (uart_tx),
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.cts_n (0),
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.dcd_n (0),
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.dsr_n (0),
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.ri_n (1),
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.rts_n (rts_n),
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.irq (uart_irq)
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);
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wire uart2_tx;
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wire rts_n;
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/*
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uart uart2
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(
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.clk (clock),
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.br_clk (clk_uart2),
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.br_clk (clk_uart),
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.reset (reset),
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.address (address[2:0]),
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@@ -636,15 +632,20 @@ module PERIPHERALS #(
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.write (io_write_n & ~prev_io_write_n),
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.readdata (uart2_readdata_1),
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.cs (uart2_cs & iorq_uart),
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.rx (uart2_tx),
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.cts_n (0),
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.dcd_n (0),
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.dsr_n (0),
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.rx (uart2_rx),
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.tx (uart2_tx),
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.cts_n (uart2_cts_n),
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.dcd_n (uart2_dcd_n),
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.dsr_n (uart2_dsr_n),
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.rts_n (uart2_rts_n),
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.dtr_n (uart2_dtr_n),
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.ri_n (1),
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.rts_n (rts_n),
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.irq (uart2_irq)
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);
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*/
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MSMouseWrapper MSMouseWrapper_inst
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(
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.clk(clock),
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@@ -653,7 +654,7 @@ module PERIPHERALS #(
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.ps2dta_out(ps2_mousedat_out),
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.ps2clk_out(ps2_mouseclk_out),
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.rts(~rts_n),
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.rd(uart2_tx)
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.rd(uart_tx)
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);
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// Timing of the readings may need to be reviewed.
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@@ -662,12 +663,12 @@ module PERIPHERALS #(
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if (~io_read_n)
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begin
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uart_readdata <= uart_readdata_1;
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uart2_readdata <= uart2_readdata_1;
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//uart2_readdata <= uart2_readdata_1;
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end
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else
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begin
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uart_readdata <= uart_readdata;
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uart2_readdata <= uart2_readdata;
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//uart2_readdata <= uart2_readdata;
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end
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end
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