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https://github.com/MiSTer-devel/MultiComp_MiSTer.git
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add image controller - for using images as cp/m disk
increase read buffer of UART from 16 to 64 bytes allow selection of UART baud rate allow selection of sd controller or image controller update readme.md with more explanation of above and more detail on MultiComp use specifically for CP/M
This commit is contained in:
Fred VanEijk
141
Components/SDCARD/image_controller.vhd
Normal file
141
Components/SDCARD/image_controller.vhd
Normal file
@@ -0,0 +1,141 @@
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity image_controller is
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port (
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-- System interface
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clk : in std_logic;
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n_reset : in std_logic;
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-- CPU interface
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n_rd : in std_logic;
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n_wr : in std_logic;
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dataIn : in std_logic_vector(7 downto 0);
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dataOut : out std_logic_vector(7 downto 0);
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regAddr : in std_logic_vector(2 downto 0);
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-- Status output
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driveLED : out std_logic := '1'
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);
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end image_controller;
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architecture rtl of image_controller is
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-- Status register bits
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constant STATUS_WRITE_READY : integer := 7;
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constant STATUS_READ_READY : integer := 6;
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constant STATUS_BUSY : integer := 5;
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-- Internal registers
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signal status : std_logic_vector(7 downto 0);
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signal block_busy : std_logic := '0';
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signal address : std_logic_vector(31 downto 0) := (others => '0');
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-- Data buffering
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signal read_data : std_logic_vector(7 downto 0);
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signal write_data : std_logic_vector(7 downto 0);
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signal buffer_addr : unsigned(8 downto 0); -- 0-511 bytes per sector
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-- Transfer state machine
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type transfer_state is (IDLE, READ_SECTOR, WRITE_SECTOR, WAIT_COMPLETE);
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signal state : transfer_state := IDLE;
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-- Activity LED timer
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signal led_counter : integer range 0 to 1000000 := 0;
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begin
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-- Address register handling
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process(n_wr)
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begin
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if rising_edge(n_wr) then
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case regAddr is
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when "010" => address(7 downto 0) <= dataIn;
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when "011" => address(15 downto 8) <= dataIn;
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when "100" => address(23 downto 16) <= dataIn;
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when others => null;
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end case;
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end if;
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end process;
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-- Command and status handling
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process(clk, n_reset)
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begin
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if n_reset = '0' then
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state <= IDLE;
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block_busy <= '0';
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buffer_addr <= (others => '0');
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led_counter <= 0;
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status <= x"80"; -- Ready to write
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elsif rising_edge(clk) then
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-- Default LED timeout behavior
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if led_counter /= 0 then
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led_counter <= led_counter - 1;
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end if;
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-- Update status register
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if state = IDLE then
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status(STATUS_WRITE_READY) <= '1';
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status(STATUS_READ_READY) <= '0';
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elsif state = READ_SECTOR then
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status(STATUS_WRITE_READY) <= '0';
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status(STATUS_READ_READY) <= '1';
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else
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status(STATUS_WRITE_READY) <= '0';
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status(STATUS_READ_READY) <= '0';
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end if;
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status(STATUS_BUSY) <= block_busy;
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case state is
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when IDLE =>
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if n_wr = '0' and regAddr = "001" then
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case dataIn is
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when x"00" => -- Read command
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state <= READ_SECTOR;
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block_busy <= '1';
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buffer_addr <= (others => '0');
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led_counter <= 1000000; -- 1M cycles = 20ms at 50MHz
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when x"01" => -- Write command
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state <= WRITE_SECTOR;
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block_busy <= '1';
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buffer_addr <= (others => '0');
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led_counter <= 1000000;
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when others =>
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null;
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end case;
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end if;
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when READ_SECTOR =>
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if buffer_addr = 511 then
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state <= IDLE;
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block_busy <= '0';
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elsif n_rd = '0' and regAddr = "000" then
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buffer_addr <= buffer_addr + 1;
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end if;
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when WRITE_SECTOR =>
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if buffer_addr = 511 then
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state <= IDLE;
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block_busy <= '0';
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elsif n_wr = '0' and regAddr = "000" then
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write_data <= dataIn;
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buffer_addr <= buffer_addr + 1;
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end if;
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when others =>
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state <= IDLE;
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end case;
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end if;
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end process;
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-- Data output multiplexing
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dataOut <= status when regAddr = "001" else
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read_data when regAddr = "000" else
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x"FF";
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-- Drive LED control
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driveLED <= '0' when led_counter /= 0 else '1';
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end rtl;
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@@ -33,7 +33,7 @@ entity bufferedUART is
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txClock : in std_logic; -- 16 x baud rate
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rxd : in std_logic;
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txd : out std_logic;
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n_rts : out std_logic :='0';
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n_rts : out std_logic :='0'; -- start in ready to recieve state
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n_cts : in std_logic;
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n_dcd : in std_logic
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);
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@@ -70,7 +70,7 @@ signal txState : serialStateType;
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signal reset : std_logic := '0';
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type rxBuffArray is array (0 to 15) of std_logic_vector(7 downto 0);
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type rxBuffArray is array (0 to 63) of std_logic_vector(7 downto 0); -- 64 byte recieve buffer was 16 bytes
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signal rxBuffer : rxBuffArray;
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signal rxInPointer: integer range 0 to 63 :=0;
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@@ -99,18 +99,18 @@ begin
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-- 6850 implementatit = n_rts <= '1' when controlReg(6)='1' and controlReg(5)='0' else '0';
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rxBuffCount <= 0 + rxInPointer - rxReadPointer when rxInPointer >= rxReadPointer
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else 16 + rxInPointer - rxReadPointer;
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else 64 + rxInPointer - rxReadPointer;
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-- RTS with hysteresis
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-- enable flow if less than 2 characters in buffer
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-- stop flow if greater that 8 chars in buffer (to allow 8 byte overflow)
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-- enable flow if less than 4 characters in buffer
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-- stop flow if greater that 8 chars in buffer (to allow 32 byte overflow)
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process (clk)
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begin
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if falling_edge(clk) then
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if rxBuffCount<2 then
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if rxBuffCount<4 then
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n_rts <= '0';
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end if;
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if rxBuffCount>8 then
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if rxBuffCount>32 then
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n_rts <= '1';
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end if;
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end if;
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@@ -162,7 +162,7 @@ begin
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if regSel='1' then
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dataOut <= rxBuffer(rxReadPointer);
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if rxInPointer /= rxReadPointer then
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if rxReadPointer < 15 then
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if rxReadPointer < 63 then
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rxReadPointer <= rxReadPointer+1;
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else
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rxReadPointer <= 0;
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@@ -222,7 +222,7 @@ begin
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when stopBit =>
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if rxClockCount= 15 then
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rxBuffer(rxInPointer) <= rxCurrentByteBuffer;
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if rxInPointer < 15 then
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if rxInPointer < 63 then
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rxInPointer <= rxInPointer+1;
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else
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rxInPointer <= 0;
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@@ -22,6 +22,7 @@ entity Microcomputer6502Basic is
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port(
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N_RESET : in std_logic;
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clk : in std_logic;
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baud_increment : in std_logic_vector(15 downto 0);
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sramData : inout std_logic_vector(7 downto 0);
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sramAddress : out std_logic_vector(15 downto 0);
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@@ -97,7 +98,7 @@ architecture struct of Microcomputer6502Basic is
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signal n_interface2CS : std_logic :='1';
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signal n_sdCardCS : std_logic :='1';
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signal serialClkCount : std_logic_vector(15 downto 0);
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signal serialClkCount : unsigned(15 downto 0);
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signal cpuClkCount : std_logic_vector(5 downto 0);
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signal sdClkCount : std_logic_vector(5 downto 0);
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signal cpuClock : std_logic;
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@@ -289,7 +290,7 @@ begin
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-- 9600 201
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-- 4800 101
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-- 2400 50
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serialClkCount <= serialClkCount + 2416;
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serialClkCount <= serialClkCount + unsigned(baud_increment);
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end if;
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end process;
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@@ -22,6 +22,7 @@ entity Microcomputer6809Basic is
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port(
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N_RESET : in std_logic;
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clk : in std_logic;
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baud_increment : in std_logic_vector(15 downto 0);
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sramData : inout std_logic_vector(7 downto 0);
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sramAddress : out std_logic_vector(15 downto 0);
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@@ -97,7 +98,7 @@ architecture struct of Microcomputer6809Basic is
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signal n_interface2CS : std_logic :='1';
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signal n_sdCardCS : std_logic :='1';
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signal serialClkCount : std_logic_vector(15 downto 0);
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signal serialClkCount : unsigned(15 downto 0);
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signal cpuClkCount : std_logic_vector(5 downto 0);
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signal sdClkCount : std_logic_vector(5 downto 0);
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signal cpuClock : std_logic;
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@@ -287,7 +288,7 @@ begin
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-- 9600 201
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-- 4800 101
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-- 2400 50
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serialClkCount <= serialClkCount + 2416;
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serialClkCount <= serialClkCount + unsigned(baud_increment);
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end if;
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end process;
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@@ -22,6 +22,7 @@ entity MicrocomputerZ80Basic is
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port(
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N_RESET : in std_logic;
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clk : in std_logic;
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baud_increment : in std_logic_vector(15 downto 0);
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sramData : inout std_logic_vector(7 downto 0);
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sramAddress : out std_logic_vector(15 downto 0);
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@@ -97,7 +98,7 @@ architecture struct of MicrocomputerZ80Basic is
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signal n_interface2CS : std_logic :='1';
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signal n_sdCardCS : std_logic :='1';
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signal serialClkCount : std_logic_vector(15 downto 0);
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signal serialClkCount : unsigned(15 downto 0);
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signal cpuClkCount : std_logic_vector(5 downto 0);
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signal sdClkCount : std_logic_vector(5 downto 0);
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signal cpuClock : std_logic;
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@@ -293,7 +294,7 @@ begin
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-- 9600 201
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-- 4800 101
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-- 2400 50
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serialClkCount <= serialClkCount + 2416;
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serialClkCount <= serialClkCount + unsigned(baud_increment);
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end if;
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end process;
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@@ -22,6 +22,7 @@ entity MicrocomputerZ80CPM is
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port(
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N_RESET : in std_logic;
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clk : in std_logic;
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baud_increment : in std_logic_vector(15 downto 0);
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sramData : inout std_logic_vector(7 downto 0);
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sramAddress : out std_logic_vector(15 downto 0);
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@@ -63,8 +64,9 @@ entity MicrocomputerZ80CPM is
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usbCS : out std_logic;
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usbMOSI : out std_logic;
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usbMISO : in std_logic;
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usbSCLK : out std_logic
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);
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usbSCLK : out std_logic;
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sd_ctrl_sel : in std_logic
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);
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end MicrocomputerZ80CPM;
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architecture struct of MicrocomputerZ80CPM is
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@@ -104,12 +106,16 @@ architecture struct of MicrocomputerZ80CPM is
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signal n_ch376sCS : std_logic :='1';
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signal n_sdCardCS : std_logic :='1';
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signal serialClkCount : std_logic_vector(15 downto 0);
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signal serialClkCount : unsigned(15 downto 0);
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signal cpuClkCount : std_logic_vector(5 downto 0);
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signal sdClkCount : std_logic_vector(5 downto 0);
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signal cpuClock : std_logic;
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signal serialClock : std_logic;
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signal sdClock : std_logic;
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signal sdCardDataOut_sd : std_logic_vector(7 downto 0);
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signal sdCardDataOut_img : std_logic_vector(7 downto 0);
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signal driveLED_sd, driveLED_img : std_logic;
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signal sdMISO_int : std_logic; -- Add this signal declaration
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--CPM
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signal n_RomActive : std_logic := '0';
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@@ -245,21 +251,37 @@ port map(
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n_rts => rts1
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);
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sd1 : entity work.sd_controller
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port map(
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sdCS => sdCS,
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sdMOSI => sdMOSI,
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sdMISO => sdMISO,
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sdSCLK => sdSCLK,
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n_wr => n_sdCardCS or n_ioWR,
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n_rd => n_sdCardCS or n_ioRD,
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n_reset => N_RESET,
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dataIn => cpuDataOut,
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dataOut => sdCardDataOut,
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regAddr => cpuAddress(2 downto 0),
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driveLED=> driveLED,
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clk => clk -- 50 MHz clock = 25 MHz SPI clock
|
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);
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sd1 : entity work.sd_controller
|
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port map(
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sdCS => sdCS,
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sdMOSI => sdMOSI,
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sdMISO => sdMISO_int, -- Use the internal signal
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sdSCLK => sdSCLK,
|
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n_wr => n_sdCardCS or n_ioWR,
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n_rd => n_sdCardCS or n_ioRD,
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n_reset => N_RESET,
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dataIn => cpuDataOut,
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dataOut => sdCardDataOut_sd,
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regAddr => cpuAddress(2 downto 0),
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driveLED => driveLED_sd,
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clk => clk
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);
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-- Add signal assignment outside port map:
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sdMISO_int <= sdMISO when sd_ctrl_sel = '0' else '1';
|
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|
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-- New image controller
|
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img1 : entity work.image_controller
|
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port map(
|
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clk => clk,
|
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n_reset => N_RESET,
|
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n_rd => n_sdCardCS or n_ioRD,
|
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n_wr => n_sdCardCS or n_ioWR,
|
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dataIn => cpuDataOut,
|
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dataOut => sdCardDataOut_img,
|
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regAddr => cpuAddress(2 downto 0),
|
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driveLED => driveLED_img
|
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);
|
||||
|
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usb : ch376s_module
|
||||
port map (
|
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@@ -301,16 +323,22 @@ n_internalRam1CS <= not n_basRomCS; -- Full Internal RAM - 64 K
|
||||
-- ____________________________________________________________________________________
|
||||
-- BUS ISOLATION GOES HERE
|
||||
|
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cpuDataIn <=
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interface1DataOut when n_interface1CS = '0' else
|
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interface2DataOut when n_interface2CS = '0' else
|
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ch376sDataOut when n_ch376sCS = '0' else
|
||||
sdCardDataOut when n_sdCardCS = '0' else
|
||||
basRomData when n_basRomCS = '0' else
|
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internalRam1DataOut when n_internalRam1CS= '0' else
|
||||
sramData when n_externalRamCS= '0' else
|
||||
x"FF";
|
||||
-- Mux controller outputs based on selection
|
||||
sdCardDataOut <= sdCardDataOut_img when sd_ctrl_sel = '1' else
|
||||
sdCardDataOut_sd;
|
||||
|
||||
driveLED <= driveLED_img when sd_ctrl_sel = '1' else
|
||||
driveLED_sd;
|
||||
|
||||
-- CPU data input mux needs to be written like this:
|
||||
cpuDataIn <= interface1DataOut when (n_interface1CS = '0') else
|
||||
interface2DataOut when (n_interface2CS = '0') else
|
||||
ch376sDataOut when (n_ch376sCS = '0') else
|
||||
sdCardDataOut when (n_sdCardCS = '0') else
|
||||
basRomData when (n_basRomCS = '0') else
|
||||
internalRam1DataOut when (n_internalRam1CS = '0') else
|
||||
sramData when (n_externalRamCS = '0') else
|
||||
x"FF";
|
||||
-- ____________________________________________________________________________________
|
||||
-- SYSTEM CLOCKS GO HERE
|
||||
|
||||
@@ -355,7 +383,7 @@ begin
|
||||
-- 9600 201
|
||||
-- 4800 101
|
||||
-- 2400 50
|
||||
serialClkCount <= serialClkCount + 2416;
|
||||
serialClkCount <= serialClkCount + unsigned(baud_increment);
|
||||
end if;
|
||||
end process;
|
||||
|
||||
|
||||
@@ -1,386 +1,387 @@
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||
# Your use of Intel Corporation's design tools, logic functions
|
||||
# and other software and tools, and its AMPP partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Intel Program License
|
||||
# Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
# the Intel MegaCore Function License Agreement, or other
|
||||
# applicable license agreement, including, without limitation,
|
||||
# that your use is for the sole purpose of programming logic
|
||||
# devices manufactured by Intel and sold by Intel or its
|
||||
# authorized distributors. Please refer to the applicable
|
||||
# agreement for further details.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus Prime
|
||||
# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
|
||||
# Date created = 01:53:32 April 20, 2017
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
set_global_assignment -name VERILOG_MACRO "LITE=1"
|
||||
|
||||
set_global_assignment -name FAMILY "Cyclone V"
|
||||
set_global_assignment -name DEVICE 5CSEBA6U23I7
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY sys_top
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:07:53 JUNE 20, 2018"
|
||||
set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
|
||||
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
|
||||
|
||||
set_global_assignment -name GENERATE_RBF_FILE ON
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SAVE_DISK_SPACE OFF
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
|
||||
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
|
||||
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
|
||||
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
|
||||
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
|
||||
set_global_assignment -name SEED 1
|
||||
|
||||
#============================================================
|
||||
# ADC
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
|
||||
set_location_assignment PIN_U9 -to ADC_CONVST
|
||||
set_location_assignment PIN_V10 -to ADC_SCK
|
||||
set_location_assignment PIN_AC4 -to ADC_SDI
|
||||
set_location_assignment PIN_AD4 -to ADC_SDO
|
||||
|
||||
#============================================================
|
||||
# ARDUINO
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[8]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[9]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[10]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[11]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[12]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[13]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[14]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[15]
|
||||
set_location_assignment PIN_AG9 -to ARDUINO_IO[3]
|
||||
set_location_assignment PIN_U14 -to ARDUINO_IO[4]
|
||||
set_location_assignment PIN_U13 -to ARDUINO_IO[5]
|
||||
set_location_assignment PIN_AG8 -to ARDUINO_IO[6]
|
||||
set_location_assignment PIN_AH8 -to ARDUINO_IO[7]
|
||||
set_location_assignment PIN_AF17 -to ARDUINO_IO[8]
|
||||
set_location_assignment PIN_AE15 -to ARDUINO_IO[9]
|
||||
set_location_assignment PIN_AF15 -to ARDUINO_IO[10]
|
||||
set_location_assignment PIN_AG16 -to ARDUINO_IO[11]
|
||||
set_location_assignment PIN_AH11 -to ARDUINO_IO[12]
|
||||
set_location_assignment PIN_AH12 -to ARDUINO_IO[13]
|
||||
set_location_assignment PIN_AH9 -to ARDUINO_IO[14]
|
||||
set_location_assignment PIN_AG11 -to ARDUINO_IO[15]
|
||||
|
||||
#============================================================
|
||||
# SDIO
|
||||
#============================================================
|
||||
set_location_assignment PIN_AF25 -to SDIO_DAT[0]
|
||||
set_location_assignment PIN_AF23 -to SDIO_DAT[1]
|
||||
set_location_assignment PIN_AD26 -to SDIO_DAT[2]
|
||||
set_location_assignment PIN_AF28 -to SDIO_DAT[3]
|
||||
set_location_assignment PIN_AF27 -to SDIO_CMD
|
||||
set_location_assignment PIN_AH26 -to SDIO_CLK
|
||||
set_location_assignment PIN_AH7 -to SDIO_CD
|
||||
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_*
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CD
|
||||
|
||||
#============================================================
|
||||
# VGA
|
||||
#============================================================
|
||||
set_location_assignment PIN_AE17 -to VGA_R[0]
|
||||
set_location_assignment PIN_AE20 -to VGA_R[1]
|
||||
set_location_assignment PIN_AF20 -to VGA_R[2]
|
||||
set_location_assignment PIN_AH18 -to VGA_R[3]
|
||||
set_location_assignment PIN_AH19 -to VGA_R[4]
|
||||
set_location_assignment PIN_AF21 -to VGA_R[5]
|
||||
|
||||
set_location_assignment PIN_AE19 -to VGA_G[0]
|
||||
set_location_assignment PIN_AG15 -to VGA_G[1]
|
||||
set_location_assignment PIN_AF18 -to VGA_G[2]
|
||||
set_location_assignment PIN_AG18 -to VGA_G[3]
|
||||
set_location_assignment PIN_AG19 -to VGA_G[4]
|
||||
set_location_assignment PIN_AG20 -to VGA_G[5]
|
||||
|
||||
set_location_assignment PIN_AG21 -to VGA_B[0]
|
||||
set_location_assignment PIN_AA20 -to VGA_B[1]
|
||||
set_location_assignment PIN_AE22 -to VGA_B[2]
|
||||
set_location_assignment PIN_AF22 -to VGA_B[3]
|
||||
set_location_assignment PIN_AH23 -to VGA_B[4]
|
||||
set_location_assignment PIN_AH21 -to VGA_B[5]
|
||||
|
||||
set_location_assignment PIN_AH22 -to VGA_HS
|
||||
set_location_assignment PIN_AG24 -to VGA_VS
|
||||
|
||||
set_location_assignment PIN_AH27 -to VGA_EN
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_*
|
||||
|
||||
#============================================================
|
||||
# AUDIO
|
||||
#============================================================
|
||||
set_location_assignment PIN_AC24 -to AUDIO_L
|
||||
set_location_assignment PIN_AE25 -to AUDIO_R
|
||||
set_location_assignment PIN_AG26 -to AUDIO_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_*
|
||||
|
||||
#============================================================
|
||||
# SDRAM
|
||||
#============================================================
|
||||
set_location_assignment PIN_Y11 -to SDRAM_A[0]
|
||||
set_location_assignment PIN_AA26 -to SDRAM_A[1]
|
||||
set_location_assignment PIN_AA13 -to SDRAM_A[2]
|
||||
set_location_assignment PIN_AA11 -to SDRAM_A[3]
|
||||
set_location_assignment PIN_W11 -to SDRAM_A[4]
|
||||
set_location_assignment PIN_Y19 -to SDRAM_A[5]
|
||||
set_location_assignment PIN_AB23 -to SDRAM_A[6]
|
||||
set_location_assignment PIN_AC23 -to SDRAM_A[7]
|
||||
set_location_assignment PIN_AC22 -to SDRAM_A[8]
|
||||
set_location_assignment PIN_C12 -to SDRAM_A[9]
|
||||
set_location_assignment PIN_AB26 -to SDRAM_A[10]
|
||||
set_location_assignment PIN_AD17 -to SDRAM_A[11]
|
||||
set_location_assignment PIN_D12 -to SDRAM_A[12]
|
||||
set_location_assignment PIN_Y17 -to SDRAM_BA[0]
|
||||
set_location_assignment PIN_AB25 -to SDRAM_BA[1]
|
||||
|
||||
set_location_assignment PIN_E8 -to SDRAM_DQ[0]
|
||||
set_location_assignment PIN_V12 -to SDRAM_DQ[1]
|
||||
set_location_assignment PIN_D11 -to SDRAM_DQ[2]
|
||||
set_location_assignment PIN_W12 -to SDRAM_DQ[3]
|
||||
set_location_assignment PIN_AH13 -to SDRAM_DQ[4]
|
||||
set_location_assignment PIN_D8 -to SDRAM_DQ[5]
|
||||
set_location_assignment PIN_AH14 -to SDRAM_DQ[6]
|
||||
set_location_assignment PIN_AF7 -to SDRAM_DQ[7]
|
||||
set_location_assignment PIN_AE24 -to SDRAM_DQ[8]
|
||||
set_location_assignment PIN_AD23 -to SDRAM_DQ[9]
|
||||
set_location_assignment PIN_AE6 -to SDRAM_DQ[10]
|
||||
set_location_assignment PIN_AE23 -to SDRAM_DQ[11]
|
||||
set_location_assignment PIN_AG14 -to SDRAM_DQ[12]
|
||||
set_location_assignment PIN_AD5 -to SDRAM_DQ[13]
|
||||
set_location_assignment PIN_AF4 -to SDRAM_DQ[14]
|
||||
set_location_assignment PIN_AH3 -to SDRAM_DQ[15]
|
||||
set_location_assignment PIN_AG13 -to SDRAM_DQML
|
||||
set_location_assignment PIN_AF13 -to SDRAM_DQMH
|
||||
|
||||
set_location_assignment PIN_AD20 -to SDRAM_CLK
|
||||
set_location_assignment PIN_AG10 -to SDRAM_CKE
|
||||
|
||||
set_location_assignment PIN_AA19 -to SDRAM_nWE
|
||||
set_location_assignment PIN_AA18 -to SDRAM_nCAS
|
||||
set_location_assignment PIN_Y18 -to SDRAM_nCS
|
||||
set_location_assignment PIN_W14 -to SDRAM_nRAS
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQM*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_n*
|
||||
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM_*
|
||||
|
||||
#============================================================
|
||||
# I/O
|
||||
#============================================================
|
||||
set_location_assignment PIN_Y15 -to LED_USER
|
||||
set_location_assignment PIN_AA15 -to LED_HDD
|
||||
set_location_assignment PIN_AG28 -to LED_POWER
|
||||
|
||||
set_location_assignment PIN_AH24 -to BTN_USER
|
||||
set_location_assignment PIN_AG25 -to BTN_OSD
|
||||
set_location_assignment PIN_AG23 -to BTN_RESET
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_*
|
||||
|
||||
#============================================================
|
||||
# CLOCK
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
|
||||
set_location_assignment PIN_V11 -to FPGA_CLK1_50
|
||||
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
|
||||
set_location_assignment PIN_E11 -to FPGA_CLK3_50
|
||||
|
||||
#============================================================
|
||||
# HDMI
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_SCL
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_SDA
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2S
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_LRCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_MCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_SCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_CLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_DE
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[8]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[9]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[10]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[11]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[12]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[13]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[14]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[15]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[16]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[17]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[18]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[19]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[20]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[21]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[22]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[23]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_HS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_INT
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_VS
|
||||
set_location_assignment PIN_U10 -to HDMI_I2C_SCL
|
||||
set_location_assignment PIN_AA4 -to HDMI_I2C_SDA
|
||||
set_location_assignment PIN_T13 -to HDMI_I2S
|
||||
set_location_assignment PIN_T11 -to HDMI_LRCLK
|
||||
set_location_assignment PIN_U11 -to HDMI_MCLK
|
||||
set_location_assignment PIN_T12 -to HDMI_SCLK
|
||||
set_location_assignment PIN_AG5 -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_AD19 -to HDMI_TX_DE
|
||||
set_location_assignment PIN_AD12 -to HDMI_TX_D[0]
|
||||
set_location_assignment PIN_AE12 -to HDMI_TX_D[1]
|
||||
set_location_assignment PIN_W8 -to HDMI_TX_D[2]
|
||||
set_location_assignment PIN_Y8 -to HDMI_TX_D[3]
|
||||
set_location_assignment PIN_AD11 -to HDMI_TX_D[4]
|
||||
set_location_assignment PIN_AD10 -to HDMI_TX_D[5]
|
||||
set_location_assignment PIN_AE11 -to HDMI_TX_D[6]
|
||||
set_location_assignment PIN_Y5 -to HDMI_TX_D[7]
|
||||
set_location_assignment PIN_AF10 -to HDMI_TX_D[8]
|
||||
set_location_assignment PIN_Y4 -to HDMI_TX_D[9]
|
||||
set_location_assignment PIN_AE9 -to HDMI_TX_D[10]
|
||||
set_location_assignment PIN_AB4 -to HDMI_TX_D[11]
|
||||
set_location_assignment PIN_AE7 -to HDMI_TX_D[12]
|
||||
set_location_assignment PIN_AF6 -to HDMI_TX_D[13]
|
||||
set_location_assignment PIN_AF8 -to HDMI_TX_D[14]
|
||||
set_location_assignment PIN_AF5 -to HDMI_TX_D[15]
|
||||
set_location_assignment PIN_AE4 -to HDMI_TX_D[16]
|
||||
set_location_assignment PIN_AH2 -to HDMI_TX_D[17]
|
||||
set_location_assignment PIN_AH4 -to HDMI_TX_D[18]
|
||||
set_location_assignment PIN_AH5 -to HDMI_TX_D[19]
|
||||
set_location_assignment PIN_AH6 -to HDMI_TX_D[20]
|
||||
set_location_assignment PIN_AG6 -to HDMI_TX_D[21]
|
||||
set_location_assignment PIN_AF9 -to HDMI_TX_D[22]
|
||||
set_location_assignment PIN_AE8 -to HDMI_TX_D[23]
|
||||
set_location_assignment PIN_T8 -to HDMI_TX_HS
|
||||
set_location_assignment PIN_AF11 -to HDMI_TX_INT
|
||||
set_location_assignment PIN_V13 -to HDMI_TX_VS
|
||||
|
||||
#============================================================
|
||||
# KEY
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
|
||||
set_location_assignment PIN_AH17 -to KEY[0]
|
||||
set_location_assignment PIN_AH16 -to KEY[1]
|
||||
|
||||
#============================================================
|
||||
# LED
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
|
||||
set_location_assignment PIN_W15 -to LED[0]
|
||||
set_location_assignment PIN_AA24 -to LED[1]
|
||||
set_location_assignment PIN_V16 -to LED[2]
|
||||
set_location_assignment PIN_V15 -to LED[3]
|
||||
set_location_assignment PIN_AF26 -to LED[4]
|
||||
set_location_assignment PIN_AE26 -to LED[5]
|
||||
set_location_assignment PIN_Y16 -to LED[6]
|
||||
set_location_assignment PIN_AA23 -to LED[7]
|
||||
|
||||
#============================================================
|
||||
# SW
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
|
||||
set_location_assignment PIN_Y24 -to SW[0]
|
||||
set_location_assignment PIN_W24 -to SW[1]
|
||||
set_location_assignment PIN_W21 -to SW[2]
|
||||
set_location_assignment PIN_W20 -to SW[3]
|
||||
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
|
||||
|
||||
set_global_assignment -name CDF_FILE jtag.cdf
|
||||
set_global_assignment -name QIP_FILE sys/sys.qip
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE MultiComp.sv
|
||||
set_global_assignment -name VHDL_FILE Components/M6809/cpu09l.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6800/cpu68.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80s.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/UART/bufferedUART.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/sd_controller.vhd
|
||||
set_global_assignment -name QIP_FILE Components/INTERNALRAM/InternalRam64K.qip
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/SBCTextDisplayRGB.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/CGABoldRom.vhd
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam1K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam2K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/CGABoldRomReduced.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6502/M6502_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6809/M6809_EXT_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_CPM_BASIC_ROM.qip
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80CPM.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6502Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6809Basic.vhd
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||
# Your use of Intel Corporation's design tools, logic functions
|
||||
# and other software and tools, and its AMPP partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Intel Program License
|
||||
# Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
# the Intel MegaCore Function License Agreement, or other
|
||||
# applicable license agreement, including, without limitation,
|
||||
# that your use is for the sole purpose of programming logic
|
||||
# devices manufactured by Intel and sold by Intel or its
|
||||
# authorized distributors. Please refer to the applicable
|
||||
# agreement for further details.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus Prime
|
||||
# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
|
||||
# Date created = 01:53:32 April 20, 2017
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
set_global_assignment -name VERILOG_MACRO "LITE=1"
|
||||
|
||||
set_global_assignment -name FAMILY "Cyclone V"
|
||||
set_global_assignment -name DEVICE 5CSEBA6U23I7
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY sys_top
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Standard Edition"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:07:53 JUNE 20, 2018"
|
||||
set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
|
||||
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
|
||||
|
||||
set_global_assignment -name GENERATE_RBF_FILE ON
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SAVE_DISK_SPACE OFF
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
|
||||
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
|
||||
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
|
||||
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
|
||||
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
|
||||
set_global_assignment -name SEED 1
|
||||
|
||||
#============================================================
|
||||
# ADC
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
|
||||
set_location_assignment PIN_U9 -to ADC_CONVST
|
||||
set_location_assignment PIN_V10 -to ADC_SCK
|
||||
set_location_assignment PIN_AC4 -to ADC_SDI
|
||||
set_location_assignment PIN_AD4 -to ADC_SDO
|
||||
|
||||
#============================================================
|
||||
# ARDUINO
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[8]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[9]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[10]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[11]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[12]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[13]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[14]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[15]
|
||||
set_location_assignment PIN_AG9 -to ARDUINO_IO[3]
|
||||
set_location_assignment PIN_U14 -to ARDUINO_IO[4]
|
||||
set_location_assignment PIN_U13 -to ARDUINO_IO[5]
|
||||
set_location_assignment PIN_AG8 -to ARDUINO_IO[6]
|
||||
set_location_assignment PIN_AH8 -to ARDUINO_IO[7]
|
||||
set_location_assignment PIN_AF17 -to ARDUINO_IO[8]
|
||||
set_location_assignment PIN_AE15 -to ARDUINO_IO[9]
|
||||
set_location_assignment PIN_AF15 -to ARDUINO_IO[10]
|
||||
set_location_assignment PIN_AG16 -to ARDUINO_IO[11]
|
||||
set_location_assignment PIN_AH11 -to ARDUINO_IO[12]
|
||||
set_location_assignment PIN_AH12 -to ARDUINO_IO[13]
|
||||
set_location_assignment PIN_AH9 -to ARDUINO_IO[14]
|
||||
set_location_assignment PIN_AG11 -to ARDUINO_IO[15]
|
||||
|
||||
#============================================================
|
||||
# SDIO
|
||||
#============================================================
|
||||
set_location_assignment PIN_AF25 -to SDIO_DAT[0]
|
||||
set_location_assignment PIN_AF23 -to SDIO_DAT[1]
|
||||
set_location_assignment PIN_AD26 -to SDIO_DAT[2]
|
||||
set_location_assignment PIN_AF28 -to SDIO_DAT[3]
|
||||
set_location_assignment PIN_AF27 -to SDIO_CMD
|
||||
set_location_assignment PIN_AH26 -to SDIO_CLK
|
||||
set_location_assignment PIN_AH7 -to SDIO_CD
|
||||
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_*
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CD
|
||||
|
||||
#============================================================
|
||||
# VGA
|
||||
#============================================================
|
||||
set_location_assignment PIN_AE17 -to VGA_R[0]
|
||||
set_location_assignment PIN_AE20 -to VGA_R[1]
|
||||
set_location_assignment PIN_AF20 -to VGA_R[2]
|
||||
set_location_assignment PIN_AH18 -to VGA_R[3]
|
||||
set_location_assignment PIN_AH19 -to VGA_R[4]
|
||||
set_location_assignment PIN_AF21 -to VGA_R[5]
|
||||
|
||||
set_location_assignment PIN_AE19 -to VGA_G[0]
|
||||
set_location_assignment PIN_AG15 -to VGA_G[1]
|
||||
set_location_assignment PIN_AF18 -to VGA_G[2]
|
||||
set_location_assignment PIN_AG18 -to VGA_G[3]
|
||||
set_location_assignment PIN_AG19 -to VGA_G[4]
|
||||
set_location_assignment PIN_AG20 -to VGA_G[5]
|
||||
|
||||
set_location_assignment PIN_AG21 -to VGA_B[0]
|
||||
set_location_assignment PIN_AA20 -to VGA_B[1]
|
||||
set_location_assignment PIN_AE22 -to VGA_B[2]
|
||||
set_location_assignment PIN_AF22 -to VGA_B[3]
|
||||
set_location_assignment PIN_AH23 -to VGA_B[4]
|
||||
set_location_assignment PIN_AH21 -to VGA_B[5]
|
||||
|
||||
set_location_assignment PIN_AH22 -to VGA_HS
|
||||
set_location_assignment PIN_AG24 -to VGA_VS
|
||||
|
||||
set_location_assignment PIN_AH27 -to VGA_EN
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_*
|
||||
|
||||
#============================================================
|
||||
# AUDIO
|
||||
#============================================================
|
||||
set_location_assignment PIN_AC24 -to AUDIO_L
|
||||
set_location_assignment PIN_AE25 -to AUDIO_R
|
||||
set_location_assignment PIN_AG26 -to AUDIO_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_*
|
||||
|
||||
#============================================================
|
||||
# SDRAM
|
||||
#============================================================
|
||||
set_location_assignment PIN_Y11 -to SDRAM_A[0]
|
||||
set_location_assignment PIN_AA26 -to SDRAM_A[1]
|
||||
set_location_assignment PIN_AA13 -to SDRAM_A[2]
|
||||
set_location_assignment PIN_AA11 -to SDRAM_A[3]
|
||||
set_location_assignment PIN_W11 -to SDRAM_A[4]
|
||||
set_location_assignment PIN_Y19 -to SDRAM_A[5]
|
||||
set_location_assignment PIN_AB23 -to SDRAM_A[6]
|
||||
set_location_assignment PIN_AC23 -to SDRAM_A[7]
|
||||
set_location_assignment PIN_AC22 -to SDRAM_A[8]
|
||||
set_location_assignment PIN_C12 -to SDRAM_A[9]
|
||||
set_location_assignment PIN_AB26 -to SDRAM_A[10]
|
||||
set_location_assignment PIN_AD17 -to SDRAM_A[11]
|
||||
set_location_assignment PIN_D12 -to SDRAM_A[12]
|
||||
set_location_assignment PIN_Y17 -to SDRAM_BA[0]
|
||||
set_location_assignment PIN_AB25 -to SDRAM_BA[1]
|
||||
|
||||
set_location_assignment PIN_E8 -to SDRAM_DQ[0]
|
||||
set_location_assignment PIN_V12 -to SDRAM_DQ[1]
|
||||
set_location_assignment PIN_D11 -to SDRAM_DQ[2]
|
||||
set_location_assignment PIN_W12 -to SDRAM_DQ[3]
|
||||
set_location_assignment PIN_AH13 -to SDRAM_DQ[4]
|
||||
set_location_assignment PIN_D8 -to SDRAM_DQ[5]
|
||||
set_location_assignment PIN_AH14 -to SDRAM_DQ[6]
|
||||
set_location_assignment PIN_AF7 -to SDRAM_DQ[7]
|
||||
set_location_assignment PIN_AE24 -to SDRAM_DQ[8]
|
||||
set_location_assignment PIN_AD23 -to SDRAM_DQ[9]
|
||||
set_location_assignment PIN_AE6 -to SDRAM_DQ[10]
|
||||
set_location_assignment PIN_AE23 -to SDRAM_DQ[11]
|
||||
set_location_assignment PIN_AG14 -to SDRAM_DQ[12]
|
||||
set_location_assignment PIN_AD5 -to SDRAM_DQ[13]
|
||||
set_location_assignment PIN_AF4 -to SDRAM_DQ[14]
|
||||
set_location_assignment PIN_AH3 -to SDRAM_DQ[15]
|
||||
set_location_assignment PIN_AG13 -to SDRAM_DQML
|
||||
set_location_assignment PIN_AF13 -to SDRAM_DQMH
|
||||
|
||||
set_location_assignment PIN_AD20 -to SDRAM_CLK
|
||||
set_location_assignment PIN_AG10 -to SDRAM_CKE
|
||||
|
||||
set_location_assignment PIN_AA19 -to SDRAM_nWE
|
||||
set_location_assignment PIN_AA18 -to SDRAM_nCAS
|
||||
set_location_assignment PIN_Y18 -to SDRAM_nCS
|
||||
set_location_assignment PIN_W14 -to SDRAM_nRAS
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQM*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_n*
|
||||
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM_*
|
||||
|
||||
#============================================================
|
||||
# I/O
|
||||
#============================================================
|
||||
set_location_assignment PIN_Y15 -to LED_USER
|
||||
set_location_assignment PIN_AA15 -to LED_HDD
|
||||
set_location_assignment PIN_AG28 -to LED_POWER
|
||||
|
||||
set_location_assignment PIN_AH24 -to BTN_USER
|
||||
set_location_assignment PIN_AG25 -to BTN_OSD
|
||||
set_location_assignment PIN_AG23 -to BTN_RESET
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_*
|
||||
|
||||
#============================================================
|
||||
# CLOCK
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
|
||||
set_location_assignment PIN_V11 -to FPGA_CLK1_50
|
||||
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
|
||||
set_location_assignment PIN_E11 -to FPGA_CLK3_50
|
||||
|
||||
#============================================================
|
||||
# HDMI
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_SCL
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_SDA
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2S
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_LRCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_MCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_SCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_CLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_DE
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[8]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[9]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[10]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[11]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[12]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[13]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[14]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[15]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[16]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[17]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[18]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[19]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[20]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[21]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[22]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_D[23]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_HS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_INT
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_VS
|
||||
set_location_assignment PIN_U10 -to HDMI_I2C_SCL
|
||||
set_location_assignment PIN_AA4 -to HDMI_I2C_SDA
|
||||
set_location_assignment PIN_T13 -to HDMI_I2S
|
||||
set_location_assignment PIN_T11 -to HDMI_LRCLK
|
||||
set_location_assignment PIN_U11 -to HDMI_MCLK
|
||||
set_location_assignment PIN_T12 -to HDMI_SCLK
|
||||
set_location_assignment PIN_AG5 -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_AD19 -to HDMI_TX_DE
|
||||
set_location_assignment PIN_AD12 -to HDMI_TX_D[0]
|
||||
set_location_assignment PIN_AE12 -to HDMI_TX_D[1]
|
||||
set_location_assignment PIN_W8 -to HDMI_TX_D[2]
|
||||
set_location_assignment PIN_Y8 -to HDMI_TX_D[3]
|
||||
set_location_assignment PIN_AD11 -to HDMI_TX_D[4]
|
||||
set_location_assignment PIN_AD10 -to HDMI_TX_D[5]
|
||||
set_location_assignment PIN_AE11 -to HDMI_TX_D[6]
|
||||
set_location_assignment PIN_Y5 -to HDMI_TX_D[7]
|
||||
set_location_assignment PIN_AF10 -to HDMI_TX_D[8]
|
||||
set_location_assignment PIN_Y4 -to HDMI_TX_D[9]
|
||||
set_location_assignment PIN_AE9 -to HDMI_TX_D[10]
|
||||
set_location_assignment PIN_AB4 -to HDMI_TX_D[11]
|
||||
set_location_assignment PIN_AE7 -to HDMI_TX_D[12]
|
||||
set_location_assignment PIN_AF6 -to HDMI_TX_D[13]
|
||||
set_location_assignment PIN_AF8 -to HDMI_TX_D[14]
|
||||
set_location_assignment PIN_AF5 -to HDMI_TX_D[15]
|
||||
set_location_assignment PIN_AE4 -to HDMI_TX_D[16]
|
||||
set_location_assignment PIN_AH2 -to HDMI_TX_D[17]
|
||||
set_location_assignment PIN_AH4 -to HDMI_TX_D[18]
|
||||
set_location_assignment PIN_AH5 -to HDMI_TX_D[19]
|
||||
set_location_assignment PIN_AH6 -to HDMI_TX_D[20]
|
||||
set_location_assignment PIN_AG6 -to HDMI_TX_D[21]
|
||||
set_location_assignment PIN_AF9 -to HDMI_TX_D[22]
|
||||
set_location_assignment PIN_AE8 -to HDMI_TX_D[23]
|
||||
set_location_assignment PIN_T8 -to HDMI_TX_HS
|
||||
set_location_assignment PIN_AF11 -to HDMI_TX_INT
|
||||
set_location_assignment PIN_V13 -to HDMI_TX_VS
|
||||
|
||||
#============================================================
|
||||
# KEY
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
|
||||
set_location_assignment PIN_AH17 -to KEY[0]
|
||||
set_location_assignment PIN_AH16 -to KEY[1]
|
||||
|
||||
#============================================================
|
||||
# LED
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
|
||||
set_location_assignment PIN_W15 -to LED[0]
|
||||
set_location_assignment PIN_AA24 -to LED[1]
|
||||
set_location_assignment PIN_V16 -to LED[2]
|
||||
set_location_assignment PIN_V15 -to LED[3]
|
||||
set_location_assignment PIN_AF26 -to LED[4]
|
||||
set_location_assignment PIN_AE26 -to LED[5]
|
||||
set_location_assignment PIN_Y16 -to LED[6]
|
||||
set_location_assignment PIN_AA23 -to LED[7]
|
||||
|
||||
#============================================================
|
||||
# SW
|
||||
#============================================================
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
|
||||
set_location_assignment PIN_Y24 -to SW[0]
|
||||
set_location_assignment PIN_W24 -to SW[1]
|
||||
set_location_assignment PIN_W21 -to SW[2]
|
||||
set_location_assignment PIN_W20 -to SW[3]
|
||||
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
|
||||
|
||||
set_global_assignment -name CDF_FILE jtag.cdf
|
||||
set_global_assignment -name QIP_FILE sys/sys.qip
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE MultiComp.sv
|
||||
set_global_assignment -name VHDL_FILE Components/M6809/cpu09l.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6800/cpu68.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80s.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/UART/bufferedUART.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/sd_controller.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/image_controller.vhd
|
||||
set_global_assignment -name QIP_FILE Components/INTERNALRAM/InternalRam64K.qip
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/SBCTextDisplayRGB.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/CGABoldRom.vhd
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam1K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam2K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/CGABoldRomReduced.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6502/M6502_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6809/M6809_EXT_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_CPM_BASIC_ROM.qip
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80CPM.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6502Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6809Basic.vhd
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
661
MultiComp.qsf
661
MultiComp.qsf
@@ -1,331 +1,332 @@
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||
# Your use of Intel Corporation's design tools, logic functions
|
||||
# and other software and tools, and its AMPP partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Intel Program License
|
||||
# Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
# the Intel MegaCore Function License Agreement, or other
|
||||
# applicable license agreement, including, without limitation,
|
||||
# that your use is for the sole purpose of programming logic
|
||||
# devices manufactured by Intel and sold by Intel or its
|
||||
# authorized distributors. Please refer to the applicable
|
||||
# agreement for further details.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus Prime
|
||||
# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
|
||||
# Date created = 01:53:32 April 20, 2017
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY sys_top
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
|
||||
|
||||
set_global_assignment -name GENERATE_RBF_FILE ON
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SAVE_DISK_SPACE OFF
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
|
||||
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
|
||||
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
|
||||
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
|
||||
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
|
||||
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE ON
|
||||
set_global_assignment -name QII_AUTO_PACKED_REGISTERS NORMAL
|
||||
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
|
||||
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
|
||||
set_global_assignment -name MUX_RESTRUCTURE ON
|
||||
set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
|
||||
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
|
||||
set_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION ON
|
||||
set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON
|
||||
set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
|
||||
set_global_assignment -name ECO_OPTIMIZE_TIMING ON
|
||||
set_global_assignment -name PERIPHERY_TO_CORE_PLACEMENT_AND_ROUTING_OPTIMIZATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
|
||||
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT MEDIUM
|
||||
set_global_assignment -name SEED 1
|
||||
|
||||
#set_global_assignment -name VERILOG_MACRO "ARCADE_SYS=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_FB=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_SDRAM=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_DDRAM=1"
|
||||
|
||||
#do not enable DEBUG_NOHDMI in release!
|
||||
# set_global_assignment -name VERILOG_MACRO "DEBUG_NOHDMI=1"
|
||||
|
||||
source sys/sys.tcl
|
||||
set_global_assignment -name FAMILY "Cyclone V"
|
||||
set_global_assignment -name DEVICE 5CSEBA6U23I7
|
||||
set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
|
||||
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
|
||||
set_location_assignment PIN_U9 -to ADC_CONVST
|
||||
set_location_assignment PIN_V10 -to ADC_SCK
|
||||
set_location_assignment PIN_AC4 -to ADC_SDI
|
||||
set_location_assignment PIN_AD4 -to ADC_SDO
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ARDUINO_IO[*]
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ARDUINO_IO[*]
|
||||
set_location_assignment PIN_U14 -to IO_SCL
|
||||
set_location_assignment PIN_AG9 -to IO_SDA
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IO_S*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IO_S*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to IO_S*
|
||||
set_location_assignment PIN_AF17 -to USER_IO[6]
|
||||
set_location_assignment PIN_AF15 -to USER_IO[5]
|
||||
set_location_assignment PIN_AG16 -to USER_IO[4]
|
||||
set_location_assignment PIN_AH11 -to USER_IO[3]
|
||||
set_location_assignment PIN_AH12 -to USER_IO[2]
|
||||
set_location_assignment PIN_AH9 -to USER_IO[1]
|
||||
set_location_assignment PIN_AG11 -to USER_IO[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USER_IO[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to USER_IO[*]
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to USER_IO[*]
|
||||
set_location_assignment PIN_AH7 -to SDCD_SPDIF
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCD_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCD_SPDIF
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDCD_SPDIF
|
||||
set_location_assignment PIN_Y11 -to SDRAM_A[0]
|
||||
set_location_assignment PIN_AA26 -to SDRAM_A[1]
|
||||
set_location_assignment PIN_AA13 -to SDRAM_A[2]
|
||||
set_location_assignment PIN_AA11 -to SDRAM_A[3]
|
||||
set_location_assignment PIN_W11 -to SDRAM_A[4]
|
||||
set_location_assignment PIN_Y19 -to SDRAM_A[5]
|
||||
set_location_assignment PIN_AB23 -to SDRAM_A[6]
|
||||
set_location_assignment PIN_AC23 -to SDRAM_A[7]
|
||||
set_location_assignment PIN_AC22 -to SDRAM_A[8]
|
||||
set_location_assignment PIN_C12 -to SDRAM_A[9]
|
||||
set_location_assignment PIN_AB26 -to SDRAM_A[10]
|
||||
set_location_assignment PIN_AD17 -to SDRAM_A[11]
|
||||
set_location_assignment PIN_D12 -to SDRAM_A[12]
|
||||
set_location_assignment PIN_Y17 -to SDRAM_BA[0]
|
||||
set_location_assignment PIN_AB25 -to SDRAM_BA[1]
|
||||
set_location_assignment PIN_E8 -to SDRAM_DQ[0]
|
||||
set_location_assignment PIN_V12 -to SDRAM_DQ[1]
|
||||
set_location_assignment PIN_D11 -to SDRAM_DQ[2]
|
||||
set_location_assignment PIN_W12 -to SDRAM_DQ[3]
|
||||
set_location_assignment PIN_AH13 -to SDRAM_DQ[4]
|
||||
set_location_assignment PIN_D8 -to SDRAM_DQ[5]
|
||||
set_location_assignment PIN_AH14 -to SDRAM_DQ[6]
|
||||
set_location_assignment PIN_AF7 -to SDRAM_DQ[7]
|
||||
set_location_assignment PIN_AE24 -to SDRAM_DQ[8]
|
||||
set_location_assignment PIN_AD23 -to SDRAM_DQ[9]
|
||||
set_location_assignment PIN_AE6 -to SDRAM_DQ[10]
|
||||
set_location_assignment PIN_AE23 -to SDRAM_DQ[11]
|
||||
set_location_assignment PIN_AG14 -to SDRAM_DQ[12]
|
||||
set_location_assignment PIN_AD5 -to SDRAM_DQ[13]
|
||||
set_location_assignment PIN_AF4 -to SDRAM_DQ[14]
|
||||
set_location_assignment PIN_AH3 -to SDRAM_DQ[15]
|
||||
set_location_assignment PIN_AG13 -to SDRAM_DQML
|
||||
set_location_assignment PIN_AF13 -to SDRAM_DQMH
|
||||
set_location_assignment PIN_AD20 -to SDRAM_CLK
|
||||
set_location_assignment PIN_AG10 -to SDRAM_CKE
|
||||
set_location_assignment PIN_AA19 -to SDRAM_nWE
|
||||
set_location_assignment PIN_AA18 -to SDRAM_nCAS
|
||||
set_location_assignment PIN_Y18 -to SDRAM_nCS
|
||||
set_location_assignment PIN_W14 -to SDRAM_nRAS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM_*
|
||||
set_location_assignment PIN_AE15 -to SD_SPI_CS
|
||||
set_location_assignment PIN_AH8 -to SD_SPI_MISO
|
||||
set_location_assignment PIN_AG8 -to SD_SPI_CLK
|
||||
set_location_assignment PIN_U13 -to SD_SPI_MOSI
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SD_SPI*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_SPI*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_SPI*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
|
||||
set_location_assignment PIN_V11 -to FPGA_CLK1_50
|
||||
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
|
||||
set_location_assignment PIN_E11 -to FPGA_CLK3_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2S
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_LRCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_MCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_SCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_D[*]
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_DE
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_HS
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_VS
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_U10 -to HDMI_I2C_SCL
|
||||
set_location_assignment PIN_AA4 -to HDMI_I2C_SDA
|
||||
set_location_assignment PIN_T13 -to HDMI_I2S
|
||||
set_location_assignment PIN_T11 -to HDMI_LRCLK
|
||||
set_location_assignment PIN_U11 -to HDMI_MCLK
|
||||
set_location_assignment PIN_T12 -to HDMI_SCLK
|
||||
set_location_assignment PIN_AG5 -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_AD19 -to HDMI_TX_DE
|
||||
set_location_assignment PIN_AD12 -to HDMI_TX_D[0]
|
||||
set_location_assignment PIN_AE12 -to HDMI_TX_D[1]
|
||||
set_location_assignment PIN_W8 -to HDMI_TX_D[2]
|
||||
set_location_assignment PIN_Y8 -to HDMI_TX_D[3]
|
||||
set_location_assignment PIN_AD11 -to HDMI_TX_D[4]
|
||||
set_location_assignment PIN_AD10 -to HDMI_TX_D[5]
|
||||
set_location_assignment PIN_AE11 -to HDMI_TX_D[6]
|
||||
set_location_assignment PIN_Y5 -to HDMI_TX_D[7]
|
||||
set_location_assignment PIN_AF10 -to HDMI_TX_D[8]
|
||||
set_location_assignment PIN_Y4 -to HDMI_TX_D[9]
|
||||
set_location_assignment PIN_AE9 -to HDMI_TX_D[10]
|
||||
set_location_assignment PIN_AB4 -to HDMI_TX_D[11]
|
||||
set_location_assignment PIN_AE7 -to HDMI_TX_D[12]
|
||||
set_location_assignment PIN_AF6 -to HDMI_TX_D[13]
|
||||
set_location_assignment PIN_AF8 -to HDMI_TX_D[14]
|
||||
set_location_assignment PIN_AF5 -to HDMI_TX_D[15]
|
||||
set_location_assignment PIN_AE4 -to HDMI_TX_D[16]
|
||||
set_location_assignment PIN_AH2 -to HDMI_TX_D[17]
|
||||
set_location_assignment PIN_AH4 -to HDMI_TX_D[18]
|
||||
set_location_assignment PIN_AH5 -to HDMI_TX_D[19]
|
||||
set_location_assignment PIN_AH6 -to HDMI_TX_D[20]
|
||||
set_location_assignment PIN_AG6 -to HDMI_TX_D[21]
|
||||
set_location_assignment PIN_AF9 -to HDMI_TX_D[22]
|
||||
set_location_assignment PIN_AE8 -to HDMI_TX_D[23]
|
||||
set_location_assignment PIN_T8 -to HDMI_TX_HS
|
||||
set_location_assignment PIN_AF11 -to HDMI_TX_INT
|
||||
set_location_assignment PIN_V13 -to HDMI_TX_VS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
|
||||
set_location_assignment PIN_AH17 -to KEY[0]
|
||||
set_location_assignment PIN_AH16 -to KEY[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
|
||||
set_location_assignment PIN_W15 -to LED[0]
|
||||
set_location_assignment PIN_AA24 -to LED[1]
|
||||
set_location_assignment PIN_V16 -to LED[2]
|
||||
set_location_assignment PIN_V15 -to LED[3]
|
||||
set_location_assignment PIN_AF26 -to LED[4]
|
||||
set_location_assignment PIN_AE26 -to LED[5]
|
||||
set_location_assignment PIN_Y16 -to LED[6]
|
||||
set_location_assignment PIN_AA23 -to LED[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
|
||||
set_location_assignment PIN_Y24 -to SW[0]
|
||||
set_location_assignment PIN_W24 -to SW[1]
|
||||
set_location_assignment PIN_W21 -to SW[2]
|
||||
set_location_assignment PIN_W20 -to SW[3]
|
||||
set_hps_location_assignment HPSINTERFACEPERIPHERALSPIMASTER_X52_Y72_N111 -to spi
|
||||
set_hps_location_assignment HPSINTERFACEPERIPHERALUART_X52_Y67_N111 -to uart
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
|
||||
source sys/sys_analog.tcl
|
||||
set_location_assignment PIN_AF25 -to SDIO_DAT[0]
|
||||
set_location_assignment PIN_AF23 -to SDIO_DAT[1]
|
||||
set_location_assignment PIN_AD26 -to SDIO_DAT[2]
|
||||
set_location_assignment PIN_AF28 -to SDIO_DAT[3]
|
||||
set_location_assignment PIN_AF27 -to SDIO_CMD
|
||||
set_location_assignment PIN_AH26 -to SDIO_CLK
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD
|
||||
set_location_assignment PIN_AE17 -to VGA_R[0]
|
||||
set_location_assignment PIN_AE20 -to VGA_R[1]
|
||||
set_location_assignment PIN_AF20 -to VGA_R[2]
|
||||
set_location_assignment PIN_AH18 -to VGA_R[3]
|
||||
set_location_assignment PIN_AH19 -to VGA_R[4]
|
||||
set_location_assignment PIN_AF21 -to VGA_R[5]
|
||||
set_location_assignment PIN_AE19 -to VGA_G[0]
|
||||
set_location_assignment PIN_AG15 -to VGA_G[1]
|
||||
set_location_assignment PIN_AF18 -to VGA_G[2]
|
||||
set_location_assignment PIN_AG18 -to VGA_G[3]
|
||||
set_location_assignment PIN_AG19 -to VGA_G[4]
|
||||
set_location_assignment PIN_AG20 -to VGA_G[5]
|
||||
set_location_assignment PIN_AG21 -to VGA_B[0]
|
||||
set_location_assignment PIN_AA20 -to VGA_B[1]
|
||||
set_location_assignment PIN_AE22 -to VGA_B[2]
|
||||
set_location_assignment PIN_AF22 -to VGA_B[3]
|
||||
set_location_assignment PIN_AH23 -to VGA_B[4]
|
||||
set_location_assignment PIN_AH21 -to VGA_B[5]
|
||||
set_location_assignment PIN_AH22 -to VGA_HS
|
||||
set_location_assignment PIN_AG24 -to VGA_VS
|
||||
set_location_assignment PIN_AH27 -to VGA_EN
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_*
|
||||
set_location_assignment PIN_AC24 -to AUDIO_L
|
||||
set_location_assignment PIN_AE25 -to AUDIO_R
|
||||
set_location_assignment PIN_AG26 -to AUDIO_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_*
|
||||
set_location_assignment PIN_Y15 -to LED_USER
|
||||
set_location_assignment PIN_AA15 -to LED_HDD
|
||||
set_location_assignment PIN_AG28 -to LED_POWER
|
||||
set_location_assignment PIN_AH24 -to BTN_USER
|
||||
set_location_assignment PIN_AG25 -to BTN_OSD
|
||||
set_location_assignment PIN_AG23 -to BTN_RESET
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_*
|
||||
|
||||
set_global_assignment -name VERILOG_FILE Components/USB/spi_master_simple.v
|
||||
set_global_assignment -name VERILOG_FILE Components/USB/ch376s.v
|
||||
set_global_assignment -name CDF_FILE jtag.cdf
|
||||
set_global_assignment -name QIP_FILE sys/sys.qip
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE MultiComp.sv
|
||||
set_global_assignment -name VHDL_FILE Components/M6809/cpu09l.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/SBCTextDisplayRGB.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6800/cpu68.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80s.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/CGABoldRom.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/UART/bufferedUART.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/sd_controller.vhd
|
||||
set_global_assignment -name QIP_FILE ROMS/6502/M6502_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam1K.qip
|
||||
set_global_assignment -name CDF_FILE output_files/m6502.cdf
|
||||
set_global_assignment -name QIP_FILE Components/INTERNALRAM/InternalRam64K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam2K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/CGABoldRomReduced.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6809/M6809_EXT_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_CPM_BASIC_ROM.qip
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80CPM.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6502Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6809Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80Basic.vhd
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||
# Your use of Intel Corporation's design tools, logic functions
|
||||
# and other software and tools, and its AMPP partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Intel Program License
|
||||
# Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
# the Intel MegaCore Function License Agreement, or other
|
||||
# applicable license agreement, including, without limitation,
|
||||
# that your use is for the sole purpose of programming logic
|
||||
# devices manufactured by Intel and sold by Intel or its
|
||||
# authorized distributors. Please refer to the applicable
|
||||
# agreement for further details.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus Prime
|
||||
# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
|
||||
# Date created = 01:53:32 April 20, 2017
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY sys_top
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Standard Edition"
|
||||
|
||||
set_global_assignment -name GENERATE_RBF_FILE ON
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SAVE_DISK_SPACE OFF
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
|
||||
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
|
||||
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
|
||||
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
|
||||
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
|
||||
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE ON
|
||||
set_global_assignment -name QII_AUTO_PACKED_REGISTERS NORMAL
|
||||
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
|
||||
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
|
||||
set_global_assignment -name MUX_RESTRUCTURE ON
|
||||
set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
|
||||
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
|
||||
set_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION ON
|
||||
set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON
|
||||
set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
|
||||
set_global_assignment -name ECO_OPTIMIZE_TIMING ON
|
||||
set_global_assignment -name PERIPHERY_TO_CORE_PLACEMENT_AND_ROUTING_OPTIMIZATION ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
|
||||
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT MEDIUM
|
||||
set_global_assignment -name SEED 1
|
||||
|
||||
#set_global_assignment -name VERILOG_MACRO "ARCADE_SYS=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_FB=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_SDRAM=1"
|
||||
#set_global_assignment -name VERILOG_MACRO "USE_DDRAM=1"
|
||||
|
||||
#do not enable DEBUG_NOHDMI in release!
|
||||
# set_global_assignment -name VERILOG_MACRO "DEBUG_NOHDMI=1"
|
||||
|
||||
source sys/sys.tcl
|
||||
set_global_assignment -name FAMILY "Cyclone V"
|
||||
set_global_assignment -name DEVICE 5CSEBA6U23I7
|
||||
set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
|
||||
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
|
||||
set_location_assignment PIN_U9 -to ADC_CONVST
|
||||
set_location_assignment PIN_V10 -to ADC_SCK
|
||||
set_location_assignment PIN_AC4 -to ADC_SDI
|
||||
set_location_assignment PIN_AD4 -to ADC_SDO
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ARDUINO_IO[*]
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ARDUINO_IO[*]
|
||||
set_location_assignment PIN_U14 -to IO_SCL
|
||||
set_location_assignment PIN_AG9 -to IO_SDA
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IO_S*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IO_S*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to IO_S*
|
||||
set_location_assignment PIN_AF17 -to USER_IO[6]
|
||||
set_location_assignment PIN_AF15 -to USER_IO[5]
|
||||
set_location_assignment PIN_AG16 -to USER_IO[4]
|
||||
set_location_assignment PIN_AH11 -to USER_IO[3]
|
||||
set_location_assignment PIN_AH12 -to USER_IO[2]
|
||||
set_location_assignment PIN_AH9 -to USER_IO[1]
|
||||
set_location_assignment PIN_AG11 -to USER_IO[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USER_IO[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to USER_IO[*]
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to USER_IO[*]
|
||||
set_location_assignment PIN_AH7 -to SDCD_SPDIF
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCD_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCD_SPDIF
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDCD_SPDIF
|
||||
set_location_assignment PIN_Y11 -to SDRAM_A[0]
|
||||
set_location_assignment PIN_AA26 -to SDRAM_A[1]
|
||||
set_location_assignment PIN_AA13 -to SDRAM_A[2]
|
||||
set_location_assignment PIN_AA11 -to SDRAM_A[3]
|
||||
set_location_assignment PIN_W11 -to SDRAM_A[4]
|
||||
set_location_assignment PIN_Y19 -to SDRAM_A[5]
|
||||
set_location_assignment PIN_AB23 -to SDRAM_A[6]
|
||||
set_location_assignment PIN_AC23 -to SDRAM_A[7]
|
||||
set_location_assignment PIN_AC22 -to SDRAM_A[8]
|
||||
set_location_assignment PIN_C12 -to SDRAM_A[9]
|
||||
set_location_assignment PIN_AB26 -to SDRAM_A[10]
|
||||
set_location_assignment PIN_AD17 -to SDRAM_A[11]
|
||||
set_location_assignment PIN_D12 -to SDRAM_A[12]
|
||||
set_location_assignment PIN_Y17 -to SDRAM_BA[0]
|
||||
set_location_assignment PIN_AB25 -to SDRAM_BA[1]
|
||||
set_location_assignment PIN_E8 -to SDRAM_DQ[0]
|
||||
set_location_assignment PIN_V12 -to SDRAM_DQ[1]
|
||||
set_location_assignment PIN_D11 -to SDRAM_DQ[2]
|
||||
set_location_assignment PIN_W12 -to SDRAM_DQ[3]
|
||||
set_location_assignment PIN_AH13 -to SDRAM_DQ[4]
|
||||
set_location_assignment PIN_D8 -to SDRAM_DQ[5]
|
||||
set_location_assignment PIN_AH14 -to SDRAM_DQ[6]
|
||||
set_location_assignment PIN_AF7 -to SDRAM_DQ[7]
|
||||
set_location_assignment PIN_AE24 -to SDRAM_DQ[8]
|
||||
set_location_assignment PIN_AD23 -to SDRAM_DQ[9]
|
||||
set_location_assignment PIN_AE6 -to SDRAM_DQ[10]
|
||||
set_location_assignment PIN_AE23 -to SDRAM_DQ[11]
|
||||
set_location_assignment PIN_AG14 -to SDRAM_DQ[12]
|
||||
set_location_assignment PIN_AD5 -to SDRAM_DQ[13]
|
||||
set_location_assignment PIN_AF4 -to SDRAM_DQ[14]
|
||||
set_location_assignment PIN_AH3 -to SDRAM_DQ[15]
|
||||
set_location_assignment PIN_AG13 -to SDRAM_DQML
|
||||
set_location_assignment PIN_AF13 -to SDRAM_DQMH
|
||||
set_location_assignment PIN_AD20 -to SDRAM_CLK
|
||||
set_location_assignment PIN_AG10 -to SDRAM_CKE
|
||||
set_location_assignment PIN_AA19 -to SDRAM_nWE
|
||||
set_location_assignment PIN_AA18 -to SDRAM_nCAS
|
||||
set_location_assignment PIN_Y18 -to SDRAM_nCS
|
||||
set_location_assignment PIN_W14 -to SDRAM_nRAS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_*
|
||||
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
|
||||
set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM_*
|
||||
set_location_assignment PIN_AE15 -to SD_SPI_CS
|
||||
set_location_assignment PIN_AH8 -to SD_SPI_MISO
|
||||
set_location_assignment PIN_AG8 -to SD_SPI_CLK
|
||||
set_location_assignment PIN_U13 -to SD_SPI_MOSI
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SD_SPI*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_SPI*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_SPI*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
|
||||
set_location_assignment PIN_V11 -to FPGA_CLK1_50
|
||||
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
|
||||
set_location_assignment PIN_E11 -to FPGA_CLK3_50
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2C_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_I2S
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_LRCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_MCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_SCLK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HDMI_TX_*
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_D[*]
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_DE
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_HS
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_VS
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_U10 -to HDMI_I2C_SCL
|
||||
set_location_assignment PIN_AA4 -to HDMI_I2C_SDA
|
||||
set_location_assignment PIN_T13 -to HDMI_I2S
|
||||
set_location_assignment PIN_T11 -to HDMI_LRCLK
|
||||
set_location_assignment PIN_U11 -to HDMI_MCLK
|
||||
set_location_assignment PIN_T12 -to HDMI_SCLK
|
||||
set_location_assignment PIN_AG5 -to HDMI_TX_CLK
|
||||
set_location_assignment PIN_AD19 -to HDMI_TX_DE
|
||||
set_location_assignment PIN_AD12 -to HDMI_TX_D[0]
|
||||
set_location_assignment PIN_AE12 -to HDMI_TX_D[1]
|
||||
set_location_assignment PIN_W8 -to HDMI_TX_D[2]
|
||||
set_location_assignment PIN_Y8 -to HDMI_TX_D[3]
|
||||
set_location_assignment PIN_AD11 -to HDMI_TX_D[4]
|
||||
set_location_assignment PIN_AD10 -to HDMI_TX_D[5]
|
||||
set_location_assignment PIN_AE11 -to HDMI_TX_D[6]
|
||||
set_location_assignment PIN_Y5 -to HDMI_TX_D[7]
|
||||
set_location_assignment PIN_AF10 -to HDMI_TX_D[8]
|
||||
set_location_assignment PIN_Y4 -to HDMI_TX_D[9]
|
||||
set_location_assignment PIN_AE9 -to HDMI_TX_D[10]
|
||||
set_location_assignment PIN_AB4 -to HDMI_TX_D[11]
|
||||
set_location_assignment PIN_AE7 -to HDMI_TX_D[12]
|
||||
set_location_assignment PIN_AF6 -to HDMI_TX_D[13]
|
||||
set_location_assignment PIN_AF8 -to HDMI_TX_D[14]
|
||||
set_location_assignment PIN_AF5 -to HDMI_TX_D[15]
|
||||
set_location_assignment PIN_AE4 -to HDMI_TX_D[16]
|
||||
set_location_assignment PIN_AH2 -to HDMI_TX_D[17]
|
||||
set_location_assignment PIN_AH4 -to HDMI_TX_D[18]
|
||||
set_location_assignment PIN_AH5 -to HDMI_TX_D[19]
|
||||
set_location_assignment PIN_AH6 -to HDMI_TX_D[20]
|
||||
set_location_assignment PIN_AG6 -to HDMI_TX_D[21]
|
||||
set_location_assignment PIN_AF9 -to HDMI_TX_D[22]
|
||||
set_location_assignment PIN_AE8 -to HDMI_TX_D[23]
|
||||
set_location_assignment PIN_T8 -to HDMI_TX_HS
|
||||
set_location_assignment PIN_AF11 -to HDMI_TX_INT
|
||||
set_location_assignment PIN_V13 -to HDMI_TX_VS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
|
||||
set_location_assignment PIN_AH17 -to KEY[0]
|
||||
set_location_assignment PIN_AH16 -to KEY[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
|
||||
set_location_assignment PIN_W15 -to LED[0]
|
||||
set_location_assignment PIN_AA24 -to LED[1]
|
||||
set_location_assignment PIN_V16 -to LED[2]
|
||||
set_location_assignment PIN_V15 -to LED[3]
|
||||
set_location_assignment PIN_AF26 -to LED[4]
|
||||
set_location_assignment PIN_AE26 -to LED[5]
|
||||
set_location_assignment PIN_Y16 -to LED[6]
|
||||
set_location_assignment PIN_AA23 -to LED[7]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
|
||||
set_location_assignment PIN_Y24 -to SW[0]
|
||||
set_location_assignment PIN_W24 -to SW[1]
|
||||
set_location_assignment PIN_W21 -to SW[2]
|
||||
set_location_assignment PIN_W20 -to SW[3]
|
||||
set_hps_location_assignment HPSINTERFACEPERIPHERALSPIMASTER_X52_Y72_N111 -to spi
|
||||
set_hps_location_assignment HPSINTERFACEPERIPHERALUART_X52_Y67_N111 -to uart
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
|
||||
source sys/sys_analog.tcl
|
||||
set_location_assignment PIN_AF25 -to SDIO_DAT[0]
|
||||
set_location_assignment PIN_AF23 -to SDIO_DAT[1]
|
||||
set_location_assignment PIN_AD26 -to SDIO_DAT[2]
|
||||
set_location_assignment PIN_AF28 -to SDIO_DAT[3]
|
||||
set_location_assignment PIN_AF27 -to SDIO_CMD
|
||||
set_location_assignment PIN_AH26 -to SDIO_CLK
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*]
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD
|
||||
set_location_assignment PIN_AE17 -to VGA_R[0]
|
||||
set_location_assignment PIN_AE20 -to VGA_R[1]
|
||||
set_location_assignment PIN_AF20 -to VGA_R[2]
|
||||
set_location_assignment PIN_AH18 -to VGA_R[3]
|
||||
set_location_assignment PIN_AH19 -to VGA_R[4]
|
||||
set_location_assignment PIN_AF21 -to VGA_R[5]
|
||||
set_location_assignment PIN_AE19 -to VGA_G[0]
|
||||
set_location_assignment PIN_AG15 -to VGA_G[1]
|
||||
set_location_assignment PIN_AF18 -to VGA_G[2]
|
||||
set_location_assignment PIN_AG18 -to VGA_G[3]
|
||||
set_location_assignment PIN_AG19 -to VGA_G[4]
|
||||
set_location_assignment PIN_AG20 -to VGA_G[5]
|
||||
set_location_assignment PIN_AG21 -to VGA_B[0]
|
||||
set_location_assignment PIN_AA20 -to VGA_B[1]
|
||||
set_location_assignment PIN_AE22 -to VGA_B[2]
|
||||
set_location_assignment PIN_AF22 -to VGA_B[3]
|
||||
set_location_assignment PIN_AH23 -to VGA_B[4]
|
||||
set_location_assignment PIN_AH21 -to VGA_B[5]
|
||||
set_location_assignment PIN_AH22 -to VGA_HS
|
||||
set_location_assignment PIN_AG24 -to VGA_VS
|
||||
set_location_assignment PIN_AH27 -to VGA_EN
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_*
|
||||
set_location_assignment PIN_AC24 -to AUDIO_L
|
||||
set_location_assignment PIN_AE25 -to AUDIO_R
|
||||
set_location_assignment PIN_AG26 -to AUDIO_SPDIF
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_*
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_*
|
||||
set_location_assignment PIN_Y15 -to LED_USER
|
||||
set_location_assignment PIN_AA15 -to LED_HDD
|
||||
set_location_assignment PIN_AG28 -to LED_POWER
|
||||
set_location_assignment PIN_AH24 -to BTN_USER
|
||||
set_location_assignment PIN_AG25 -to BTN_OSD
|
||||
set_location_assignment PIN_AG23 -to BTN_RESET
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_*
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_*
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_*
|
||||
|
||||
set_global_assignment -name VERILOG_FILE Components/USB/spi_master_simple.v
|
||||
set_global_assignment -name VERILOG_FILE Components/USB/ch376s.v
|
||||
set_global_assignment -name CDF_FILE jtag.cdf
|
||||
set_global_assignment -name QIP_FILE sys/sys.qip
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE MultiComp.sv
|
||||
set_global_assignment -name VHDL_FILE Components/M6809/cpu09l.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/SBCTextDisplayRGB.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6800/cpu68.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80s.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/Z80/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/TERMINAL/CGABoldRom.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/UART/bufferedUART.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/M6502/T65.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/sd_controller.vhd
|
||||
set_global_assignment -name VHDL_FILE Components/SDCARD/image_controller.vhd
|
||||
set_global_assignment -name QIP_FILE ROMS/6502/M6502_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam1K.qip
|
||||
set_global_assignment -name CDF_FILE output_files/m6502.cdf
|
||||
set_global_assignment -name QIP_FILE Components/INTERNALRAM/InternalRam64K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/DisplayRam2K.qip
|
||||
set_global_assignment -name QIP_FILE Components/TERMINAL/CGABoldRomReduced.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/6809/M6809_EXT_BASIC_ROM.qip
|
||||
set_global_assignment -name QIP_FILE ROMS/Z80/Z80_CPM_BASIC_ROM.qip
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80CPM.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6502Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE Microcomputer6809Basic.vhd
|
||||
set_global_assignment -name VHDL_FILE MicrocomputerZ80Basic.vhd
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
BIN
MultiComp.qws
BIN
MultiComp.qws
Binary file not shown.
204
MultiComp.sv
204
MultiComp.sv
@@ -159,15 +159,13 @@ module emu
|
||||
);
|
||||
|
||||
assign ADC_BUS = 'Z;
|
||||
assign {SD_SCK, SD_MOSI, SD_CS} = 'Z;
|
||||
//assign {SD_SCK, SD_MOSI, SD_CS} = 'Z;
|
||||
assign {SDRAM_DQ, SDRAM_A, SDRAM_BA, SDRAM_CLK, SDRAM_CKE, SDRAM_DQML, SDRAM_DQMH, SDRAM_nWE, SDRAM_nCAS, SDRAM_nRAS, SDRAM_nCS} = 'Z;
|
||||
assign {DDRAM_CLK, DDRAM_BURSTCNT, DDRAM_ADDR, DDRAM_DIN, DDRAM_BE, DDRAM_RD, DDRAM_WE} = 0;
|
||||
|
||||
assign UART_RTS = UART_CTS;
|
||||
assign UART_DTR = UART_DSR;
|
||||
|
||||
assign LED_USER = vsd_sel & sd_act;
|
||||
assign LED_DISK = ~driveLED;
|
||||
assign LED_POWER = 0;
|
||||
assign BUTTONS = 0;
|
||||
|
||||
@@ -184,15 +182,22 @@ assign AUDIO_MIX = 0;
|
||||
// enable input on USER_IO[3] for ch376s MISO
|
||||
assign USER_OUT[3] = 1'b1;
|
||||
|
||||
// enable input on USER_IO[0] for UART i.e. USER_IN[0] rx
|
||||
assign USER_OUT[0] = 1'b1;
|
||||
|
||||
`include "build_id.v"
|
||||
localparam CONF_STR = {
|
||||
"MultiComp;;",
|
||||
"S,IMG;",
|
||||
"OE,Reset after Mount,No,Yes;",
|
||||
"OF,Reset after Mount,No,Yes;", // 15
|
||||
"-;",
|
||||
"O78,CPU-ROM,Z80-CP/M,Z80-BASIC,6502-Basic,6809-Basic;",
|
||||
"O78,CPU-ROM,Z80-CP/M,Z80-BASIC,6502-Basic,6809-Basic;", // 7,8
|
||||
"-;",
|
||||
"RA,Reset;",
|
||||
"O9B,Baud Rate tty,115200,38400,19200,9600,4800,2400;", // 9,10,11
|
||||
"OC,Serial Port,UART,USER_IO;", // 12 Add serial port selection
|
||||
"OD,Storage Controller,SD Controller,Image Controller;", // 13 Select storage controller
|
||||
"-;",
|
||||
"RE,Reset;", // 14
|
||||
"V,v",`BUILD_DATE
|
||||
};
|
||||
|
||||
@@ -265,54 +270,86 @@ pll pll
|
||||
|
||||
///////////////// RESET /////////////////////////
|
||||
|
||||
wire reset = RESET | status[0] | buttons[1] | status[10] | (status[14] && img_mounted);
|
||||
wire reset = RESET | status[0] | buttons[1] | status[14] | (status[15] && img_mounted);
|
||||
|
||||
///////////////// SDCARD ////////////////////////
|
||||
|
||||
wire sdclk;
|
||||
wire sdmosi;
|
||||
wire sdmiso = vsd_sel ? vsdmiso : SD_MISO;
|
||||
wire sdss;
|
||||
// SD card interface signal declarations
|
||||
// _sd suffix for SD controller signals
|
||||
// _img suffix for image controller signals
|
||||
// _mux suffix for multiplexed signals
|
||||
wire sdclk_sd, sdmosi_sd, sdcs_sd; // SD controller outputs
|
||||
wire sdclk_img, sdmosi_img, sdcs_img; // Image controller outputs
|
||||
wire driveLED_sd, driveLED_img; // Drive activity indicators
|
||||
|
||||
wire vsdmiso;
|
||||
// Multiplexed signals that route to physical SD interface
|
||||
wire sdclk_mux, sdmosi_mux, sdcs_mux; // Multiplexed control signals
|
||||
wire sdmiso_mux; // Multiplexed data input
|
||||
wire driveLED_mux; // Multiplexed activity indicator
|
||||
|
||||
// Controller selection - determines which controller drives SD interface
|
||||
wire sd_ctrl_sel = status[14]; // 0=SD controller, 1=image controller
|
||||
|
||||
// Multiplex between SD and image controller outputs
|
||||
assign sdclk_mux = sd_ctrl_sel ? sdclk_img : sdclk_sd; // Clock output
|
||||
assign sdmosi_mux = sd_ctrl_sel ? sdmosi_img : sdmosi_sd; // Data output to SD
|
||||
assign sdcs_mux = sd_ctrl_sel ? sdcs_img : sdcs_sd; // Chip select
|
||||
assign driveLED_mux = sd_ctrl_sel ? driveLED_img : driveLED_sd; // Activity LED
|
||||
|
||||
// MISO input routing - selects between SD card and virtual SD based on vsd_sel
|
||||
assign sdmiso_mux = vsd_sel ? vsdmiso : SD_MISO;
|
||||
|
||||
// Virtual SD interface enable
|
||||
reg vsd_sel = 0;
|
||||
|
||||
always @(posedge clk_sys) if(img_mounted) vsd_sel <= |img_size;
|
||||
|
||||
// Map multiplexed signals to physical SD interface
|
||||
// High-Z when virtual SD not selected
|
||||
// old code
|
||||
//assign SD_SCK = vsd_sel ? sdclk_mux : 1'bZ; // SD clock
|
||||
//assign SD_MOSI = vsd_sel ? sdmosi_mux : 1'bZ; // SD data out
|
||||
//assign SD_CS = vsd_sel ? sdcs_mux : 1'bZ; // SD chip select
|
||||
|
||||
// Keep physical SD enabled when using SD controller
|
||||
assign SD_SCK = (vsd_sel || !sd_ctrl_sel) ? sdclk_mux : 1'bZ;
|
||||
assign SD_MOSI = (vsd_sel || !sd_ctrl_sel) ? sdmosi_mux : 1'bZ;
|
||||
assign SD_CS = (vsd_sel || !sd_ctrl_sel) ? sdcs_mux : 1'bZ;
|
||||
|
||||
// Virtual SD card implementation
|
||||
sd_card sd_card
|
||||
(
|
||||
.*,
|
||||
|
||||
.clk_spi(clk_sys),
|
||||
.sdhc(1),
|
||||
.sck(sdclk),
|
||||
.ss(sdss | ~vsd_sel),
|
||||
.mosi(sdmosi),
|
||||
.miso(vsdmiso)
|
||||
.*,
|
||||
.clk_spi(clk_sys),
|
||||
.sdhc(1),
|
||||
.sck(sdclk_mux),
|
||||
.ss(sdcs_mux | ~vsd_sel),
|
||||
.mosi(sdmosi_mux),
|
||||
.miso(vsdmiso)
|
||||
);
|
||||
|
||||
assign SD_CS = sdss | vsd_sel;
|
||||
assign SD_SCK = sdclk & ~vsd_sel;
|
||||
assign SD_MOSI = sdmosi & ~vsd_sel;
|
||||
|
||||
// Drive activity detection
|
||||
reg sd_act;
|
||||
|
||||
always @(posedge clk_sys) begin
|
||||
reg old_mosi, old_miso;
|
||||
integer timeout = 0;
|
||||
reg old_mosi, old_miso;
|
||||
integer timeout = 0;
|
||||
|
||||
old_mosi <= sdmosi;
|
||||
old_miso <= sdmiso;
|
||||
old_mosi <= sdmosi_mux;
|
||||
old_miso <= sdmiso_mux;
|
||||
|
||||
sd_act <= 0;
|
||||
if(timeout < 1000000) begin
|
||||
timeout <= timeout + 1;
|
||||
sd_act <= 1;
|
||||
end
|
||||
sd_act <= 0;
|
||||
if(timeout < 1000000) begin
|
||||
timeout <= timeout + 1;
|
||||
sd_act <= 1;
|
||||
end
|
||||
|
||||
if((old_mosi ^ sdmosi) || (old_miso ^ sdmiso)) timeout <= 0;
|
||||
if((old_mosi ^ sdmosi_mux) || (old_miso ^ sdmiso_mux)) timeout <= 0;
|
||||
end
|
||||
|
||||
// Map drive LED to system LED output
|
||||
assign LED_USER = vsd_sel & sd_act;
|
||||
assign LED_DISK = {2{~driveLED_mux}};
|
||||
|
||||
|
||||
///////////////////////////////////////////////////
|
||||
|
||||
assign CLK_VIDEO = clk_sys;
|
||||
@@ -320,10 +357,12 @@ assign CLK_VIDEO = clk_sys;
|
||||
typedef enum {cpuZ80CPM='b00, cpuZ80Basic='b01, cpu6502Basic='b10, cpu6809Basic='b11} cpu_type_enum;
|
||||
wire [1:0] cpu_type = status[8:7];
|
||||
|
||||
typedef enum {baud115200='b000, baud38400='b001, baud19200='b010, baud9600='b011, baud4800='b100, baud2400='b101} baud_rate_enum;
|
||||
wire [2:0] baud_rate = status[11:9];
|
||||
|
||||
wire hblank, vblank;
|
||||
wire hs, vs;
|
||||
wire [1:0] r,g,b;
|
||||
wire driveLED;
|
||||
|
||||
wire [3:0] _hblank, _vblank;
|
||||
wire [3:0] _hs, _vs;
|
||||
@@ -335,22 +374,38 @@ wire [3:0] _SD_MOSI;
|
||||
wire [3:0] _SD_SCK;
|
||||
wire [3:0] _txd[3:0];
|
||||
|
||||
wire serial_rx = (status[12] ? USER_IN[0] : UART_RXD);
|
||||
wire serial_tx;
|
||||
assign UART_TXD = status[12] ? 1'b1 : serial_tx;
|
||||
assign USER_OUT[1] = status[12] ? serial_tx : 1'b1;
|
||||
|
||||
always_comb
|
||||
begin
|
||||
hblank <= _hblank[cpu_type];
|
||||
vblank <= _vblank[cpu_type];
|
||||
hs <= _hs[cpu_type];
|
||||
vs <= _vs[cpu_type];
|
||||
r <= _r[cpu_type][1:0];
|
||||
g <= _g[cpu_type][1:0];
|
||||
b <= _b[cpu_type][1:0];
|
||||
CE_PIXEL <= _CE_PIXEL[cpu_type];
|
||||
sdss <= _SD_CS[cpu_type];
|
||||
sdmosi <= _SD_MOSI[cpu_type];
|
||||
sdclk <= _SD_SCK[cpu_type];
|
||||
driveLED <= _driveLED[cpu_type];
|
||||
UART_TXD <= _txd[cpu_type];
|
||||
hblank <= _hblank[cpu_type];
|
||||
vblank <= _vblank[cpu_type];
|
||||
hs <= _hs[cpu_type];
|
||||
vs <= _vs[cpu_type];
|
||||
r <= _r[cpu_type][1:0];
|
||||
g <= _g[cpu_type][1:0];
|
||||
b <= _b[cpu_type][1:0];
|
||||
CE_PIXEL <= _CE_PIXEL[cpu_type];
|
||||
serial_tx <= _txd[cpu_type];
|
||||
end
|
||||
|
||||
// Add baud rate selection logic - add this before the microcomputer instances:
|
||||
reg [15:0] baud_increment;
|
||||
always @(*) begin
|
||||
case(baud_rate)
|
||||
baud115200: baud_increment = 16'd2416; // 115200
|
||||
baud38400: baud_increment = 16'd805; // 38400
|
||||
baud19200: baud_increment = 16'd403; // 19200
|
||||
baud9600: baud_increment = 16'd201; // 9600
|
||||
baud4800: baud_increment = 16'd101; // 4800
|
||||
baud2400: baud_increment = 16'd50; // 2400
|
||||
default: baud_increment = 16'd2416; // Default to 115200
|
||||
endcase
|
||||
end
|
||||
|
||||
/*
|
||||
reg [6:0] test;
|
||||
reg [4:0] mycnt;
|
||||
@@ -376,25 +431,27 @@ end
|
||||
*/
|
||||
MicrocomputerZ80CPM MicrocomputerZ80CPM
|
||||
(
|
||||
.N_RESET (~reset & cpu_type == cpuZ80CPM),
|
||||
.clk (cpu_type == cpuZ80CPM ? clk_sys : 0),
|
||||
.R (_r[0][1:0]),
|
||||
.G (_g[0][1:0]),
|
||||
.B (_b[0][1:0]),
|
||||
.HS (_hs[0]),
|
||||
.VS (_vs[0]),
|
||||
.hBlank (_hblank[0]),
|
||||
.vBlank (_vblank[0]),
|
||||
.cepix (_CE_PIXEL[0]),
|
||||
.ps2Clk (PS2_CLK),
|
||||
.ps2Data (PS2_DAT),
|
||||
.sdCS (_SD_CS[0]),
|
||||
.sdMOSI (_SD_MOSI[0]),
|
||||
.sdMISO (sdmiso),
|
||||
.sdSCLK (_SD_SCK[0]),
|
||||
.driveLED (_driveLED[0]),
|
||||
.rxd1 (UART_RXD),
|
||||
.txd1 (_txd[0]),
|
||||
.N_RESET(~reset & cpu_type == cpuZ80CPM),
|
||||
.clk(cpu_type == cpuZ80CPM ? clk_sys : 0),
|
||||
.baud_increment(baud_increment),
|
||||
.R(_r[0][1:0]),
|
||||
.G(_g[0][1:0]),
|
||||
.B(_b[0][1:0]),
|
||||
.HS(_hs[0]),
|
||||
.VS(_vs[0]),
|
||||
.hBlank(_hblank[0]),
|
||||
.vBlank(_vblank[0]),
|
||||
.cepix(_CE_PIXEL[0]),
|
||||
.ps2Clk(PS2_CLK),
|
||||
.ps2Data(PS2_DAT),
|
||||
.sdCS(sdcs_sd), // SD controller chip select output
|
||||
.sdMOSI(sdmosi_sd), // SD controller data output
|
||||
.sdMISO(sdmiso_mux), // Multiplexed SD data input
|
||||
.sdSCLK(sdclk_sd), // SD controller clock output
|
||||
.driveLED(driveLED_sd),
|
||||
.sd_ctrl_sel(sd_ctrl_sel),
|
||||
.rxd1(serial_rx),
|
||||
.txd1(_txd[0]),
|
||||
// CH376s via USERIO
|
||||
.usbSCLK (USER_OUT[2]),
|
||||
.usbMISO (USER_IN[3]),
|
||||
@@ -406,6 +463,7 @@ MicrocomputerZ80Basic MicrocomputerZ80Basic
|
||||
(
|
||||
.N_RESET(~reset & cpu_type == cpuZ80Basic),
|
||||
.clk(cpu_type == cpuZ80Basic ? clk_sys : 0),
|
||||
.baud_increment(baud_increment),
|
||||
.R(_r[1][1:0]),
|
||||
.G(_g[1][1:0]),
|
||||
.B(_b[1][1:0]),
|
||||
@@ -421,7 +479,7 @@ MicrocomputerZ80Basic MicrocomputerZ80Basic
|
||||
.sdMISO(sdmiso),
|
||||
.sdSCLK(_SD_SCK[1]),
|
||||
.driveLED(_driveLED[1]),
|
||||
.rxd1 (UART_RXD),
|
||||
.rxd1 (serial_rx),
|
||||
.txd1 (_txd[1])
|
||||
);
|
||||
|
||||
@@ -429,6 +487,7 @@ Microcomputer6502Basic Microcomputer6502Basic
|
||||
(
|
||||
.N_RESET(~reset & cpu_type == cpu6502Basic),
|
||||
.clk(cpu_type == cpu6502Basic ? clk_sys : 0),
|
||||
.baud_increment(baud_increment),
|
||||
.R(_r[2][1:0]),
|
||||
.G(_g[2][1:0]),
|
||||
.B(_b[2][1:0]),
|
||||
@@ -444,7 +503,7 @@ Microcomputer6502Basic Microcomputer6502Basic
|
||||
.sdMISO(sdmiso),
|
||||
.sdSCLK(_SD_SCK[2]),
|
||||
.driveLED(_driveLED[2]),
|
||||
.rxd1 (UART_RXD),
|
||||
.rxd1 (serial_rx),
|
||||
.txd1 (_txd[2])
|
||||
);
|
||||
|
||||
@@ -453,6 +512,7 @@ Microcomputer6809Basic Microcomputer6809Basic
|
||||
(
|
||||
.N_RESET(~reset & cpu_type == cpu6809Basic),
|
||||
.clk(cpu_type == cpu6809Basic ? clk_sys : 0),
|
||||
.baud_increment(baud_increment),
|
||||
.R(_r[3][1:0]),
|
||||
.G(_g[3][1:0]),
|
||||
.B(_b[3][1:0]),
|
||||
@@ -468,7 +528,7 @@ Microcomputer6809Basic Microcomputer6809Basic
|
||||
.sdMISO(sdmiso),
|
||||
.sdSCLK(_SD_SCK[3]),
|
||||
.driveLED(_driveLED[3]),
|
||||
.rxd1 (UART_RXD),
|
||||
.rxd1 (serial_rx),
|
||||
.txd1 (_txd[3])
|
||||
);
|
||||
|
||||
|
||||
64
README.md
64
README.md
@@ -1,4 +1,4 @@
|
||||
MISTer MultiComp
|
||||
MiSTer MultiComp
|
||||
================
|
||||
|
||||
Port of Grant Searle's MultiComp to the MiSTer.
|
||||
@@ -12,9 +12,12 @@ UART connected to serial interface 2 of the core. The latter allows to use the c
|
||||
|
||||
### Connection Methods
|
||||
|
||||
1. USB: Connect the console port from the MiSTer FPGA to your computer using a USB cable.
|
||||
1. USB: Connect the console port from the MiSTer FPGA to your computer using a USB cable.
|
||||
|
||||
2. Network: Use SSH to connect to the MiSTer FPGA if you have a Wireless or Ethernet connection.
|
||||
|
||||
3. USB/Serial cable: For more information see the Serial Port section of the Altair8800_MiSTer repository: <https://github.com/MiSTer-devel/Altair8800_MiSTer>
|
||||
|
||||
### Setting Up the Connection
|
||||
|
||||
#### For UART/Serial with PuTTY
|
||||
@@ -23,7 +26,7 @@ UART connected to serial interface 2 of the core. The latter allows to use the c
|
||||
|
||||
#### For SSH with PuTTY
|
||||
|
||||
- Connect to the ip address of your MISTer fpga.
|
||||
- Connect to the ip address of your MiSTer fpga.
|
||||
|
||||
#### Linux command line to establish the connection to the core
|
||||
|
||||
@@ -49,7 +52,7 @@ UART connected to serial interface 2 of the core. The latter allows to use the c
|
||||
### Additional Information
|
||||
|
||||
For more details on console connection, refer to the official MiSTer documentation:
|
||||
[MiSTer Console Connection Guide](https://mister-devel.github.io/MkDocs_MiSTer/advanced/console/)
|
||||
[MiSTer Console Connection Guide](https://MiSTer-devel.github.io/MkDocs_MiSTer/advanced/console/)
|
||||
|
||||
## The MiSTer OSD allows the access to four machines
|
||||
|
||||
@@ -103,7 +106,6 @@ Note that currently the `DOWNLOAD.COM` program is not working reliably (we hope
|
||||
|
||||
In the CPM-sd-image directory, you will find a zip file that contains a cmp.img file that can be copied to the /media/fat/games/MultipComp directory. This file can be used to boot CP/M without the SD card. It contains the structure for disks A thru P with A having the DOWNLOAD program and other utilities available. Use this as a strating point to place CP/M applications on the image. See the Installing Applications section at <http://searle.x10host.com/Multicomp/cpm/fpgaCPM.html#InstallingCPM>.
|
||||
|
||||
|
||||
Note the process for this is mostly described in PART 2 - Using the Windows packager program. The packager program is in windowsApp. Again, this process requires the use of the tty terminal not the console, as you will be pasting the file data into the terminal.
|
||||
|
||||
We have also added a zip file in the CPM-sd-image directory with a set of application pre installed. See cpm-apps.zip. This file can also be copied to the /media/fat/games/MultipComp directory and mounted. It contains 5 drives A,C,D,E, and F where A still only has the DOWNLOAD program and the other drives contain the following. The cpm.zip file contains just the basic utilities described in the [CPM-sd-image](CPM-sd-image/README.MD) directory.
|
||||
@@ -119,15 +121,14 @@ We have also added a zip file in the CPM-sd-image directory with a set of applic
|
||||
| 6_SYSLIB | 6_RCPM | 6_ALGOLM | 6_DWG_APPS |
|
||||
| 7_BBC BASIC | 7_DDTZ SOURCES | 7_SUPERCALC | 8_MICROSHELL |
|
||||
|
||||
|
||||
Note the use of user numbers here i.e. 0_, 1_ etc..
|
||||
(Not all the applications were tested to run, so you are on your own)
|
||||
|
||||
The applications were obtained from the Obsolescence Guaranteed site.
|
||||
|
||||
Included in the CPM-sd-image directory are also some python scripts to initialize/build the image for the CP/M disks. Along with a script in the transient packages directory that can extract the .COM files from the package (note this was used to provide some content to build the cpm.img file provided in CPM-sd-image).
|
||||
Included in the CPM-sd-image directory are also some python scripts to initialize/build the image for the CP/M disks. Along with a script in the transient packages directory that can extract the .COM files from the package (note this was used to provide some content to build the cpm.img file provided in CPM-sd-image directory).
|
||||
|
||||
To use the Python scripts we recommend using Visual Studio Code and opening the MultiComp_MiSTer directory as its project location.
|
||||
To use the Python scripts we recommend using Visual Studio Code and opening the MultiComp_MiSTer directory as its project location. Them just run the Python scripts from within Visual Studio Code.
|
||||
|
||||
__Other useful links.__
|
||||
|
||||
@@ -140,6 +141,8 @@ After you have flashed the CP/M Demo Disk to the SD Card you will have to use th
|
||||
Using CP/M - from Grant Searle website:
|
||||
<http://searle.x10host.com/Multicomp/cpm/fpgaCPM.html>
|
||||
|
||||
DeRamp - This website focuses on early personal computers from the mid 70s into the early 80s. Here you'll find resources for restoring and maintaining many of the great computers and peripherals from this era, in addition it has a Downloads section where you can find the bits for many applications. <https://deramp.com/>
|
||||
|
||||
### Z80 Basic
|
||||
|
||||
SGN, INT, ABS ,USR, FRE, INP, POS, SQR, RND ,LOG, EXP, COS, SIN, TAN, ATN, PEEK ,DEEK ,LEN, STR$, VAL ,ASC, CHR$ ,LEFT$,
|
||||
@@ -172,6 +175,51 @@ LOG, SQR, HEX$, VARPTR, INSTR, STRING$, MID$ (MODIFICATION), POS
|
||||
|
||||
<http://searle.x10host.com/Multicomp/#BASICKeywords>
|
||||
|
||||
# MultiComp OSD Configuration
|
||||
|
||||
This section describes the On-Screen Display menu configuration for the MultiComp system, providing control over CPU selection, storage, and communication parameters.
|
||||
|
||||
## Menu Structure
|
||||
|
||||
#### System Control
|
||||
|
||||
- __Reset after Mount__: Configures system behavior after mounting storage
|
||||
- Options: No, Yes
|
||||
- __Reset__: System reset function
|
||||
|
||||
#### CPU and ROM Configuration
|
||||
|
||||
- __CPU-ROM Selection__:
|
||||
- Z80 with CP/M
|
||||
- Z80 with BASIC
|
||||
- 6502 with BASIC
|
||||
- 6809 with BASIC
|
||||
|
||||
#### Communication Settings
|
||||
|
||||
- __Baud Rate__:
|
||||
- 115200
|
||||
- 38400
|
||||
- 19200
|
||||
- 9600
|
||||
- 4800
|
||||
- 2400
|
||||
- __Serial Port__:
|
||||
- UART - use the MiSTer console port
|
||||
- USER_IO - use the MiSTer user I/O USB 3.1 port
|
||||
|
||||
#### Storage Configuration
|
||||
|
||||
- __Storage Controller__:
|
||||
- SD Controller - use the secondary SD card as storage
|
||||
- Image Controller - use this to access the cmp image from the games/Multicomp directory
|
||||
|
||||
#### Additional Information
|
||||
|
||||
The OSD includes version information and build date tracking. This configuration interface provides comprehensive control over the MultiComp's core functionality, allowing users to switch between different CPU architectures, operating systems, and I/O configurations.
|
||||
|
||||
The menu system is designed for straightforward navigation and configuration of the MultiComp's essential features, making it accessible for both basic setup and advanced customization needs.
|
||||
|
||||
### License
|
||||
|
||||
__Software and VHDL project download link__
|
||||
|
||||
@@ -1 +1 @@
|
||||
`define BUILD_DATE "201227"
|
||||
`define BUILD_DATE "241101"
|
||||
@@ -1,118 +1,118 @@
|
||||
io_4iomodule_c5_index: 55gpio_index: 2
|
||||
io_4iomodule_c5_index: 54gpio_index: 465
|
||||
io_4iomodule_c5_index: 33gpio_index: 6
|
||||
io_4iomodule_c5_index: 51gpio_index: 461
|
||||
io_4iomodule_c5_index: 27gpio_index: 10
|
||||
io_4iomodule_c5_index: 57gpio_index: 457
|
||||
io_4iomodule_c5_index: 34gpio_index: 14
|
||||
io_4iomodule_c5_index: 28gpio_index: 453
|
||||
io_4iomodule_c5_index: 26gpio_index: 19
|
||||
io_4iomodule_c5_index: 47gpio_index: 449
|
||||
io_4iomodule_c5_index: 29gpio_index: 22
|
||||
io_4iomodule_c5_index: 3gpio_index: 445
|
||||
io_4iomodule_c5_index: 16gpio_index: 27
|
||||
io_4iomodule_c5_index: 6gpio_index: 441
|
||||
io_4iomodule_c5_index: 50gpio_index: 30
|
||||
io_4iomodule_c5_index: 35gpio_index: 437
|
||||
io_4iomodule_c5_index: 7gpio_index: 35
|
||||
io_4iomodule_c5_index: 53gpio_index: 433
|
||||
io_4iomodule_c5_index: 12gpio_index: 38
|
||||
io_4iomodule_c5_index: 1gpio_index: 429
|
||||
io_4iomodule_c5_index: 22gpio_index: 43
|
||||
io_4iomodule_c5_index: 8gpio_index: 425
|
||||
io_4iomodule_c5_index: 20gpio_index: 46
|
||||
io_4iomodule_c5_index: 30gpio_index: 421
|
||||
io_4iomodule_c5_index: 2gpio_index: 51
|
||||
io_4iomodule_c5_index: 31gpio_index: 417
|
||||
io_4iomodule_c5_index: 39gpio_index: 54
|
||||
io_4iomodule_c5_index: 18gpio_index: 413
|
||||
io_4iomodule_c5_index: 10gpio_index: 59
|
||||
io_4iomodule_c5_index: 42gpio_index: 409
|
||||
io_4iomodule_c5_index: 5gpio_index: 62
|
||||
io_4iomodule_c5_index: 24gpio_index: 405
|
||||
io_4iomodule_c5_index: 37gpio_index: 67
|
||||
io_4iomodule_c5_index: 13gpio_index: 401
|
||||
io_4iomodule_c5_index: 0gpio_index: 70
|
||||
io_4iomodule_c5_index: 44gpio_index: 397
|
||||
io_4iomodule_c5_index: 38gpio_index: 75
|
||||
io_4iomodule_c5_index: 52gpio_index: 393
|
||||
io_4iomodule_c5_index: 32gpio_index: 78
|
||||
io_4iomodule_c5_index: 56gpio_index: 389
|
||||
io_4iomodule_a_index: 13gpio_index: 385
|
||||
io_4iomodule_c5_index: 4gpio_index: 83
|
||||
io_4iomodule_c5_index: 23gpio_index: 86
|
||||
io_4iomodule_a_index: 15gpio_index: 381
|
||||
io_4iomodule_a_index: 8gpio_index: 377
|
||||
io_4iomodule_c5_index: 46gpio_index: 91
|
||||
io_4iomodule_a_index: 5gpio_index: 373
|
||||
io_4iomodule_a_index: 11gpio_index: 369
|
||||
io_4iomodule_c5_index: 41gpio_index: 94
|
||||
io_4iomodule_a_index: 3gpio_index: 365
|
||||
io_4iomodule_c5_index: 25gpio_index: 99
|
||||
io_4iomodule_a_index: 7gpio_index: 361
|
||||
io_4iomodule_c5_index: 9gpio_index: 102
|
||||
io_4iomodule_a_index: 0gpio_index: 357
|
||||
io_4iomodule_c5_index: 14gpio_index: 107
|
||||
io_4iomodule_a_index: 12gpio_index: 353
|
||||
io_4iomodule_c5_index: 45gpio_index: 110
|
||||
io_4iomodule_c5_index: 17gpio_index: 115
|
||||
io_4iomodule_a_index: 4gpio_index: 349
|
||||
io_4iomodule_c5_index: 36gpio_index: 118
|
||||
io_4iomodule_a_index: 10gpio_index: 345
|
||||
io_4iomodule_a_index: 16gpio_index: 341
|
||||
io_4iomodule_c5_index: 15gpio_index: 123
|
||||
io_4iomodule_a_index: 14gpio_index: 337
|
||||
io_4iomodule_c5_index: 43gpio_index: 126
|
||||
io_4iomodule_c5_index: 19gpio_index: 131
|
||||
io_4iomodule_a_index: 1gpio_index: 333
|
||||
io_4iomodule_c5_index: 59gpio_index: 134
|
||||
io_4iomodule_a_index: 2gpio_index: 329
|
||||
io_4iomodule_a_index: 9gpio_index: 325
|
||||
io_4iomodule_c5_index: 48gpio_index: 139
|
||||
io_4iomodule_a_index: 6gpio_index: 321
|
||||
io_4iomodule_a_index: 17gpio_index: 317
|
||||
io_4iomodule_c5_index: 40gpio_index: 142
|
||||
io_4iomodule_c5_index: 11gpio_index: 147
|
||||
io_4iomodule_c5_index: 58gpio_index: 150
|
||||
io_4iomodule_c5_index: 21gpio_index: 155
|
||||
io_4iomodule_c5_index: 49gpio_index: 158
|
||||
io_4iomodule_h_c5_index: 0gpio_index: 161
|
||||
io_4iomodule_h_c5_index: 6gpio_index: 165
|
||||
io_4iomodule_h_c5_index: 10gpio_index: 169
|
||||
io_4iomodule_h_c5_index: 3gpio_index: 173
|
||||
io_4iomodule_h_c5_index: 8gpio_index: 176
|
||||
io_4iomodule_h_c5_index: 11gpio_index: 180
|
||||
io_4iomodule_h_c5_index: 7gpio_index: 184
|
||||
io_4iomodule_h_c5_index: 5gpio_index: 188
|
||||
io_4iomodule_h_c5_index: 1gpio_index: 192
|
||||
io_4iomodule_h_c5_index: 2gpio_index: 196
|
||||
io_4iomodule_h_c5_index: 9gpio_index: 200
|
||||
io_4iomodule_h_c5_index: 4gpio_index: 204
|
||||
io_4iomodule_h_index: 15gpio_index: 208
|
||||
io_4iomodule_h_index: 1gpio_index: 212
|
||||
io_4iomodule_h_index: 3gpio_index: 216
|
||||
io_4iomodule_h_index: 2gpio_index: 220
|
||||
io_4iomodule_h_index: 11gpio_index: 224
|
||||
io_4iomodule_vref_h_index: 1gpio_index: 228
|
||||
io_4iomodule_h_index: 20gpio_index: 231
|
||||
io_4iomodule_h_index: 8gpio_index: 235
|
||||
io_4iomodule_h_index: 6gpio_index: 239
|
||||
io_4iomodule_h_index: 10gpio_index: 243
|
||||
io_4iomodule_h_index: 23gpio_index: 247
|
||||
io_4iomodule_h_index: 7gpio_index: 251
|
||||
io_4iomodule_h_index: 22gpio_index: 255
|
||||
io_4iomodule_h_index: 5gpio_index: 259
|
||||
io_4iomodule_h_index: 24gpio_index: 263
|
||||
io_4iomodule_h_index: 0gpio_index: 267
|
||||
io_4iomodule_h_index: 13gpio_index: 271
|
||||
io_4iomodule_h_index: 21gpio_index: 275
|
||||
io_4iomodule_h_index: 16gpio_index: 279
|
||||
io_4iomodule_vref_h_index: 0gpio_index: 283
|
||||
io_4iomodule_h_index: 12gpio_index: 286
|
||||
io_4iomodule_h_index: 4gpio_index: 290
|
||||
io_4iomodule_h_index: 19gpio_index: 294
|
||||
io_4iomodule_h_index: 18gpio_index: 298
|
||||
io_4iomodule_h_index: 17gpio_index: 302
|
||||
io_4iomodule_h_index: 25gpio_index: 306
|
||||
io_4iomodule_h_index: 14gpio_index: 310
|
||||
io_4iomodule_h_index: 9gpio_index: 314
|
||||
io_4iomodule_c5_index: 55gpio_index: 2
|
||||
io_4iomodule_c5_index: 54gpio_index: 465
|
||||
io_4iomodule_c5_index: 33gpio_index: 6
|
||||
io_4iomodule_c5_index: 51gpio_index: 461
|
||||
io_4iomodule_c5_index: 27gpio_index: 10
|
||||
io_4iomodule_c5_index: 57gpio_index: 457
|
||||
io_4iomodule_c5_index: 34gpio_index: 14
|
||||
io_4iomodule_c5_index: 28gpio_index: 453
|
||||
io_4iomodule_c5_index: 26gpio_index: 19
|
||||
io_4iomodule_c5_index: 47gpio_index: 449
|
||||
io_4iomodule_c5_index: 29gpio_index: 22
|
||||
io_4iomodule_c5_index: 3gpio_index: 445
|
||||
io_4iomodule_c5_index: 16gpio_index: 27
|
||||
io_4iomodule_c5_index: 6gpio_index: 441
|
||||
io_4iomodule_c5_index: 50gpio_index: 30
|
||||
io_4iomodule_c5_index: 35gpio_index: 437
|
||||
io_4iomodule_c5_index: 7gpio_index: 35
|
||||
io_4iomodule_c5_index: 53gpio_index: 433
|
||||
io_4iomodule_c5_index: 12gpio_index: 38
|
||||
io_4iomodule_c5_index: 1gpio_index: 429
|
||||
io_4iomodule_c5_index: 22gpio_index: 43
|
||||
io_4iomodule_c5_index: 8gpio_index: 425
|
||||
io_4iomodule_c5_index: 20gpio_index: 46
|
||||
io_4iomodule_c5_index: 30gpio_index: 421
|
||||
io_4iomodule_c5_index: 2gpio_index: 51
|
||||
io_4iomodule_c5_index: 31gpio_index: 417
|
||||
io_4iomodule_c5_index: 39gpio_index: 54
|
||||
io_4iomodule_c5_index: 18gpio_index: 413
|
||||
io_4iomodule_c5_index: 10gpio_index: 59
|
||||
io_4iomodule_c5_index: 42gpio_index: 409
|
||||
io_4iomodule_c5_index: 5gpio_index: 62
|
||||
io_4iomodule_c5_index: 24gpio_index: 405
|
||||
io_4iomodule_c5_index: 37gpio_index: 67
|
||||
io_4iomodule_c5_index: 13gpio_index: 401
|
||||
io_4iomodule_c5_index: 0gpio_index: 70
|
||||
io_4iomodule_c5_index: 44gpio_index: 397
|
||||
io_4iomodule_c5_index: 38gpio_index: 75
|
||||
io_4iomodule_c5_index: 52gpio_index: 393
|
||||
io_4iomodule_c5_index: 32gpio_index: 78
|
||||
io_4iomodule_c5_index: 56gpio_index: 389
|
||||
io_4iomodule_a_index: 13gpio_index: 385
|
||||
io_4iomodule_c5_index: 4gpio_index: 83
|
||||
io_4iomodule_c5_index: 23gpio_index: 86
|
||||
io_4iomodule_a_index: 15gpio_index: 381
|
||||
io_4iomodule_a_index: 8gpio_index: 377
|
||||
io_4iomodule_c5_index: 46gpio_index: 91
|
||||
io_4iomodule_a_index: 5gpio_index: 373
|
||||
io_4iomodule_a_index: 11gpio_index: 369
|
||||
io_4iomodule_c5_index: 41gpio_index: 94
|
||||
io_4iomodule_a_index: 3gpio_index: 365
|
||||
io_4iomodule_c5_index: 25gpio_index: 99
|
||||
io_4iomodule_a_index: 7gpio_index: 361
|
||||
io_4iomodule_c5_index: 9gpio_index: 102
|
||||
io_4iomodule_a_index: 0gpio_index: 357
|
||||
io_4iomodule_c5_index: 14gpio_index: 107
|
||||
io_4iomodule_a_index: 12gpio_index: 353
|
||||
io_4iomodule_c5_index: 45gpio_index: 110
|
||||
io_4iomodule_c5_index: 17gpio_index: 115
|
||||
io_4iomodule_a_index: 4gpio_index: 349
|
||||
io_4iomodule_c5_index: 36gpio_index: 118
|
||||
io_4iomodule_a_index: 10gpio_index: 345
|
||||
io_4iomodule_a_index: 16gpio_index: 341
|
||||
io_4iomodule_c5_index: 15gpio_index: 123
|
||||
io_4iomodule_a_index: 14gpio_index: 337
|
||||
io_4iomodule_c5_index: 43gpio_index: 126
|
||||
io_4iomodule_c5_index: 19gpio_index: 131
|
||||
io_4iomodule_a_index: 1gpio_index: 333
|
||||
io_4iomodule_c5_index: 59gpio_index: 134
|
||||
io_4iomodule_a_index: 2gpio_index: 329
|
||||
io_4iomodule_a_index: 9gpio_index: 325
|
||||
io_4iomodule_c5_index: 48gpio_index: 139
|
||||
io_4iomodule_a_index: 6gpio_index: 321
|
||||
io_4iomodule_a_index: 17gpio_index: 317
|
||||
io_4iomodule_c5_index: 40gpio_index: 142
|
||||
io_4iomodule_c5_index: 11gpio_index: 147
|
||||
io_4iomodule_c5_index: 58gpio_index: 150
|
||||
io_4iomodule_c5_index: 21gpio_index: 155
|
||||
io_4iomodule_c5_index: 49gpio_index: 158
|
||||
io_4iomodule_h_c5_index: 0gpio_index: 161
|
||||
io_4iomodule_h_c5_index: 6gpio_index: 165
|
||||
io_4iomodule_h_c5_index: 10gpio_index: 169
|
||||
io_4iomodule_h_c5_index: 3gpio_index: 173
|
||||
io_4iomodule_h_c5_index: 8gpio_index: 176
|
||||
io_4iomodule_h_c5_index: 11gpio_index: 180
|
||||
io_4iomodule_h_c5_index: 7gpio_index: 184
|
||||
io_4iomodule_h_c5_index: 5gpio_index: 188
|
||||
io_4iomodule_h_c5_index: 1gpio_index: 192
|
||||
io_4iomodule_h_c5_index: 2gpio_index: 196
|
||||
io_4iomodule_h_c5_index: 9gpio_index: 200
|
||||
io_4iomodule_h_c5_index: 4gpio_index: 204
|
||||
io_4iomodule_h_index: 15gpio_index: 208
|
||||
io_4iomodule_h_index: 1gpio_index: 212
|
||||
io_4iomodule_h_index: 3gpio_index: 216
|
||||
io_4iomodule_h_index: 2gpio_index: 220
|
||||
io_4iomodule_h_index: 11gpio_index: 224
|
||||
io_4iomodule_vref_h_index: 1gpio_index: 228
|
||||
io_4iomodule_h_index: 20gpio_index: 231
|
||||
io_4iomodule_h_index: 8gpio_index: 235
|
||||
io_4iomodule_h_index: 6gpio_index: 239
|
||||
io_4iomodule_h_index: 10gpio_index: 243
|
||||
io_4iomodule_h_index: 23gpio_index: 247
|
||||
io_4iomodule_h_index: 7gpio_index: 251
|
||||
io_4iomodule_h_index: 22gpio_index: 255
|
||||
io_4iomodule_h_index: 5gpio_index: 259
|
||||
io_4iomodule_h_index: 24gpio_index: 263
|
||||
io_4iomodule_h_index: 0gpio_index: 267
|
||||
io_4iomodule_h_index: 13gpio_index: 271
|
||||
io_4iomodule_h_index: 21gpio_index: 275
|
||||
io_4iomodule_h_index: 16gpio_index: 279
|
||||
io_4iomodule_vref_h_index: 0gpio_index: 283
|
||||
io_4iomodule_h_index: 12gpio_index: 286
|
||||
io_4iomodule_h_index: 4gpio_index: 290
|
||||
io_4iomodule_h_index: 19gpio_index: 294
|
||||
io_4iomodule_h_index: 18gpio_index: 298
|
||||
io_4iomodule_h_index: 17gpio_index: 302
|
||||
io_4iomodule_h_index: 25gpio_index: 306
|
||||
io_4iomodule_h_index: 14gpio_index: 310
|
||||
io_4iomodule_h_index: 9gpio_index: 314
|
||||
|
||||
26
jtag.cdf
26
jtag.cdf
@@ -1,13 +1,13 @@
|
||||
JedecChain;
|
||||
FileRevision(JESD32A);
|
||||
DefaultMfr(6E);
|
||||
|
||||
P ActionCode(Ign)
|
||||
Device PartName(SOCVHPS) MfrSpec(OpMask(0));
|
||||
P ActionCode(Cfg)
|
||||
Device PartName(5CSEBA6U23I7) Path("output_files/") File("MultiComp.sof") MfrSpec(OpMask(1));
|
||||
ChainEnd;
|
||||
|
||||
AlteraBegin;
|
||||
ChainType(JTAG);
|
||||
AlteraEnd;
|
||||
JedecChain;
|
||||
FileRevision(JESD32A);
|
||||
DefaultMfr(6E);
|
||||
|
||||
P ActionCode(Ign)
|
||||
Device PartName(SOCVHPS) MfrSpec(OpMask(0));
|
||||
P ActionCode(Cfg)
|
||||
Device PartName(5CSEBA6U23I7) Path("output_files/") File("MultiComp.sof") MfrSpec(OpMask(1));
|
||||
ChainEnd;
|
||||
|
||||
AlteraBegin;
|
||||
ChainType(JTAG);
|
||||
AlteraEnd;
|
||||
|
||||
BIN
releases/MultiComp_20241101.rbf
Normal file
BIN
releases/MultiComp_20241101.rbf
Normal file
Binary file not shown.
Reference in New Issue
Block a user