- 25 fps hard coded for experiments
- Presentation time utilized to define start of playback
- Makes use of FIFO structure for stable frame rate
- Firmware
- Provides all 3 planar framebuffers to hardware for playback
- Added servo controller SPI fake communication
Behaves as a closed but empty tray
- Added pointing device emulation
MiSTer joystick data used as input
Behaves like a maneuvering device
- Added SCI IRQ to 6805 cpu core
- Added SPI and SCI to 6805 uC
- Fixed spurious 68k chip select for slave
- Added documentation about I2C to the Front LCD
- Simulated U3090MG no longer causes front panel button presses
Lead to spurious IRQs before
- Removal of slave memory patches
- Attach display file and ICA to SDRAM
- Fixed byte order of 8 bit accesses by CPU
- Added SDRAM burst mode to fix video timing
- Fixed missing reset behavior of some components
- Added optional SDRAM zeroing
- Added SDRAM refresh during ROM download
- Added OS aware syscall parser to simulation
- Fixed SCC68070 on-chip interrupt autovector
- Fixed SCC68070 Timer0 frequency
- Added video pixel data FIFO
- Changed SDRAM auto refresh command
- SCC68070 is booting cdi200.rom
- SLAVE is communicating with the CPU
- MCD212 only implements memory map
- IRQs incomplete
- CDIC missing
- MiSTer interface missing
