- Optional, must be enabled in Hardware Config
The typical use case of a CD-i, based on
the Mono-I architecture, is the connection
of a pointing device to the front port or
the usage of an Ir Controller.
Both are handled by the SLAVE and usually
combined as the first pointing device.
The back port is available as a serial port.
For 2 players, the first pointing device
is connected to the back port.
During bootup, the operating system decides to
disable the serial port in favor of having
the first pointing device on the back.
The SLAVE doesn't know about this and
all input devices handled by it,
will be perceived as the second pointing device.
Copy of tg68k added to rtl subfolder
Last revision
https://github.com/Slamy/TG68K.C.git
a1c18a18a073b33f49aaf092509da06bc14f47ed
This should make merges with mainline easier
Fixes desynchronisation in fmvdrv after 18 minutes of Top Gun
Thanks to cdifan for pointing this out
Source:
http://icdia.co.uk/notes/technote097.pdf
TN #097 - The Full Motion System for CD-I,
section 4. ARCHITECTURE OF FULL MOTION CD-I PLAYER
VMPEG can be disabled via OSD
WIP
FMV: Increased soft core clock rate to 92 MHz
Was 80 MHz before, which wasn't enough
Fixes Top Gun CPU overload at timecode ~15:48
- 25 fps hard coded for experiments
- Presentation time utilized to define start of playback
- Makes use of FIFO structure for stable frame rate
- Firmware
- Provides all 3 planar framebuffers to hardware for playback
- Added servo controller SPI fake communication
Behaves as a closed but empty tray
- Added pointing device emulation
MiSTer joystick data used as input
Behaves like a maneuvering device
- Added SCI IRQ to 6805 cpu core
- Added SPI and SCI to 6805 uC
- Fixed spurious 68k chip select for slave
- Added documentation about I2C to the Front LCD
- Simulated U3090MG no longer causes front panel button presses
Lead to spurious IRQs before
- Removal of slave memory patches
- Attach display file and ICA to SDRAM
- Fixed byte order of 8 bit accesses by CPU
- Added SDRAM burst mode to fix video timing
- Fixed missing reset behavior of some components
- Added optional SDRAM zeroing
- Added SDRAM refresh during ROM download
- Added OS aware syscall parser to simulation
- Fixed SCC68070 on-chip interrupt autovector
- Fixed SCC68070 Timer0 frequency
- Added video pixel data FIFO
- Changed SDRAM auto refresh command
- SCC68070 is booting cdi200.rom
- SLAVE is communicating with the CPU
- MCD212 only implements memory map
- IRQs incomplete
- CDIC missing
- MiSTer interface missing