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Fix colour and screen Glitches in Twinworld (#16)

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cpu_load is only true for the first write of a STM instruction, so subsequent writes to the VIDC registers were being lost
This commit is contained in:
Adam Hay
2021-08-23 07:14:13 +02:00
committed by GitHub
parent d80a260918
commit 610eec8d1b
1 changed files with 1 additions and 1 deletions
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rtl/memc.v
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@@ -420,7 +420,7 @@ wire cpu_mem_we = cpu_we & ((phycs & spvmd) | (table_valid & logcs)) & ~rom
assign tablew = cpu_load & cpu_cyc & cpu_we & spvmd & (cpu_address[25:23] == 3'b111) & (cpu_address[12] == 0) & (cpu_address[7] == 0); // &3800000+
wire memw = cpu_load & cpu_cyc & cpu_we & spvmd & (cpu_address[25:21] == 5'b11011); // &3600000
assign vidw = cpu_load & cpu_cyc & cpu_we & vidc_cs; // &3400000
assign vidw = cpu_cyc & cpu_we & vidc_cs; // &3400000
// bus chip selects
wire logcs = cpu_address[25] == 1'b0; // 0000000 - 1FFFFFF