From 610eec8d1bbb8788b25c60d0bc1ba19ddafd474e Mon Sep 17 00:00:00 2001 From: Adam Hay Date: Mon, 23 Aug 2021 07:14:13 +0200 Subject: [PATCH] Fix colour and screen Glitches in Twinworld (#16) cpu_load is only true for the first write of a STM instruction, so subsequent writes to the VIDC registers were being lost --- rtl/memc.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rtl/memc.v b/rtl/memc.v index 8677bc1..2f9e405 100644 --- a/rtl/memc.v +++ b/rtl/memc.v @@ -420,7 +420,7 @@ wire cpu_mem_we = cpu_we & ((phycs & spvmd) | (table_valid & logcs)) & ~rom assign tablew = cpu_load & cpu_cyc & cpu_we & spvmd & (cpu_address[25:23] == 3'b111) & (cpu_address[12] == 0) & (cpu_address[7] == 0); // &3800000+ wire memw = cpu_load & cpu_cyc & cpu_we & spvmd & (cpu_address[25:21] == 5'b11011); // &3600000 -assign vidw = cpu_load & cpu_cyc & cpu_we & vidc_cs; // &3400000 +assign vidw = cpu_cyc & cpu_we & vidc_cs; // &3400000 // bus chip selects wire logcs = cpu_address[25] == 1'b0; // 0000000 - 1FFFFFF