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directory cache bug fix

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This commit is contained in:
Philip Smart
2021-04-19 00:38:35 +01:00
parent a2e49b52c5
commit 0346e9aa84
24 changed files with 82 additions and 65 deletions
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42
buildall
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@@ -1,7 +1,8 @@
#!/bin/bash
# Target machine, used to select the right software for the SD card.
TARGET=MZ-700
#TARGET=MZ-700
TARGET=MZ-80A
ZPU_SHARPMZ_BUILD=1
ZPU_SHARPMZ_APPADDR=0x100000
@@ -81,11 +82,11 @@ fi
# Ensure the TZFS target directories exist
k64fsddir=${ROOT_DIR}/zSoft/SD/K64F
tzfsdir=${ROOT_DIR}/tranZPUter/software
mkdir -p $k64fsddir/TZFS/
mkdir -p $k64fsddir/MZF/
mkdir -p $k64fsddir/CPM/
mkdir -p $k64fsddir/BAS
mkdir -p $k64fsddir/CAS
#mkdir -p $k64fsddir/TZFS/
#mkdir -p $k64fsddir/MZF/
#mkdir -p $k64fsddir/CPM/
#mkdir -p $k64fsddir/BAS
#mkdir -p $k64fsddir/CAS
(
cd $tzfsdir
@@ -110,21 +111,22 @@ if [ $? != 0 ]; then
exit 1
fi
# Use copytosd.sh to transfer files to an SD card. Still need to copy the k64F files manually.
# Copy across all the Z80/TZFS software into the target, keep it in one place for placing onto an SD card!
cp $tzfsdir/roms/tzfs.rom $k64fsddir/TZFS/
cp $tzfsdir/roms/monitor_SA1510.rom $k64fsddir/TZFS/SA1510.rom
cp $tzfsdir/roms/monitor_80c_SA1510.rom $k64fsddir/TZFS/SA1510-8.rom
cp $tzfsdir/roms/monitor_1Z-013A.rom $k64fsddir/TZFS/1Z-013A.rom
cp $tzfsdir/roms/monitor_80c_1Z-013A.rom $k64fsddir/TZFS/1Z-013A-8.rom
cp $tzfsdir/roms/monitor_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM.rom
cp $tzfsdir/roms/monitor_80c_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM-8.rom
cp $tzfsdir/roms/MZ80B_IPL.rom $k64fsddir/TZFS/MZ80B_IPL.rom
cp $tzfsdir/MZF/Common/CPM223.MZF $k64fsddir/MZF/
cp $tzfsdir/roms/cpm22.bin $k64fsddir/CPM/
cp $tzfsdir/CPM/SDC16M/RAW/* $k64fsddir/CPM/
cp $tzfsdir/MZF/${TARGET}/* $k64fsddir/MZF/
cp $tzfsdir/BAS/* $k64fsddir/BAS/
cp $tzfsdir/CAS/* $k64fsddir/CAS/
#cp $tzfsdir/roms/tzfs.rom $k64fsddir/TZFS/
#cp $tzfsdir/roms/monitor_SA1510.rom $k64fsddir/TZFS/SA1510.rom
#cp $tzfsdir/roms/monitor_80c_SA1510.rom $k64fsddir/TZFS/SA1510-8.rom
#cp $tzfsdir/roms/monitor_1Z-013A.rom $k64fsddir/TZFS/1Z-013A.rom
#cp $tzfsdir/roms/monitor_80c_1Z-013A.rom $k64fsddir/TZFS/1Z-013A-8.rom
#cp $tzfsdir/roms/monitor_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM.rom
#cp $tzfsdir/roms/monitor_80c_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM-8.rom
#cp $tzfsdir/roms/MZ80B_IPL.rom $k64fsddir/TZFS/MZ80B_IPL.rom
#cp $tzfsdir/roms/cpm22.bin $k64fsddir/CPM/
#cp $tzfsdir/CPM/SDC16M/RAW/* $k64fsddir/CPM/
#cp $tzfsdir/MZF/Common/*.MZF $k64fsddir/MZF/
#cp $tzfsdir/MZF/${TARGET}/* $k64fsddir/MZF/
#cp $tzfsdir/BAS/* $k64fsddir/BAS/
#cp $tzfsdir/CAS/* $k64fsddir/CAS/
)
if [ $? != 0 ]; then
exit 1

13
common/tranzputer.c
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@@ -26,7 +26,7 @@
// this code but is suspended if zOS launches an application which will call this
// functionality.
// Credits:
// Copyright: (c) 2019-2020 Philip Smart <philip.smart@net2net.org>
// Copyright: (c) 2019-2021 Philip Smart <philip.smart@net2net.org>
//
// History: v1.0 May 2020 - Initial write of the TranZPUter software.
// v1.1 July 2020 - Updated for v1.1 of the hardware, all pins have been routed on the PCB
@@ -57,6 +57,9 @@
// Found and fixed a major bug introduced in v1.4. The Z80 direction
// wasnt being set on occasion so an expected write wouldnt occur
// which led to some interesting behaviour!
// v1.6 Apr 2021 - Fixed a SD directory cache bug when switching between directories.
// The bug occurs due to an interaction between the heap management
// and threads.
//
// Notes: See Makefile to enable/disable conditional components
//
@@ -2079,7 +2082,7 @@ FRESULT loadMZFZ80Memory(const char *src, uint32_t addr, uint32_t *bytesRead, en
if(mzfHeader.attr >= 0xF8)
{
addr += ((mzfHeader.attr & 0x07) << 16);
printf("CPM: Addr=%08lx, Size=%08lx\n", addr, mzfHeader.fileSize);
//printf("CPM: Addr=%08lx, Size=%08lx\n", addr, mzfHeader.fileSize);
} else
{
addr += addrOffset;
@@ -3529,7 +3532,7 @@ uint8_t svcCacheDir(const char *directory, enum FILE_TYPE type, uint8_t force)
// Open the file so we can read out the MZF header which is the information TZFS/CPM needs.
//
result = f_open(&File, fqfn, FA_OPEN_EXISTING | FA_READ);
// If no error occurred, read in the header.
//
if(!result) result = f_read(&File, (char *)&dirEnt, TZSVC_CMPHDR_SIZE, &readSize);
@@ -3543,7 +3546,8 @@ uint8_t svcCacheDir(const char *directory, enum FILE_TYPE type, uint8_t force)
// Cache this entry. The SD filename is dynamically allocated as it's size can be upto 255 characters for LFN names. The Sharp name is
// fixed at 17 characters as you cant reliably rely on terminators and the additional data makes it a constant 32 chars long.
osControl.dirMap.mzfFile[fileNo] = (t_sharpToSDMap *)malloc(sizeof(t_sharpToSDMap));
osControl.dirMap.mzfFile[fileNo]->sdFileName = (uint8_t *)malloc(strlen(fno.fname)+1);
if(osControl.dirMap.mzfFile[fileNo] != NULL)
osControl.dirMap.mzfFile[fileNo]->sdFileName = (uint8_t *)malloc(strlen(fno.fname)+1);
if(osControl.dirMap.mzfFile[fileNo] == NULL || osControl.dirMap.mzfFile[fileNo]->sdFileName == NULL)
{
@@ -3799,7 +3803,6 @@ uint8_t svcLoadFile(enum FILE_TYPE type)
{
// Call method to load an MZF file.
result = loadMZFZ80Memory(fqfn, 0xFFFFFFFF, 0, (svcControl.memTarget == 0 ? TRANZPUTER : MAINBOARD), 1);
// Store the filename, used in reload or immediate saves.
//
osControl.lastFile = (uint8_t *)realloc(osControl.lastFile, strlen(fqfn)+1);

2
include/tranzputer.h
View File

@@ -452,7 +452,7 @@
//#define readCtrlLatch() ( ((GPIOB_PDIR & 0x00000200) >> 5) | (GPIOB_PDIR & 0x0000000f) )
#define readCtrlLatchDirect() ( inZ80IO(IO_TZ_CTRLLATCH) )
#define readCtrlLatch() ( readZ80IO(IO_TZ_CTRLLATCH, TRANZPUTER) )
#define writeCtrlLatch(a) { printf("WL:%02x\n", a); setZ80Direction(WRITE); outZ80IO(IO_TZ_CTRLLATCH, a); }
#define writeCtrlLatch(a) { setZ80Direction(WRITE); outZ80IO(IO_TZ_CTRLLATCH, a); }
//#define setZ80Direction(a) { for(uint8_t idx=Z80_D0; idx <= Z80_D7; idx++) { if(a == WRITE) { pinOutput(idx); } else { pinInput(idx); } }; z80Control.busDir = a; }
#define setZ80Direction(a) {{ if(a == WRITE) { setZ80DataAsOutput(); } else { setZ80DataAsInput(); } }; z80Control.busDir = a; }
#define reqZ80BusChange(a) { if(a == MAINBOARD_ACCESS && z80Control.ctrlMode == TRANZPUTER_ACCESS) \

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8
rtl/IOCP_zOS_BootROM.vhd
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@@ -16006,11 +16006,11 @@ shared variable ram : ram_type :=
16968 => x"7a4f5300",
16969 => x"2a2a2025",
16970 => x"73202800",
16971 => x"31312f30",
16972 => x"332f3230",
16971 => x"31372f30",
16972 => x"342f3230",
16973 => x"32310000",
16974 => x"76312e31",
16975 => x"6b000000",
16974 => x"76312e32",
16975 => x"00000000",
16976 => x"205a5055",
16977 => x"2c207265",
16978 => x"76202530",

8
rtl/TZSW_DualPort3264BootBRAM.vhd
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@@ -7541,7 +7541,7 @@ architecture arch of DualPort3264BootBRAM is
7460 => x"00",
7461 => x"00",
7462 => x"30",
7463 => x"31",
7463 => x"32",
7464 => x"55",
7465 => x"30",
7466 => x"25",
@@ -34858,7 +34858,7 @@ architecture arch of DualPort3264BootBRAM is
7459 => x"20",
7460 => x"7a",
7461 => x"73",
7462 => x"33",
7462 => x"34",
7463 => x"76",
7464 => x"20",
7465 => x"76",
@@ -62175,7 +62175,7 @@ architecture arch of DualPort3264BootBRAM is
7458 => x"20",
7459 => x"00",
7460 => x"2a",
7461 => x"31",
7461 => x"37",
7462 => x"31",
7463 => x"00",
7464 => x"20",
@@ -71283,7 +71283,7 @@ architecture arch of DualPort3264BootBRAM is
7460 => x"2a",
7461 => x"31",
7462 => x"32",
7463 => x"6b",
7463 => x"00",
7464 => x"2c",
7465 => x"32",
7466 => x"73",

8
rtl/TZSW_DualPortBootBRAM.vhd
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@@ -14994,7 +14994,7 @@ architecture arch of DualPortBootBRAM is
14923 => x"30",
14924 => x"30",
14925 => x"00",
14926 => x"31",
14926 => x"32",
14927 => x"00",
14928 => x"55",
14929 => x"65",
@@ -51403,7 +51403,7 @@ architecture arch of DualPortBootBRAM is
14920 => x"4f",
14921 => x"2a",
14922 => x"20",
14923 => x"31",
14923 => x"37",
14924 => x"2f",
14925 => x"31",
14926 => x"31",
@@ -69610,10 +69610,10 @@ architecture arch of DualPortBootBRAM is
14921 => x"2a",
14922 => x"73",
14923 => x"31",
14924 => x"33",
14924 => x"34",
14925 => x"32",
14926 => x"76",
14927 => x"6b",
14927 => x"00",
14928 => x"20",
14929 => x"2c",
14930 => x"76",

8
rtl/TZSW_SinglePortBootBRAM.vhd
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@@ -14989,7 +14989,7 @@ architecture arch of SinglePortBootBRAM is
14923 => x"30",
14924 => x"30",
14925 => x"00",
14926 => x"31",
14926 => x"32",
14927 => x"00",
14928 => x"55",
14929 => x"65",
@@ -51398,7 +51398,7 @@ architecture arch of SinglePortBootBRAM is
14920 => x"4f",
14921 => x"2a",
14922 => x"20",
14923 => x"31",
14923 => x"37",
14924 => x"2f",
14925 => x"31",
14926 => x"31",
@@ -69605,10 +69605,10 @@ architecture arch of SinglePortBootBRAM is
14921 => x"2a",
14922 => x"73",
14923 => x"31",
14924 => x"33",
14924 => x"34",
14925 => x"32",
14926 => x"76",
14927 => x"6b",
14927 => x"00",
14928 => x"20",
14929 => x"2c",
14930 => x"76",

8
rtl/zOS_BootROM.vhd
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@@ -14985,11 +14985,11 @@ shared variable ram : ram_type :=
14920 => x"7a4f5300",
14921 => x"2a2a2025",
14922 => x"73202800",
14923 => x"31312f30",
14924 => x"332f3230",
14923 => x"31372f30",
14924 => x"342f3230",
14925 => x"32310000",
14926 => x"76312e31",
14927 => x"6b000000",
14926 => x"76312e32",
14927 => x"00000000",
14928 => x"205a5055",
14929 => x"2c207265",
14930 => x"76202530",

8
rtl/zOS_DualPort3264BootBRAM.vhd
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@@ -7541,7 +7541,7 @@ architecture arch of DualPort3264BootBRAM is
7460 => x"00",
7461 => x"00",
7462 => x"30",
7463 => x"31",
7463 => x"32",
7464 => x"55",
7465 => x"30",
7466 => x"25",
@@ -34858,7 +34858,7 @@ architecture arch of DualPort3264BootBRAM is
7459 => x"20",
7460 => x"7a",
7461 => x"73",
7462 => x"33",
7462 => x"34",
7463 => x"76",
7464 => x"20",
7465 => x"76",
@@ -62175,7 +62175,7 @@ architecture arch of DualPort3264BootBRAM is
7458 => x"20",
7459 => x"00",
7460 => x"2a",
7461 => x"31",
7461 => x"37",
7462 => x"31",
7463 => x"00",
7464 => x"20",
@@ -71283,7 +71283,7 @@ architecture arch of DualPort3264BootBRAM is
7460 => x"2a",
7461 => x"31",
7462 => x"32",
7463 => x"6b",
7463 => x"00",
7464 => x"2c",
7465 => x"32",
7466 => x"73",

8
rtl/zOS_DualPortBootBRAM.vhd
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@@ -14994,7 +14994,7 @@ architecture arch of DualPortBootBRAM is
14923 => x"30",
14924 => x"30",
14925 => x"00",
14926 => x"31",
14926 => x"32",
14927 => x"00",
14928 => x"55",
14929 => x"65",
@@ -51403,7 +51403,7 @@ architecture arch of DualPortBootBRAM is
14920 => x"4f",
14921 => x"2a",
14922 => x"20",
14923 => x"31",
14923 => x"37",
14924 => x"2f",
14925 => x"31",
14926 => x"31",
@@ -69610,10 +69610,10 @@ architecture arch of DualPortBootBRAM is
14921 => x"2a",
14922 => x"73",
14923 => x"31",
14924 => x"33",
14924 => x"34",
14925 => x"32",
14926 => x"76",
14927 => x"6b",
14927 => x"00",
14928 => x"20",
14929 => x"2c",
14930 => x"76",

8
rtl/zOS_SinglePortBootBRAM.vhd
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@@ -14989,7 +14989,7 @@ architecture arch of SinglePortBootBRAM is
14923 => x"30",
14924 => x"30",
14925 => x"00",
14926 => x"31",
14926 => x"32",
14927 => x"00",
14928 => x"55",
14929 => x"65",
@@ -51398,7 +51398,7 @@ architecture arch of SinglePortBootBRAM is
14920 => x"4f",
14921 => x"2a",
14922 => x"20",
14923 => x"31",
14923 => x"37",
14924 => x"2f",
14925 => x"31",
14926 => x"31",
@@ -69605,10 +69605,10 @@ architecture arch of SinglePortBootBRAM is
14921 => x"2a",
14922 => x"73",
14923 => x"31",
14924 => x"33",
14924 => x"34",
14925 => x"32",
14926 => x"76",
14927 => x"6b",
14927 => x"00",
14928 => x"20",
14929 => x"2c",
14930 => x"76",

26
zOS/src/zOS.cpp
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@@ -1,7 +1,7 @@
/////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// Name: zOS.cpp
// Created: January 2019 - April 2020
// Created: January 2019 - April 2021
// Author(s): Philip Smart
// Description: ZPU and Teensy 3.5 (Freescale K64F) OS and test application.
// This program implements methods, tools, test mechanisms and performance analysers such
@@ -9,7 +9,7 @@
// validated and rated in terms of performance.
//
// Credits:
// Copyright: (c) 2019-2020 Philip Smart <philip.smart@net2net.org>
// Copyright: (c) 2019-2021 Philip Smart <philip.smart@net2net.org>
// (c) 2013 ChaN, framework for the SD Card testing.
//
// History: January 2019 - Initial script written for the STORM processor then changed to the ZPU.
@@ -22,13 +22,17 @@
// July 2020 - Tweaks to accomodate v2.1 of the tranZPUter board.
// December 2020 - Updates to allow soft CPU functionality on the v1.3 tranZPUter SW-700
// board.
// April 2021 - Bug fixes to the SD directory cache and better interoperability with
// the MZ-800. Bug found which was introduced in December where the
// Z80 direction wasnt always set correctly resulting in some strange
// and hard to debug behaviour.
//
// Notes: See Makefile to enable/disable conditional components
// USELOADB - The Byte write command is implemented in hw/sw so use it.
// USE_BOOT_ROM - The target is ROM so dont use initialised data.
// MINIMUM_FUNTIONALITY - Minimise functionality to limit code size.
// __ZPU__ - Target CPU is the ZPU
// __K64F__ - Target CPU is the K64F on the Teensy 3.5
// __K64F__ - Target CPU is the K64F
// __SD_CARD__ - Add the SDCard logic.
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -106,8 +110,8 @@
#endif
// Version info.
#define VERSION "v1.1k"
#define VERSION_DATE "11/03/2021"
#define VERSION "v1.2"
#define VERSION_DATE "17/04/2021"
#define PROGRAM_NAME "zOS"
// Utility functions.
@@ -260,7 +264,7 @@ void tranZPUterControl(void)
{
// Locals.
uint8_t ioAddr;
testTZFSAutoBoot();
// Loop waiting on events and processing.
//
while(1)
@@ -367,12 +371,20 @@ int cmdProcessor(void)
// Setup memory on Z80 to default.
loadTranZPUterDefaultROMS(CPUMODE_SET_Z80);
// Kludge logic. Threads interfere with the heap management and if sufficient space hasnt been allocated and the heap free pointer far enough advanced
// before the thread starts, svcCacheDir may fail on future cache operations of larger directories.
uint8_t *cache = (uint8_t *)malloc(32768);
// Cache initial directory.
svcCacheDir(TZSVC_DEFAULT_MZF_DIR, MZF, 1);
// If memory allocated previously, free it.
if(cache != NULL)
free(cache);
// For the tranZPUter, once we know that an SD card is available, launch seperate thread to handle hardware and service functionality.
// No SD card = no tranZPUter functionality.
G.ctrlThreadId = threads.addThread(tranZPUterControl, 0, 16384);
G.ctrlThreadId = threads.addThread(tranZPUterControl, 0, 8192);
#endif
}
#endif