Updates and bug fixes
This commit is contained in:
Philip Smart
File diff suppressed because it is too large
Load Diff
@@ -97,6 +97,7 @@ void usage(void)
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printf(" -s | --size Size of memory block to dump (alternatively use --end).\n");
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printf(" -f | --fpga Operations will take place in the FPGA memory. Default without this flag is to target the tranZPUter memory.\n");
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printf(" -m | --mainboard Operations will take place on the MZ80A mainboard. Default without this flag is to target the tranZPUter memory.\n");
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printf(" -M | --mempage Machines with banked DRAM will have the DRAM paged in for dumping.\n");
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printf(" -v | --verbose Output more messages.\n");
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printf("\nExamples:\n");
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@@ -121,6 +122,7 @@ uint32_t app(uint32_t param1, uint32_t param2)
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int help_flag = 0;
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int fpga_flag = 0;
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int mainboard_flag = 0;
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int mempage_flag = 0;
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int verbose_flag = 0;
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int opt;
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long val = 0;
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@@ -154,6 +156,7 @@ uint32_t app(uint32_t param1, uint32_t param2)
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{"size", 's', OPTPARSE_REQUIRED},
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{"fpga", 'f', OPTPARSE_NONE},
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{"mainboard", 'm', OPTPARSE_NONE},
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{"mempage", 'M', OPTPARSE_NONE},
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{"verbose", 'v', OPTPARSE_NONE},
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{0}
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};
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@@ -177,6 +180,10 @@ uint32_t app(uint32_t param1, uint32_t param2)
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mainboard_flag = 1;
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break;
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case 'M':
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mempage_flag = 1;
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break;
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case 'a':
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if(xatoi(&options.optarg, &val) == 0)
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{
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@@ -258,7 +265,7 @@ uint32_t app(uint32_t param1, uint32_t param2)
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// Call the dump utility to list out memory.
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//
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memoryDumpZ80(startAddr, memSize, startAddr, 32, mainboard_flag == 1 ? MAINBOARD : fpga_flag == 1 ? FPGA : TRANZPUTER);
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memoryDumpZ80(startAddr, memSize, startAddr, 32, mempage_flag == 0 ? 0 : 1, mainboard_flag == 1 ? MAINBOARD : fpga_flag == 1 ? FPGA : TRANZPUTER);
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return(0);
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}
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@@ -13,6 +13,7 @@
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// History: Jan 2021 - Initial write of the TranZPUter software using NXP/Freescale flash
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// driver source.
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// Feb 2021 - Getopt too buggy with long arguments so replaced with optparse.
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// Mar 2021 - Change sector size to K64F default and fixed some bugs.
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//
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// Notes: See Makefile to enable/disable conditional components
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//
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@@ -86,16 +87,15 @@
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//#include <tools.c>
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// Version info.
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#define VERSION "v1.1"
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#define VERSION_DATE "21/02/2021"
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#define VERSION "v1.2"
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#define VERSION_DATE "11/03/2021"
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#define APP_NAME "TZFLUPD"
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// Global scope variables.
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FATFS diskHandle;
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char buffer[512];
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char buffer[FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE];
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uint8_t FLASH_PROTECTION_SIGNATURE[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xde, 0xf9, 0xff, 0xff};
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// Simple help screen to remmber how this utility works!!
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//
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void usage(void)
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@@ -105,6 +105,7 @@ void usage(void)
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printf(" -h | --help This help text.\n");
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printf(" -f | --file Binary file to upload and flash into K64F.\n");
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printf("\nOptions:-\n");
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printf(" -d | --debug Add debug steps to programming.\n");
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printf(" -v | --verbose Output more messages.\n");
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printf("\nExamples:\n");
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@@ -130,6 +131,122 @@ FRESULT initSDCard(void)
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return(result);
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}
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// Local memory dump routine for debug purposes.
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//
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int dumpMemory(uint32_t memaddr, uint32_t memsize, uint32_t memwidth, uint32_t dispaddr, uint8_t dispwidth)
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{
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uint8_t displayWidth = dispwidth;;
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uint32_t pnt = memaddr;
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uint32_t endAddr = memaddr + memsize;
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uint32_t addr = dispaddr;
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uint32_t i = 0;
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//uint32_t data;
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int8_t keyIn;
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char c = 0;
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// If not set, calculate output line width according to connected display width.
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//
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if(displayWidth == 0)
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{
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switch(getScreenWidth())
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{
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case 40:
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displayWidth = 8;
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break;
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case 80:
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displayWidth = 16;
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break;
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default:
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displayWidth = 32;
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break;
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}
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}
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while (1)
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{
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printf("%08lX", addr); // print address
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printf(": ");
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// print hexadecimal data
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for (i=0; i < displayWidth; )
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{
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switch(memwidth)
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{
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case 16:
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if(pnt+i < endAddr)
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printf("%04X", *(uint16_t *)(pnt+i));
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else
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printf(" ");
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//printf(" ");
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i+=2;
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break;
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case 32:
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if(pnt+i < endAddr)
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printf("%08lX", *(uint32_t *)(pnt+i));
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else
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printf(" ");
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i+=4;
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break;
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case 8:
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default:
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if(pnt+i < endAddr)
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printf("%02X", *(uint8_t *)(pnt+i));
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else
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printf(" ");
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i++;
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break;
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}
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fputc((char)' ', stdout);
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}
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// print ascii data
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printf(" |");
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// print single ascii char
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for (i=0; i < displayWidth; i++)
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{
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c = (char)*(uint8_t *)(pnt+i);
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if ((pnt+i < endAddr) && (c >= ' ') && (c <= '~'))
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fputc((char)c, stdout);
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else
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fputc((char)' ', stdout);
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}
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puts("|");
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// Move on one row.
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pnt += displayWidth;
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addr += displayWidth;
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// User abort (ESC), pause (Space) or all done?
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//
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keyIn = getKey(0);
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if(keyIn == ' ')
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{
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do {
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keyIn = getKey(0);
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} while(keyIn != ' ' && keyIn != 0x1b);
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}
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// Escape key pressed, exit with 0 to indicate this to caller.
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if (keyIn == 0x1b)
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{
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return(0);
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}
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// End of buffer, exit the loop.
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if(pnt >= (memaddr + memsize))
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{
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break;
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}
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}
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// Normal exit, return -1 to show no key pressed.
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return(-1);
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}
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// Main entry and start point of a zOS/ZPUTA Application. Only 2 parameters are catered for and a 32bit return code, additional parameters can be added by changing the appcrt0.s
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// startup code to add them to the stack prior to app() call.
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//
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@@ -143,6 +260,7 @@ uint32_t app(uint32_t param1, uint32_t param2)
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int argc = 0;
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int help_flag = 0;
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int uploadFNLen = 0;
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int debug_flag = 0;
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int verbose_flag = 0;
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int opt;
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int updateFNLen = 0;
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@@ -180,6 +298,7 @@ uint32_t app(uint32_t param1, uint32_t param2)
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{
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{"help", 'h', OPTPARSE_NONE},
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{"file", 'f', OPTPARSE_REQUIRED},
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{"debug", 'd', OPTPARSE_NONE},
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{"verbose", 'v', OPTPARSE_NONE},
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{0}
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};
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@@ -200,6 +319,10 @@ uint32_t app(uint32_t param1, uint32_t param2)
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updateFNLen = strlen(updateFile);
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break;
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case 'd':
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debug_flag = 1;
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break;
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case 'v':
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verbose_flag = 1;
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break;
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@@ -272,54 +395,53 @@ uint32_t app(uint32_t param1, uint32_t param2)
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// If all ok, indicate file has been opened then prepare to read and flash.
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if(fResult == FR_OK)
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{
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printf("Opened file: %s, size=%ld bytes\n", updateFile, fileSize);
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printf("Flash will now commence, no further output if core kernel drivers being updated.\nPlease reset after 30 seconds if no further message seen...\n");
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// Indicate file, size and that it has been verified using the security flags.
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printf("%s %s\n\n", APP_NAME, VERSION);
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printf("Firmware update file: %s, size=%ld bytes\n\n", updateFile, fileSize);
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printf("*******************************************************************************************************************\n");
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printf("Flash will now commence, no further output will be made until the flash is successfully programmed.\n");
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printf("If no further output is seen within 30 seconds, please assume the programming failed and make a hard reset.\n");
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printf("If device doesnt restart use an OpenSDA or JTAG programmer to reprogram the OS.\n");
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printf("*******************************************************************************************************************\n");
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// Slight delay to allow the output to flush to the user serial console.
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uint32_t startTime = G->millis;
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while((G->millis - startTime) < 5000);
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// Enter a loop, reading sector at a time from the SD card and flashing it into the Flash RAM.
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uint32_t startTime = *G->millis;
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while((*G->millis - startTime) < 1000) {};
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// Enter a loop, interrupts disabled, reading sector at a time from the SD card and flashing it into the Flash RAM.
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//
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__disable_irq();
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bytesProcessed = 0;
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do {
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sizeToRead = (fileSize-bytesProcessed) > SECTOR_SIZE ? SECTOR_SIZE : fileSize - bytesProcessed;
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sizeToRead = (fileSize-bytesProcessed) > FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE ? FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE : fileSize - bytesProcessed;
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fResult = f_read(&fileHandle, buffer, sizeToRead, &readSize);
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if (fResult || readSize == 0) break; /* error or eof */
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// If a sector isnt full, ie. last sector, pad with 0xFF.
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//
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if(readSize != SECTOR_SIZE)
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if(readSize != FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE)
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{
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for(uint16_t idx=readSize; idx < SECTOR_SIZE; idx++) { buffer[idx] = 0xFF; }
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for(uint16_t idx=readSize; idx < FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE; idx++) { buffer[idx] = 0xFF; }
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}
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// Flash the sector into the correct location governed by the bytes already processed. We flash in 8 byte rows, we could flash full sectors but need to avoid the
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// device protection region. The only downside of flashing in 8 byte chunks is the call overheads but these are negligible on the K64F.
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// Flash the sector into the correct location governed by the bytes already processed. We flash a K64F programming sector at a time with unused space set to 0xFF.
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//
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__disable_irq();
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// Now program the sectors worth of data.
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for(uint32_t idx=bytesProcessed; idx < bytesProcessed+SECTOR_SIZE; idx+=8)
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flashResult = FLASH_Erase(&flashDriver, bytesProcessed, FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE, kFLASH_ApiEraseKey);
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// If no previous errors, program the next sector.
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if(flashResult == kStatus_FLASH_Success)
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{
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// Skip the device protection bits, we dont want to overwrite these, should only be programed whenan external OpenSDA is connected.
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if(idx < FLASH_PROTECTION_START_ADDR && idx > FLASH_PROTECTION_START_ADDR+FLASH_PROTECTION_SIZE-1)
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{
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// If no previous errors, program the next 8 bytes.
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flashResult = FLASH_Erase(&flashDriver, idx, 8, kFLASH_ApiEraseKey);
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if(flashResult == kStatus_FLASH_Success)
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flashResult = FLASH_Program(&flashDriver, idx, (uint32_t*)buffer[idx], 8);
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}
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flashResult = FLASH_Program(&flashDriver, bytesProcessed, (uint32_t*)buffer, FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE);
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}
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__enable_irq();
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// Update the address/bytes processed count.
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bytesProcessed += SECTOR_SIZE;
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bytesProcessed += FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE;
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} while(bytesProcessed < fileSize && flashResult == kStatus_FLASH_Success);
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__enable_irq();
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// Verbose output.
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if(verbose_flag)
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printf("Bytes processed:%ld\n", bytesProcessed);
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printf("Bytes processed:%ld, exit status:%s\n", bytesProcessed, flashResult == kStatus_FLASH_Success ? "Success" : "Fail");
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// Success in programming, clear rest of flash RAM.
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if(flashResult == kStatus_FLASH_Success)
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@@ -340,21 +462,22 @@ uint32_t app(uint32_t param1, uint32_t param2)
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// Any errors, report (assuming kernel still intact) and hang.
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if (flashResult != kStatus_FLASH_Success)
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{
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// This message may not be seen if the kernel has been wiped. put here incase of error before erase.
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// This message may not be seen if the kernel has been wiped. put here in-case of error before erase.
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printf("Error: Failed to program new upgrade into Flash memory area!\n");
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printf(" Reset device. If device doesnt restart use an OpenSDA or JTAG programmer to reprogram.\n\n");
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while(1) {};
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}
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// Debug - place a message in an unused sector which can be checked to see if programming worked.
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if(0)
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if(debug_flag)
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{
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sprintf(buffer, "FLASH PROGRAMMING CHECK MESSAGE");
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for(uint16_t idx=strlen(buffer); idx < SECTOR_SIZE; idx++) { buffer[idx] = 0x00; }
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for(uint16_t idx=strlen(buffer); idx < FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE; idx++) { buffer[idx] = 0x00; }
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__disable_irq();
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flashResult = FLASH_Erase(&flashDriver, bytesProcessed+4096, SECTOR_SIZE, kFLASH_ApiEraseKey);
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flashResult = FLASH_Program(&flashDriver, bytesProcessed+4096, (uint32_t*)buffer, SECTOR_SIZE);
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flashResult = FLASH_Erase(&flashDriver, bytesProcessed+FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE, FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE, kFLASH_ApiEraseKey);
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flashResult = FLASH_Program(&flashDriver, bytesProcessed+FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE, (uint32_t*)buffer, FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE);
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__enable_irq();
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printf("Wrote check string at: %08lx\n", bytesProcessed+FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE);
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}
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// Just in case we have output connectivity. If the update doesnt change too much then we should maintain connectivity with the USB.
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10
buildall
10
buildall
@@ -1,5 +1,8 @@
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#!/bin/bash
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# Target machine, used to select the right software for the SD card.
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TARGET=MZ-700
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ZPU_SHARPMZ_BUILD=1
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ZPU_SHARPMZ_APPADDR=0x100000
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ZPU_SHARPMZ_APPSIZE=0x70000
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@@ -12,7 +15,10 @@ ZPU_E115_APPSIZE=0x8000
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ZPU_E115_HEAPSIZE=0x4000
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ZPU_E115_STACKSIZE=0x3D80
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# NB: When setting this variable, see lower section creating the SD card image which uses a hard coded value and will need updating.
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ROOT_DIR=/dvlp/Projects/dev/github/
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# NB: This clean out is intentionally hard coded as -fr is dangerous, if a variable failed to be set if could see your source base wiped out.
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rm -fr /dvlp/Projects/dev/github/zSoft/SD/K64F/*
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(
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# Ensure the zOS target directories exist.
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@@ -113,10 +119,10 @@ cp $tzfsdir/roms/monitor_80c_1Z-013A.rom $k64fsddir/TZFS/1Z-013A-8.rom
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cp $tzfsdir/roms/monitor_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM.rom
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cp $tzfsdir/roms/monitor_80c_1Z-013A-KM.rom $k64fsddir/TZFS/1Z-013A-KM-8.rom
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cp $tzfsdir/roms/MZ80B_IPL.rom $k64fsddir/TZFS/MZ80B_IPL.rom
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cp $tzfsdir/MZF/CPM223.MZF $k64fsddir/MZF/
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cp $tzfsdir/MZF/Common/CPM223.MZF $k64fsddir/MZF/
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cp $tzfsdir/roms/cpm22.bin $k64fsddir/CPM/
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cp $tzfsdir/CPM/SDC16M/RAW/* $k64fsddir/CPM/
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cp $tzfsdir/MZF/* $k64fsddir/MZF/
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cp $tzfsdir/MZF/${TARGET}/* $k64fsddir/MZF/
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cp $tzfsdir/BAS/* $k64fsddir/BAS/
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cp $tzfsdir/CAS/* $k64fsddir/CAS/
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)
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File diff suppressed because it is too large
Load Diff
@@ -42,6 +42,7 @@
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#define HOST_MON_TEST_VECTOR 0x4 // Address in the host monitor to test to identify host type.
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#define DEFAULT_BUSREQ_TIMEOUT 5000 // Timeout for a Z80 Bus request operation in milliseconds.
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#define DEFAULT_RESET_PULSE_WIDTH 500000 // Pulse width of a reset signal in K64F clock ticks.
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#define TZFS_AUTOBOOT_FLAG "0:\\TZFSBOOT.FLG" // Filename used as a flag, if this file exists in the SD root directory then TZFS is booted automatically.
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// tranZPUter Memory Modes - select one of the 32 possible memory models using these constants.
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//
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@@ -54,11 +55,14 @@
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#define TZMM_CPM 0x06 // CPM main memory configuration, all memory on the tranZPUter board, 64K block 4 selected. Special case for F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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#define TZMM_CPM2 0x07 // CPM main memory configuration, F000-FFFF are on the tranZPUter board in block 4, 0040-CFFF and E800-EFFF are in block 5, mainboard for D000-DFFF (video), E000-E800 (Memory control) selected.
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// Special case for 0000:003F (interrupt vectors) which resides in block 4, F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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#define TZMM_COMPAT 0x08 // Original mode but with main DRAM in Bank 0 to allow bootstrapping of programs from other machines such as the MZ700.
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#define TZMM_HOSTACCESS 0x09 // Mode to allow code running in Bank 0, address E800:FFFF to access host memory. Monitor ROM 0000-0FFF and Main DRAM 0x1000-0xD000, video and memory mapped I/O are on the host machine, User/Floppy ROM E800-FFFF are in tranZPUter memory.
|
||||
#define TZMM_MZ700_0 0x0a // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the mainboard.
|
||||
#define TZMM_MZ700_1 0x0b // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
|
||||
#define TZMM_MZ700_2 0x0c // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
|
||||
#define TZMM_MZ700_3 0x0d // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
|
||||
#define TZMM_MZ700_4 0x0e // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
|
||||
#define TZMM_MZ800 0x0f // MZ800 Mode - Host is an MZ-800 and mode provides for MZ-700/MZ-800 decoding per original machine.
|
||||
#define TZMM_FPGA 0x15 // Open up access for the K64F to the FPGA resources such as memory. All other access to RAM or mainboard is blocked.
|
||||
#define TZMM_TZPUM 0x16 // Everything is on mainboard, no access to tranZPUter memory.
|
||||
#define TZMM_TZPU 0x17 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory. K64F drives A18-A16 allowing full access to RAM.
|
||||
@@ -70,7 +74,6 @@
|
||||
#define TZMM_TZPU5 0x1D // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 5 is selected.
|
||||
#define TZMM_TZPU6 0x1E // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 6 is selected.
|
||||
#define TZMM_TZPU7 0x1F // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 7 is selected.
|
||||
#define TZMM_ENIOWAIT 0x20 // Enable wait state generator for Sharp system IO operations in region 0xE0-0xFF.
|
||||
|
||||
// IO addresses on the tranZPUter or mainboard.
|
||||
//
|
||||
@@ -86,6 +89,14 @@
|
||||
#define IO_TZ_CPLDCFG 0x6E // Version 2.1 CPLD configuration register.
|
||||
#define IO_TZ_CPLDSTATUS 0x6E // Version 2.1 CPLD status register.
|
||||
#define IO_TZ_CPLDINFO 0x6F // Version 2.1 CPLD version information register.
|
||||
#define IO_TZ_MMIO0 0xE0 // MZ-700/MZ-800 Memory management selection ports.
|
||||
#define IO_TZ_MMIO1 0xE1 // ""
|
||||
#define IO_TZ_MMIO2 0xE2 // ""
|
||||
#define IO_TZ_MMIO3 0xE3 // ""
|
||||
#define IO_TZ_MMIO4 0xE4 // ""
|
||||
#define IO_TZ_MMIO5 0xE5 // ""
|
||||
#define IO_TZ_MMIO6 0xE6 // ""
|
||||
#define IO_TZ_MMIO7 0xE7 // MZ-700/MZ-800 Memory management selection ports.
|
||||
#define IO_TZ_SYSCTRL 0xF0 // System board control register. [2:0] - 000 MZ80A Mode, 2MHz CPU/Bus, 001 MZ80B Mode, 4MHz CPU/Bus, 010 MZ700 Mode, 3.54MHz CPU/Bus.
|
||||
#define IO_TZ_GRAMMODE 0xF4 // MZ80B Graphics mode. Bit 0 = 0, Write to Graphics RAM I, Bit 0 = 1, Write to Graphics RAM II. Bit 1 = 1, blend Graphics RAM I output on display, Bit 2 = 1, blend Graphics RAM II output on display.
|
||||
#define IO_TZ_VMCTRL 0xF8 // Video Module control register. [2:0] - 000 (default) = MZ80A, 001 = MZ-700, 010 = MZ800, 011 = MZ80B, 100 = MZ80K, 101 = MZ80C, 110 = MZ1200, 111 = MZ2000. [3] = 0 - 40 col, 1 - 80 col.
|
||||
@@ -95,6 +106,17 @@
|
||||
#define IO_TZ_VMBLUEMASK 0xFC // Video Module Blue bit mask (1 bit = 1 pixel, 8 pixels per byte).
|
||||
#define IO_TZ_VMPAGE 0xFD // Video Module memory page register. [1:0] switches in 1 16Kb page (3 pages) of graphics ram to C000 - FFFF. Bits [1:0] = page, 00 = off, 01 = Red, 10 = Green, 11 = Blue. This overrides all MZ700/MZ80B page switching functions. [7] 0 - normal, 1 - switches in CGROM for upload at D000:DFFF.
|
||||
|
||||
// Addresses on the tranZPUter board.
|
||||
//
|
||||
#define SRAM_BANK0_ADDR 0x00000 // Address of the 1st 64K RAM bank in the SRAM chip.
|
||||
#define SRAM_BANK1_ADDR 0x10000 // ""
|
||||
#define SRAM_BANK2_ADDR 0x20000 // ""
|
||||
#define SRAM_BANK3_ADDR 0x30000 // ""
|
||||
#define SRAM_BANK4_ADDR 0x40000 // ""
|
||||
#define SRAM_BANK5_ADDR 0x50000 // ""
|
||||
#define SRAM_BANK6_ADDR 0x60000 // ""
|
||||
#define SRAM_BANK7_ADDR 0x70000 // Address of the 8th 64K RAM bank in the SRAM chip.
|
||||
|
||||
// IO register constants.
|
||||
//
|
||||
#define CPUMODE_SET_Z80 0x00 // Set the CPU to the hard Z80.
|
||||
@@ -116,19 +138,31 @@
|
||||
#define CPUMODE_IS_SOFT_AVAIL 0x040 // Marker to indicate if the underlying FPGA can support soft CPU's.
|
||||
#define CPUMODE_IS_SOFT_MASK 0x03F // Mask to filter out the Soft CPU availability flags.
|
||||
|
||||
// CPLD Configuration constants.
|
||||
#define MODE_MZ80K 0x00 // Hardware mode = MZ80K
|
||||
#define MODE_MZ80C 0x01 // Hardware mode = MZ80C
|
||||
#define MODE_MZ1200 0x02 // Hardware mode = MZ1200
|
||||
#define MODE_MZ80A 0x03 // Hardware mode = MZ80A
|
||||
#define MODE_MZ700 0x04 // Hardware mode = MZ700
|
||||
#define MODE_MZ800 0x05 // Hardware mode = MZ800
|
||||
#define MODE_MZ80B 0x06 // Hardware mode = MZ80B
|
||||
#define MODE_MZ2000 0x07 // Hardware mode = MZ2000
|
||||
#define MODE_VIDEO_MODULE_DISABLED 0x08 // Hardware enable (bit 3 = 0) or disable of the Video Module.
|
||||
#define MODE_PRESERVE_CONFIG 0x80 // Preserve hardware configuration on RESET.
|
||||
|
||||
// Video Module control bits.
|
||||
#define SYSMODE_MZ80A 0x00 // System board mode MZ80A, 2MHz CPU/Bus.
|
||||
#define SYSMODE_MZ80B 0x01 // System board mode MZ80B, 4MHz CPU/Bus.
|
||||
#define SYSMODE_MZ700 0x02 // System board mode MZ700, 3.54MHz CPU/Bus.
|
||||
#define VMMODE_MASK 0xF8 // Mask to mask out video mode.
|
||||
#define VMMODE_MZ80K 0x00 // Video mode = MZ80K
|
||||
#define VMMODE_MZ80C 0x01 // Video mode = MZ80C
|
||||
#define VMMODE_MZ1200 0x02 // Video mode = MZ1200
|
||||
#define VMMODE_MZ80A 0x03 // Video mode = MZ80A
|
||||
#define VMMODE_MZ700 0x04 // Video mode = MZ700
|
||||
#define VMMODE_MZ800 0x05 // Video mode = MZ800
|
||||
#define VMMODE_MZ80B 0x06 // Video mode = MZ80B
|
||||
#define VMMODE_MZ2000 0x07 // Video mode = MZ2000
|
||||
#define VMMODE_MZ80K MODE_MZ80K // Video mode = MZ80K
|
||||
#define VMMODE_MZ80C MODE_MZ80C // Video mode = MZ80C
|
||||
#define VMMODE_MZ1200 MODE_MZ1200 // Video mode = MZ1200
|
||||
#define VMMODE_MZ80A MODE_MZ80A // Video mode = MZ80A
|
||||
#define VMMODE_MZ700 MODE_MZ700 // Video mode = MZ700
|
||||
#define VMMODE_MZ800 MODE_MZ800 // Video mode = MZ800
|
||||
#define VMMODE_MZ80B MODE_MZ80B // Video mode = MZ80B
|
||||
#define VMMODE_MZ2000 MODE_MZ2000 // Video mode = MZ2000
|
||||
#define VMMODE_80CHAR 0x08 // Enable 80 character display.
|
||||
#define VMMODE_80CHAR_MASK 0xF7 // Mask to filter out display width control bit.
|
||||
#define VMMODE_COLOUR 0x10 // Enable colour display.
|
||||
@@ -176,17 +210,19 @@
|
||||
|
||||
// Sharp MZ constants.
|
||||
//
|
||||
#define MZ_MROM_ADDR 0x0000 // Monitor ROM start address.
|
||||
#define MZ_800_IPL_ADDR 0xE000 // Address of the 9Z_504M IPL BIOS.
|
||||
#define MZ_800_IOCS_ADDR 0xF400 // Address of the MZ-800 common IOCS bios.
|
||||
#define MZ_MROM_STACK_ADDR 0x1000 // Monitor ROM start stack address.
|
||||
#define MZ_MROM_STACK_SIZE 0x0200 // Monitor ROM stack size.
|
||||
#define MZ_UROM_ADDR 0xE800 // User ROM start address.
|
||||
#define MZ_BANKRAM_ADDR 0xF000 // Floppy API address which is used in TZFS as the paged RAM for additional functionality.
|
||||
#define MZ_ZOS_ADDR 0x100000 // zOS boot location for the ZPU in FPGA BRAM memory.
|
||||
#define MZ_CMT_ADDR 0x10F0 // Address of the CMT (tape) header record.
|
||||
#define MZ_CMT_DEFAULT_LOAD_ADDR 0x1200 // The default load address for a CMT, anything below this is normally illegal.
|
||||
#define MZ_VID_RAM_ADDR 0xD000 // Start of Video RAM
|
||||
#define MZ_MROM_ADDR 0x00000 // Monitor ROM start address.
|
||||
#define MZ_800_MROM_ADDR 0x70000 // MZ-800 Monitor ROM address.
|
||||
#define MZ_800_CGROM_ADDR 0x71000 // MZ-800 CGROM address during reset when it is loaded into the PCG.
|
||||
#define MZ_800_IPL_ADDR 0x7E000 // Address of the 9Z_504M IPL BIOS.
|
||||
#define MZ_800_IOCS_ADDR 0x7F400 // Address of the MZ-800 common IOCS bios.
|
||||
#define MZ_MROM_STACK_ADDR 0x01000 // Monitor ROM start stack address.
|
||||
#define MZ_MROM_STACK_SIZE 0x000EF // Monitor ROM stack size.
|
||||
#define MZ_UROM_ADDR 0x0E800 // User ROM start address.
|
||||
#define MZ_BANKRAM_ADDR 0x0F000 // Floppy API address which is used in TZFS as the paged RAM for additional functionality.
|
||||
#define MZ_ZOS_ADDR 0x0100000 // zOS boot location for the ZPU in FPGA BRAM memory.
|
||||
#define MZ_CMT_ADDR 0x010F0 // Address of the CMT (tape) header record.
|
||||
#define MZ_CMT_DEFAULT_LOAD_ADDR 0x01200 // The default load address for a CMT, anything below this is normally illegal.
|
||||
#define MZ_VID_RAM_ADDR 0x0D000 // Start of Video RAM
|
||||
#define MZ_VID_RAM_SIZE 2048 // Size of Video RAM.
|
||||
#define MZ_VID_DFLT_BYTE 0x00 // Default character (SPACE) for video RAM.
|
||||
#define MZ_ATTR_RAM_ADDR 0xD800 // On machines with the upgrade, the start of the Attribute RAM.
|
||||
@@ -211,6 +247,7 @@
|
||||
#define MZ_ROM_9Z_504M_COMBINED "0:\\TZFS\\MZ800_IPL.rom" // Original MZ-800 BIOS which comprises the 1Z_013B BIOS, 9Z_504M IPL, CGROM and IOCS.
|
||||
#define MZ_ROM_9Z_504M "0:\\TZFS\\MZ800_9Z_504M.rom" // Modified MZ-800 9Z_504M IPL to contain a select TZFS option.
|
||||
#define MZ_ROM_1Z_013B "0:\\TZFS\\MZ800_1Z_013B.rom" // Original MZ-800 1Z_013B MZ-700 compatible BIOS.
|
||||
#define MZ_ROM_800_CGROM "0:\\TZFS\\MZ800_CGROM.ORI" // Original MZ-800 Character Generator ROM.
|
||||
#define MZ_ROM_800_IOCS "0:\\TZFS\\MZ800_IOCS.rom" // Original MZ-800 common IOCS bios.
|
||||
#define MZ_ROM_MZ80B_IPL "0:\\TZFS\\MZ80B_IPL.ROM" // Original IPL ROM for the Sharp MZ-80B.
|
||||
#define MZ_ROM_TZFS "0:\\TZFS\\TZFS.ROM" // tranZPUter Filing System ROM.
|
||||
@@ -415,22 +452,28 @@
|
||||
//#define readCtrlLatch() ( ((GPIOB_PDIR & 0x00000200) >> 5) | (GPIOB_PDIR & 0x0000000f) )
|
||||
#define readCtrlLatchDirect() ( inZ80IO(IO_TZ_CTRLLATCH) )
|
||||
#define readCtrlLatch() ( readZ80IO(IO_TZ_CTRLLATCH, TRANZPUTER) )
|
||||
#define writeCtrlLatch(a) { setZ80Direction(WRITE); outZ80IO(IO_TZ_CTRLLATCH, a); }
|
||||
#define writeCtrlLatch(a) { printf("WL:%02x\n", a); setZ80Direction(WRITE); outZ80IO(IO_TZ_CTRLLATCH, a); }
|
||||
//#define setZ80Direction(a) { for(uint8_t idx=Z80_D0; idx <= Z80_D7; idx++) { if(a == WRITE) { pinOutput(idx); } else { pinInput(idx); } }; z80Control.busDir = a; }
|
||||
#define setZ80Direction(a) {{ if(a == WRITE) { setZ80DataAsOutput(); } else { setZ80DataAsInput(); } }; z80Control.busDir = a; }
|
||||
#define reqZ80BusChange(a) { if(a == MAINBOARD_ACCESS && z80Control.ctrlMode == TRANZPUTER_ACCESS) \
|
||||
{\
|
||||
pinHigh(CTL_MBSEL);\
|
||||
z80Control.ctrlMode = MAINBOARD_ACCESS;\
|
||||
z80Control.curCtrlLatch = TZMM_ORIG | TZMM_ENIOWAIT;\
|
||||
writeCtrlLatch(z80Control.curCtrlLatch);\
|
||||
z80Control.curCtrlLatch = TZMM_ORIG;\
|
||||
setZ80Direction(WRITE); \
|
||||
writeCtrlLatch(z80Control.curCtrlLatch); \
|
||||
} else if(a == TRANZPUTER_ACCESS && z80Control.ctrlMode == MAINBOARD_ACCESS)\
|
||||
{\
|
||||
pinLow(CTL_MBSEL);\
|
||||
z80Control.ctrlMode = TRANZPUTER_ACCESS;\
|
||||
z80Control.curCtrlLatch = TZMM_TZPU | TZMM_ENIOWAIT;\
|
||||
z80Control.curCtrlLatch = TZMM_TZPU;\
|
||||
setZ80Direction(WRITE); \
|
||||
writeCtrlLatch(z80Control.curCtrlLatch);\
|
||||
} }
|
||||
} else\
|
||||
{\
|
||||
setZ80Direction(WRITE); \
|
||||
}\
|
||||
}
|
||||
// Lower level macro without pin mapping as this is called in the ResetHandler to halt the Z80 whilst the K64F starts up and is able to load up tranZPUter software.
|
||||
#define holdZ80() { \
|
||||
*portModeRegister(CTL_BUSRQ_PIN) = 1; \
|
||||
@@ -535,14 +578,14 @@ enum VIDEO_FRAMES {
|
||||
// Possible machines the tranZPUter can be hosted on and can emulate.
|
||||
//
|
||||
enum MACHINE_TYPES {
|
||||
MZ80K = 0x00, // Machine = MZ-80K.
|
||||
MZ80C = 0x01, // Machine = MZ-80C.
|
||||
MZ1200 = 0x02, // Machine = MZ-1200.
|
||||
MZ80A = 0x03, // Machine = MZ-80A.
|
||||
MZ700 = 0x04, // Machine = MZ-700.
|
||||
MZ800 = 0x05, // Machine = MZ-800.
|
||||
MZ80B = 0x06, // Machine = MZ-80B.
|
||||
MZ2000 = 0x07 // Machine = MZ-2000.
|
||||
MZ80K = MODE_MZ80K, // Machine = MZ-80K.
|
||||
MZ80C = MODE_MZ80C, // Machine = MZ-80C.
|
||||
MZ1200 = MODE_MZ1200, // Machine = MZ-1200.
|
||||
MZ80A = MODE_MZ80A, // Machine = MZ-80A.
|
||||
MZ700 = MODE_MZ700, // Machine = MZ-700.
|
||||
MZ800 = MODE_MZ800, // Machine = MZ-800.
|
||||
MZ80B = MODE_MZ80B, // Machine = MZ-80B.
|
||||
MZ2000 = MODE_MZ2000 // Machine = MZ-2000.
|
||||
};
|
||||
|
||||
// Get and Set flags within the CPLD config and status registers.
|
||||
@@ -704,6 +747,11 @@ typedef struct __attribute__((__packed__)) {
|
||||
uint16_t sectorNo; // For virtual drives with track and sector this is the sector number. NB For LBA access, this is 32bit and overwrites fileNo/fileType which arent used during raw SD access.
|
||||
};
|
||||
uint32_t sectorLBA; // For LBA access, this is 32bit and used during raw SD access.
|
||||
struct {
|
||||
uint8_t memTarget; // Target memory for operation, 0 = tranZPUter, 1 = mainboard.
|
||||
uint8_t spare1; // Unused variable.
|
||||
uint16_t spare2; // Unused variable.
|
||||
};
|
||||
};
|
||||
uint8_t fileNo; // File number of a file within the last directory listing to open/update.
|
||||
uint8_t fileType; // Type of file being processed.
|
||||
@@ -829,7 +877,7 @@ void setupTranZPUter(void);
|
||||
void testRoutine(void);
|
||||
|
||||
#if defined __APP__
|
||||
int memoryDumpZ80(uint32_t, uint32_t, uint32_t, uint8_t, enum TARGETS);
|
||||
int memoryDumpZ80(uint32_t, uint32_t, uint32_t, uint8_t, uint8_t, enum TARGETS);
|
||||
#endif
|
||||
|
||||
// Debug methods.
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -16006,11 +16006,11 @@ shared variable ram : ram_type :=
|
||||
16968 => x"7a4f5300",
|
||||
16969 => x"2a2a2025",
|
||||
16970 => x"73202800",
|
||||
16971 => x"30362f30",
|
||||
16971 => x"31312f30",
|
||||
16972 => x"332f3230",
|
||||
16973 => x"32310000",
|
||||
16974 => x"76312e31",
|
||||
16975 => x"66000000",
|
||||
16975 => x"6b000000",
|
||||
16976 => x"205a5055",
|
||||
16977 => x"2c207265",
|
||||
16978 => x"76202530",
|
||||
|
||||
@@ -62175,7 +62175,7 @@ architecture arch of DualPort3264BootBRAM is
|
||||
7458 => x"20",
|
||||
7459 => x"00",
|
||||
7460 => x"2a",
|
||||
7461 => x"36",
|
||||
7461 => x"31",
|
||||
7462 => x"31",
|
||||
7463 => x"00",
|
||||
7464 => x"20",
|
||||
@@ -71281,9 +71281,9 @@ architecture arch of DualPort3264BootBRAM is
|
||||
7458 => x"20",
|
||||
7459 => x"00",
|
||||
7460 => x"2a",
|
||||
7461 => x"30",
|
||||
7461 => x"31",
|
||||
7462 => x"32",
|
||||
7463 => x"66",
|
||||
7463 => x"6b",
|
||||
7464 => x"2c",
|
||||
7465 => x"32",
|
||||
7466 => x"73",
|
||||
|
||||
@@ -51403,7 +51403,7 @@ architecture arch of DualPortBootBRAM is
|
||||
14920 => x"4f",
|
||||
14921 => x"2a",
|
||||
14922 => x"20",
|
||||
14923 => x"36",
|
||||
14923 => x"31",
|
||||
14924 => x"2f",
|
||||
14925 => x"31",
|
||||
14926 => x"31",
|
||||
@@ -69609,11 +69609,11 @@ architecture arch of DualPortBootBRAM is
|
||||
14920 => x"7a",
|
||||
14921 => x"2a",
|
||||
14922 => x"73",
|
||||
14923 => x"30",
|
||||
14923 => x"31",
|
||||
14924 => x"33",
|
||||
14925 => x"32",
|
||||
14926 => x"76",
|
||||
14927 => x"66",
|
||||
14927 => x"6b",
|
||||
14928 => x"20",
|
||||
14929 => x"2c",
|
||||
14930 => x"76",
|
||||
|
||||
@@ -51398,7 +51398,7 @@ architecture arch of SinglePortBootBRAM is
|
||||
14920 => x"4f",
|
||||
14921 => x"2a",
|
||||
14922 => x"20",
|
||||
14923 => x"36",
|
||||
14923 => x"31",
|
||||
14924 => x"2f",
|
||||
14925 => x"31",
|
||||
14926 => x"31",
|
||||
@@ -69604,11 +69604,11 @@ architecture arch of SinglePortBootBRAM is
|
||||
14920 => x"7a",
|
||||
14921 => x"2a",
|
||||
14922 => x"73",
|
||||
14923 => x"30",
|
||||
14923 => x"31",
|
||||
14924 => x"33",
|
||||
14925 => x"32",
|
||||
14926 => x"76",
|
||||
14927 => x"66",
|
||||
14927 => x"6b",
|
||||
14928 => x"20",
|
||||
14929 => x"2c",
|
||||
14930 => x"76",
|
||||
|
||||
@@ -14985,11 +14985,11 @@ shared variable ram : ram_type :=
|
||||
14920 => x"7a4f5300",
|
||||
14921 => x"2a2a2025",
|
||||
14922 => x"73202800",
|
||||
14923 => x"30362f30",
|
||||
14923 => x"31312f30",
|
||||
14924 => x"332f3230",
|
||||
14925 => x"32310000",
|
||||
14926 => x"76312e31",
|
||||
14927 => x"66000000",
|
||||
14927 => x"6b000000",
|
||||
14928 => x"205a5055",
|
||||
14929 => x"2c207265",
|
||||
14930 => x"76202530",
|
||||
|
||||
@@ -62175,7 +62175,7 @@ architecture arch of DualPort3264BootBRAM is
|
||||
7458 => x"20",
|
||||
7459 => x"00",
|
||||
7460 => x"2a",
|
||||
7461 => x"36",
|
||||
7461 => x"31",
|
||||
7462 => x"31",
|
||||
7463 => x"00",
|
||||
7464 => x"20",
|
||||
@@ -71281,9 +71281,9 @@ architecture arch of DualPort3264BootBRAM is
|
||||
7458 => x"20",
|
||||
7459 => x"00",
|
||||
7460 => x"2a",
|
||||
7461 => x"30",
|
||||
7461 => x"31",
|
||||
7462 => x"32",
|
||||
7463 => x"66",
|
||||
7463 => x"6b",
|
||||
7464 => x"2c",
|
||||
7465 => x"32",
|
||||
7466 => x"73",
|
||||
|
||||
@@ -51403,7 +51403,7 @@ architecture arch of DualPortBootBRAM is
|
||||
14920 => x"4f",
|
||||
14921 => x"2a",
|
||||
14922 => x"20",
|
||||
14923 => x"36",
|
||||
14923 => x"31",
|
||||
14924 => x"2f",
|
||||
14925 => x"31",
|
||||
14926 => x"31",
|
||||
@@ -69609,11 +69609,11 @@ architecture arch of DualPortBootBRAM is
|
||||
14920 => x"7a",
|
||||
14921 => x"2a",
|
||||
14922 => x"73",
|
||||
14923 => x"30",
|
||||
14923 => x"31",
|
||||
14924 => x"33",
|
||||
14925 => x"32",
|
||||
14926 => x"76",
|
||||
14927 => x"66",
|
||||
14927 => x"6b",
|
||||
14928 => x"20",
|
||||
14929 => x"2c",
|
||||
14930 => x"76",
|
||||
|
||||
@@ -51398,7 +51398,7 @@ architecture arch of SinglePortBootBRAM is
|
||||
14920 => x"4f",
|
||||
14921 => x"2a",
|
||||
14922 => x"20",
|
||||
14923 => x"36",
|
||||
14923 => x"31",
|
||||
14924 => x"2f",
|
||||
14925 => x"31",
|
||||
14926 => x"31",
|
||||
@@ -69604,11 +69604,11 @@ architecture arch of SinglePortBootBRAM is
|
||||
14920 => x"7a",
|
||||
14921 => x"2a",
|
||||
14922 => x"73",
|
||||
14923 => x"30",
|
||||
14923 => x"31",
|
||||
14924 => x"33",
|
||||
14925 => x"32",
|
||||
14926 => x"76",
|
||||
14927 => x"66",
|
||||
14927 => x"6b",
|
||||
14928 => x"20",
|
||||
14929 => x"2c",
|
||||
14930 => x"76",
|
||||
|
||||
@@ -106,8 +106,8 @@
|
||||
#endif
|
||||
|
||||
// Version info.
|
||||
#define VERSION "v1.1f"
|
||||
#define VERSION_DATE "06/03/2021"
|
||||
#define VERSION "v1.1k"
|
||||
#define VERSION_DATE "11/03/2021"
|
||||
#define PROGRAM_NAME "zOS"
|
||||
|
||||
// Utility functions.
|
||||
@@ -260,7 +260,7 @@ void tranZPUterControl(void)
|
||||
{
|
||||
// Locals.
|
||||
uint8_t ioAddr;
|
||||
|
||||
testTZFSAutoBoot();
|
||||
// Loop waiting on events and processing.
|
||||
//
|
||||
while(1)
|
||||
@@ -341,6 +341,11 @@ int cmdProcessor(void)
|
||||
// Initialise any globals in the structure used to pass working variables to apps.
|
||||
G.Sector = 0;
|
||||
|
||||
#if defined __TRANZPUTER__
|
||||
// Setup the tranZPUter hardware ready for action!
|
||||
setupTranZPUter();
|
||||
#endif
|
||||
|
||||
// Initialise the first disk if FS enabled as external commands depend on it.
|
||||
#if defined(__SD_CARD__)
|
||||
fr = FR_NOT_ENABLED;
|
||||
@@ -359,9 +364,6 @@ int cmdProcessor(void)
|
||||
fsInitialised = 1;
|
||||
|
||||
#if defined __TRANZPUTER__
|
||||
// Setup the tranZPUter ready for action!
|
||||
setupTranZPUter();
|
||||
|
||||
// Setup memory on Z80 to default.
|
||||
loadTranZPUterDefaultROMS(CPUMODE_SET_Z80);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user