47 lines
2.9 KiB
Plaintext
Vendored
47 lines
2.9 KiB
Plaintext
Vendored
Name SFD700_GAL2 ;
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PartNo GAL16V8 ;
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Date 22/05/2023 ;
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Revision 01 ;
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Designer Philip Smart ;
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Company engineers@work ;
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Assembly SFD700 ;
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Location ;
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Device g16v8 ;
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/* *************** CONSTANTS ********************** */
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$DEFINE ON 'b'1
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$DEFINE OFF 'b'0
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/* *************** INPUT PINS ********************* */
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PIN 1 = CLK ; /* Registered clock input */
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PIN 2 = A10 ; /* Address bus A10 */
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PIN 3 = A11 ; /* A11 */
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PIN 4 = A12 ; /* A12 */
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PIN 5 = A13 ; /* A13 */
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PIN 6 = A14 ; /* A14 */
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PIN 7 = A15 ; /* A15 */
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PIN 8 = !MREQn ; /* Z80 MREQ active low */
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PIN 9 = !RDn ; /* Z80 RD active low */
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PIN 12 = MODESEL0 ; /* Mode selection bit 0 */
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PIN 13 = MODESEL1 ; /* Mode selection bit 1 */
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PIN 14 = ROMINH ; /* Rom select inhibit */
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PIN 15 = ROMDIS ; /* Rom select disable */
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PIN 16 = DRQ ; /* FDC Data Request */
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/* *************** OUTPUT PINS ******************** */
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PIN 17 = ROMA15 ; /* ROM A15 */
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PIN 18 = ROMA10 ; /* ROM A10 */
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PIN 19 = !ROMCSn ; /* ROM Chip Select */
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/* Decoder equations. */
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FIELD HIADDR = [A15..A12] ; /* Address lines considered for ROM device. */
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ROMOUTSEL = MREQn & RDn & HIADDR:[F000..FFFF] ; /* Rom Select. */
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/* Assign output pins based on equations. */
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ROMCSn.D = ROMOUTSEL;
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ROMA15.D = MODESEL1;
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ROMA10.D = !DRQ;
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/*DRQ.OE = OFF; */
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/* ROMA10.OE = ON; */
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/* ROMA15.OE = ON; */
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