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Philip Smart
2020-03-02 12:12:12 +00:00
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71
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Name 286 GLUE LOGIC;
Partno 286PAL;
Date 14/02/88;
Revision 01;
Designer P.D. SMART;
Company SMART EXPERIENCE;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* Glue logic for controlling the 286 CPU on board the TurboRacer */
/* 286 Multi-purpose Multiprocessor PC expansion card. */
/* */
/******************************************************************/
/* Allowable Target Device Types: */
/******************************************************************/
/** Inputs **/
Pin 1 = A0 ; /* Addr A0 used for DRAM Write */
Pin 2 = A19 ; /* Addr A19 used for ROM select */
Pin 3 = BHE ; /* BHE signal used for DRAM write */
Pin 4 = WE ; /* WE signal used for DRAM write */
Pin 5 = PSEN ; /* PSEN used for DRAM write clock */
Pin 6 = DTR ; /* DT/-R signal from 82288 */
Pin 7 = DEN ; /* DEN signal from 82288 */
Pin 8 = MIO ; /* M/-IO signal from 82288 */
Pin 9 = !RESET ; /* Reset input from 286 */
Pin 11 = !ROMOUT ; /* Page ROMS out signal */
/** Outputs **/
Pin 12 = !ROMSEL ; /* Enable rom signal */
Pin 13 = !READRAM ; /* Enable RAM read latch outputs */
Pin 14 = !PE ; /* Enable 8207 port A */
Pin 15 = !EVENWR ; /* Write enable to even bytes */
Pin 16 = !ODDWR ; /* Write enable to odd bytes */
/** Declarations and Intermediate Variable Definitions **/
Z14 = RESET & !Z15;
Z15 = ROMOUT & !Z14;
Z16 = A19 & !Z14;
Z17 = !DTR & DEN;
Z18 = A19 & !Z14;
Z19 = !Z22 & !Z20;
Z20 = !Z19 & !PSEN;
Z21 = !Z20 & !PSEN & !Z22;
Z22 = A0 & !Z21;
Z23 = !Z20 & !Z24;
Z24 = !Z21 & !Z23;
Z25 = WE & !Z24;
Z26 = !Z29 & !Z27;
Z27 = !Z26 & !PSEN;
Z28 = !Z27 & !PSEN & !Z29;
Z29 = BHE & !Z28;
Z30 = !Z27 & !Z31;
Z31 = !Z30 & !Z28;
Z32 = !Z31 & WE;
/** Logic Equations **/
ROMSEL = !Z16;
READRAM = !Z17;
PE = !MIO # Z18;
EVENWR = !Z25;
ODDWR = !Z32;


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CUPL 2.15b Serial# 6-00002-120
Device p16l8 Library DLIB-h-24-8
Created Tue Jan 01 00:11:12 1980
Name CPU decoder PAL
Partno CPUDEC 1
Revision 01
Date 24/02/88
Designer P.D. Smart
Company Feduptronics
Assembly XXXXX
Location XXXXX
*QP20
*QF2048
*G0
*F0
*L0000 11111111111111111111111111111111
*L0032 11011111111111111111111111111111
*L0064 10111111111111111111111111111111
*L0096 11110111111111111111111111111111
*L0128 11111111011111111111111111111111
*L0160 11111111111110111111111111111111
*L0192 11111111111111111011111111111111
*L0256 11111111111111111111111111111111
*L0288 10011011101101110111111111111111
*L0512 11111111111111111111111111111111
*L0544 11011111111111111111111111111111
*L0576 10111111111111111111111111111111
*L0608 11111011111111111111111111111111
*L0640 11111111011111111111111111111111
*L0672 11111111111110111111111111111111
*L0704 11111111111111111011111111111111
*L0768 11111111111111111111111111111111
*L0800 10010111101101110111111111111111
*L1024 11111111111111111111111111111111
*L1056 11111111111111111111110101111111
*L1280 11111111111111111111111111111111
*L1312 11011111111111111101111111111111
*L1344 10111111111111111101111111111111
*L1376 11110111111111111101111111111111
*L1408 11111111101111111101111111111111
*L1440 11111111111110111101111111111111
*L1472 11111111111111111001111111111111
*L1536 11111111111111111111111111111111
*L1568 11111111111111111101011111111111
*L1792 11111111111111111111111111111111
*L1824 11111111111111111111111111110111
*C79E9
*4312

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CIRCUITS/CPUPAL.PLD Executable file
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Name CPU decoder PAL;
Partno CPUDEC 1;
Date 24/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to decode the 286 I/O ports to generate the 5 select */
/* signals required. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 16L8 */
/******************************************************************/
/** Inputs **/
Pin 1 = IOWR ; /* IOWR signal from 286 */
Pin 2 = IORD ; /* IORD signal from 286 */
Pin 3 = A1 ; /* Address signals from 286 */
Pin 4 = A2 ; /* */
Pin 5 = A10 ; /* */
Pin 6 = A11 ; /* */
Pin 7 = A19 ; /* */
Pin 8 = RESET ; /* Reset signal from CPU */
Pin 9 = MEMRES ; /* Memory reset pin */
/** Outputs **/
Pin 19 = LINKWR ; /* Signal to initiate a link write*/
Pin 18 = LINKRD ; /* Signal to initiate a link read */
Pin 17 = COMWR ; /* Write to command port */
Pin 16 = STATRD ; /* Read from status port */
Pin 15 = FF1 ; /* Flip flop output 1 */
Pin 14 = FF2 ; /* Flip flop output 2 */
Pin 13 = ROMSEL ; /* Select ROM */
Pin 12 = LOADSHIFT ; /* Load shift register signal */
/** Declarations and Intermediate Variable Definitions **/
/** Logic Equations **/
LINKWR = !(IOWR # !IORD # A1 # A2 # !A10 # !A11);
LINKRD = !IOWR # IORD # A1 # A2 # !A10 # !A11;
COMWR = !(IOWR # !IORD # !A1 # A2 # !A10 # !A11);
STATRD = !IOWR # IORD # !A1 # A2 # !A10 # !A11;
FF1 = !(FF2 & RESET);
FF2 = !(FF1 & (IOWR # !IORD # A1 # !A2 # !A10 # !A11));
ROMSEL = !(FF1 & A19);
LOADSHIFT= !MEMRES;


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Name CPU decoder PAL;
Partno CPUDEC 1;
Date 24/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to decode the 286 I/O ports to generate the 5 select */
/* signals required. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 16L8 */
/******************************************************************/
ORDER: IOWR, %1, IORD, %1, A1, %1, A2, %1, A10, %1, A11, %1, A19, %1,
RESET, %1, MEMRES, %2,
LINKWR, %1, LINKRD, %1, COMWR, %1, STATRD, %2, FF1, %1, FF2, %1,
ROMSEL, %2, LOADSHIFT;
VECTORS:
$msg " L ";
$msg " O ";
$msg " A ";
$msg " M L L S R D ";
$msg " R E I I C T O S ";
$msg " I I E M N N O A M H ";
$msg " O O A A A S R K K M T F F S I ";
$msg " W R A A 1 1 1 E E W R W R F F E F ";
$msg " R D 1 2 0 1 9 T S R D R D 1 2 L T ";
$msg " -------------------------------------";
1 1 0 0 0 0 1 0 0 L H L H H L L H /* Check basic inactive states */
1 1 0 0 0 1 1 0 0 L H L H H L L H
1 1 0 0 1 0 1 0 0 L H L H H L L H
1 1 0 0 1 1 1 0 0 L H L H H L L H
1 1 0 1 0 0 1 0 0 L H L H H L L H
1 1 0 1 0 1 1 0 0 L H L H H L L H
1 1 0 1 1 0 1 0 0 L H L H H L L H
1 1 0 1 1 1 1 0 0 L H L H H L L H
1 1 1 0 0 0 1 0 0 L H L H H L L H
1 1 1 0 0 1 1 0 0 L H L H H L L H
1 1 1 0 1 0 1 0 0 L H L H H L L H
1 1 1 0 1 1 1 0 0 L H L H H L L H
1 1 1 1 0 0 1 0 0 L H L H H L L H
1 1 1 1 0 1 1 0 0 L H L H H L L H
1 1 1 1 1 0 1 0 0 L H L H H L L H
1 1 1 1 1 1 1 0 0 L H L H H L L H
0 1 0 0 0 0 1 0 0 L H L H H L L H /* Check basic I/O write states */
0 1 0 0 0 1 1 0 0 L H L H H L L H
0 1 0 0 1 0 1 0 0 L H L H H L L H
0 1 0 0 1 1 1 0 0 H H L H H L L H
0 1 0 1 0 0 1 0 0 L H L H H L L H
0 1 0 1 0 1 1 0 0 L H L H H L L H
0 1 0 1 1 0 1 0 0 L H L H H L L H
0 1 0 1 1 1 1 0 0 L H L H H H L H
0 1 1 0 0 0 1 0 0 L H L H H L L H
0 1 1 0 0 1 1 0 0 L H L H H L L H
0 1 1 0 1 0 1 0 0 L H L H H L L H
0 1 1 0 1 1 1 0 0 L H H H H L L H
0 1 1 1 0 0 1 0 0 L H L H H L L H
0 1 1 1 0 1 1 0 0 L H L H H L L H
0 1 1 1 1 0 1 0 0 L H L H H L L H
0 1 1 1 1 1 1 0 0 L H L H H L L H
1 0 0 0 0 0 1 0 0 L H L H H L L H /* Check basic i/o read states */
1 0 0 0 0 1 1 0 0 L H L H H L L H
1 0 0 0 1 0 1 0 0 L H L H H L L H
1 0 0 0 1 1 1 0 0 L L L H H L L H
1 0 0 1 0 0 1 0 0 L H L H H L L H
1 0 0 1 0 1 1 0 0 L H L H H L L H
1 0 0 1 1 0 1 0 0 L H L H H L L H
1 0 0 1 1 1 1 0 0 L H L H H L L H
1 0 1 0 0 0 1 0 0 L H L H H L L H
1 0 1 0 0 1 1 0 0 L H L H H L L H
1 0 1 0 1 0 1 0 0 L H L H H L L H
1 0 1 0 1 1 1 0 0 L H L L H L L H
1 0 1 1 0 0 1 0 0 L H L H H L L H
1 0 1 1 0 1 1 0 0 L H L H H L L H
1 0 1 1 1 0 1 0 0 L H L H H L L H
1 0 1 1 1 1 1 0 0 L H L H H L L H
1 1 0 0 0 0 0 1 0 L H L H H L H H
1 1 0 0 0 0 0 0 0 L H L H H L H H
1 1 0 0 0 0 1 0 0 L H L H H L L H
1 1 0 0 0 0 1 1 0 L H L H H L L H
1 1 0 0 0 0 1 1 1 L H L H H L L L


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CUPL 2.15b Serial# 6-00002-120
Device p20ra10 Library DLIB-h-24-14
Created Tue Jan 01 00:04:24 1980
Name LINK PAL & COMMAND CONTROL
Partno LINK 1
Revision 01
Date 24/02/88
Designer P.D. Smart
Company Feduptronics
Assembly XXXXX
Location XXXXX
*QP24
*QF3210
*G0
*F0
*L0000 11111111111111111111111111111111
*L0032 11111111000000000000000000000000
*L0064 00000000000000001111111110111111
*L0096 11111111111111111111111111110111
*L0128 11111111111111111111111111111111
*L0320 11111111111111111111111111111111
*L0352 11111111000000000000000000000000
*L0384 00000000000000001011111111111111
*L0416 11111111111111111111111111111111
*L0448 11110111111111111111111111111111
*L0640 11111111111111111111111111111111
*L0672 11111111000000000000000000000000
*L0704 00000000000000001111111111111111
*L0736 11111111111111111111111111111111
*L0768 11111111111111111111111111111111
*L0800 11111101111111111111111111111101
*L0832 11111111000000000000000000000000
*L0960 11111111111111111111111111111111
*L0992 11111111000000000000000000000000
*L1024 00000000000000001111111111111111
*L1056 11111111111111111111111111111111
*L1088 11111111111111111111111111111111
*L1120 11011111111111111111111111011111
*L1152 11111111000000000000000000000000
*L1280 11111111111111111111111111111111
*L1312 11111111111111111111111111111111
*L1344 11110111111111110000000000000000
*L1440 11111111111111110111111111111111
*L1472 11111111000000000000000000000000
*L1600 11111111111111111111111111111111
*L1632 11111111111111111111111111111111
*L1664 11110111111111110000000000000000
*L1760 11111111111111111111011111111111
*L1792 11111111000000000000000000000000
*L1920 11111111111111111111111111111111
*L1952 11111111111111111111111111111111
*L1984 11110111111111110000000000000000
*L2080 11111111111111111111111101111111
*L2112 11111111000000000000000000000000
*L2240 11111111111111111111111111111111
*L2272 11111111111111111111111111111111
*L2304 11111111111111010000000000000000
*L2400 11111111111111111111111111111111
*L2432 01111111000000000000000000000000
*L2560 11111111111111111111111111111111
*L2592 11111111111111111111111111111111
*L2624 11111111111111010000000000000000
*L2720 11111111111111111111111111111111
*L2752 11110111000000000000000000000000
*L2944 00000000000000001111111111111111
*L2976 11111111111111111111111111111111
*L3008 11111111111111111111111111111111
*L3200 1111111110
*C99E6
*E697

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CIRCUITS/LINKPAL.PLD Executable file
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Name LINK PAL & COMMAND CONTROL;
Partno LINK 1;
Date 24/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to implement basic link handshaking and interupt gen- */
/* eration. Also implements PC-286 reset, and PC-8207 reset. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 20RA10 */
/******************************************************************/
/** Inputs **/
Pin 2 = PCRDLNK ; /* PC requests a read of LINK */
Pin 3 = PCWRLNK ; /* PC requests to write to LINK */
Pin 4 = READLNK ; /* 286 requests a read of LINK */
Pin 5 = WRITELNK ; /* 286 requests to write to LINK */
Pin 6 = PCD0 ; /* PC data bus D0 */
Pin 7 = PCD1 ; /* PC data bus D1 */
Pin 8 = PCD2 ; /* PC data bus D2 */
Pin 9 = PCCOM ; /* PC write command signal */
Pin 10 = D0 ; /* 286 data bus D0 */
Pin 11 = D1 ; /* 286 data bus D1 */
Pin 14 = COM ; /* 286 write command signal */
/** Outputs **/
Pin 23 = PCDATAR ; /* Data available output to PC */
Pin 22 = DATAR ; /* Data available output to 286 */
Pin 21 = INTR2 ; /* Interupt level 2 to PC */
Pin 20 = NMI ; /* NMI to 286 */
Pin 19 = MEMRESET ; /* Reset 8207 */
Pin 18 = 286RESET ; /* Reset 286 */
Pin 17 = PCCout ; /* Intermediate output */
Pin 16 = Cout ; /* Intermediate output */
Pin 15 = TEST ; /* A test/general purpose output */
/** Declarations and Intermediate Variable Definitions **/
PCDATAR.AP = PCWRLNK;
PCDATAR.AR = !READLNK;
PCDATAR.D = 'b'0;
PCDATAR.CK = 'b'0;
DATAR.AP = WRITELNK;
DATAR.AR = !PCRDLNK;
DATAR.D = 'b'0;
DATAR.CK = 'b'0;
MEMRESET.AP = 'b'0;
MEMRESET.AR = 'b'0;
MEMRESET.D = PCD0;
MEMRESET.CK = PCCOM;
286RESET.AP = 'b'0;
286RESET.AR = 'b'0;
286RESET.D = PCD1;
286RESET.CK = PCCOM;
PCCout.AP = 'b'0;
PCCout.AR = 'b'0;
PCCout.D = PCD2;
PCCout.CK = PCCOM;
Cout.AP = 'b'0;
Cout.AR = 'b'0;
Cout.D = D0;
Cout.CK = COM;
TEST.AP = 'b'0;
TEST.AR = 'b'0;
TEST.D = D1;
TEST.CK = COM;
/** Logic Equations **/
INTR2 = DATAR & Cout;
NMI = PCDATAR & PCCout;


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Name LINK PAL & COMMAND CONTROL;
Partno LINK 1;
Date 24/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to implement basic link handshaking and interupt gen- */
/* eration. Also implements PC-286 reset, and PC-8207 reset. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 20RA10 */
/******************************************************************/
ORDER: PCRDLNK, %1, PCWRLNK, %1, READLNK, %1, WRITELNK, %1, PCD0, %1,
PCD1, %1, PCD2, %1, PCCOM, %1, D0, %1, D1, %1, COM, %2,
PCDATAR, %1, DATAR, %1, INTR2, %1, NMI, %1, MEMRESET, %1,
286RESET, %1, PCCout, %1, Cout, %1, TEST;
VECTORS:
$msg " **INPUTS** *OUTPUT* ";
$msg " ";
$msg " W M 2 ";
$msg " P P R R P E 8 ";
$msg " C C A I C M 6 P ";
$msg " R W E T P D D I R R C ";
$msg " D R D E P P P C A A N E E C C T";
$msg " L L L L C C C C C T T T N S S o o E";
$msg " N N N N D D D O D D O A A R M E E u u S";
$msg " K K K K 0 1 2 M 0 1 M R R 2 I T T t t T";
$msg " ----------------------------------------";
1 0 1 0 0 0 0 1 0 0 1 X X X X X X X X X /* Test PC command reg */
1 0 1 0 0 0 1 C 0 0 1 X X X X L L H X X
1 0 1 0 0 1 0 C 0 0 1 X X X L L H L X X
1 0 1 0 0 1 1 C 0 0 1 X X X X L H H X X
1 0 1 0 1 0 0 C 0 0 1 X X X L H L L X X
1 0 1 0 1 0 1 C 0 0 1 X X X X H L H X X
1 0 1 0 1 1 0 C 0 0 1 X X X L H H L X X
1 0 1 0 1 1 1 C 0 0 1 X X X X H H H X X
1 0 1 0 0 0 0 1 0 0 C X X L L L L L L L /* Test 286 command reg*/
1 0 1 0 0 0 0 1 0 1 C X X L L L L L L H
1 0 1 0 0 0 0 1 1 0 C X X X L L L L H L
1 0 1 0 0 0 0 1 1 1 C X X X L L L L H H
1 0 1 1 0 0 0 1 0 0 1 X L L L L L L L L /* Test S R flip flops */
1 0 0 0 0 0 0 1 0 0 1 H L L L L L L L L
1 1 1 0 0 0 0 1 0 0 1 L L L L L L L L L
0 0 1 0 0 0 0 1 0 0 1 H L L L L L L L L
1 1 1 0 0 0 1 C 0 0 1 L H L L L L H L L


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CIRCUITS/MEMORY.JED Executable file
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CUPL 2.15b Serial# 6-00002-120
Device p20rs4 Library DLIB-h-24-21
Created Tue Jan 01 00:05:45 1980
Name Memory system control PAL
Partno MEM 1
Revision 01
Date 23/02/88
Designer P.D. Smart
Company Feduptronics
Assembly XXXXX
Location XXXXX
*QP24
*QF3330
*G0
*F0
*L0000 11111111111111111111111111111111
*L0032 11111111011111111111111111111111
*L0064 11111111111111110000000000000000
*L0320 11111111111111111111111111111111
*L0352 11111111111111111111111011110111
*L0384 11111111111111111111111111111111
*L0416 11100111111111111111111100000000
*L0896 00000000000000000000000011111111
*L0928 11111111111111111111111111111111
*L0960 11111111111111110111111111111111
*L0992 11111111111111111111011111111111
*L1024 11111111111111110000000000000000
*L2240 11111111111111111111111111111111
*L2272 11111111111111111111111111111111
*L2304 10111111111111111111111111111111
*L2336 11111111111101110111111111111011
*L2368 01111111111111111111111111111111
*L2816 00000000000000000000000011111111
*L2848 11111111111111111111111111111111
*L2880 11111111111111111111111111111011
*L2912 11110111111111111111111111111111
*L2944 11111111101101110000000000000000
*L3136 00000000000000000000000011111111
*L3168 11111111111111111111111111111111
*L3200 00011000110110000000000000000000
*L3232 00000001100000000000000000000000
*L3296 00000010100100000000000000000000
*C4F7D
*2862

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______________
| Memory |
NotPSEN x---|1 24|---x Vcc
PSEN x---|2 23|---x PSENInv
DTR x---|3 22|---x !EvenWR
DEN x---|4 21|---x !OddWR
BHE x---|5 20|---x EVEN
A0 x---|6 19|---x ODD
WE x---|7 18|---x
MIO x---|8 17|---x
A19 x---|9 16|---x !ReadMem
ROME x---|10 15|---x !PE
x---|11 14|---x
GND x---|12 13|---x
|______________|


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Name Memory system control PAL;
Partno MEM 1;
Date 23/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to glue the memory system to the 286 CPU. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 20RS4 */
/******************************************************************/
/** Inputs **/
Pin 1 = NotPSEN ; /* Inverted PSEN for clocking */
Pin 2 = PSEN ; /* PSEN before inversion */
Pin 3 = DTR ; /* DT/NOT R signal */
Pin 4 = DEN ; /* Data enable signal */
Pin 5 = BHE ; /* Bus High ENABLE */
Pin 6 = A0 ; /* Address bus A0 signal */
Pin 7 = WE ; /* Memory write enable */
Pin 8 = MIO ; /* Memory / Not IO signal */
Pin 9 = A19 ; /* Address bus A19 signal */
Pin 10 = ROME ; /* Rom enabled signal */
Pin 11 = EAACK ; /* Early DRAM acknowledge signal */
/** Outputs **/
Pin 23 = PSENInv ; /* Inverted PSEN output */
Pin 22 = EvenWR ; /* Evenbyte write signal */
Pin 21 = OddWR ; /* Oddbyte write signal */
Pin 20 = EVEN ; /* Intermediate even write output */
Pin 19 = ODD ; /* Intermediate odd write output */
Pin 16 = ReadMem ; /* Enable 374 gates for read */
Pin 15 = PE ; /* Enable 8207 PORT A */
Pin 14 = CRDY ; /* Composite READY enable signal */
/** Declarations and Intermediate Variable Definitions **/
EVEN.D = A0;
ODD.D = BHE;
X1 = !DTR & DEN;
X2 = A19 & ROME;
/** Logic Equations **/
PSENInv = !PSEN;
ReadMem = !X1;
PE = !MIO # X2;
EvenWR = !(WE & !EVEN);
OddWR = !(WE & !ODD);
CRDY = !X2 & EAACK;


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Name Memory system control PAL;
Partno MEM 1;
Date 23/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to glue the memory system to the 286 CPU. */
/* */
/******************************************************************/
/* Allowable Target Device Types: 20RS4 */
/******************************************************************/
ORDER: PSEN, %2, DTR, %1, DEN, %2, BHE, %1, A0, %1, NotPSEN, %1, WE, %2,
MIO, %1, A19, %1, ROME, %1, EAACK, %3,
PSENInv, %1, ReadMem, %1, EvenWR, %1, OddWR, %1, PE, %1, CRDY;
VECTORS:
$msg " **INPUTS** *OUTPUT* ";
$msg " ";
$msg " N P R ";
$msg " o S e E ";
$msg " t E E a v O ";
$msg " P P R A N d e d C ";
$msg " E D D B S M A O A I M n d R ";
$msg " S T E H A E W I 1 M C n e W W P D ";
$msg " N R N E 0 N E O 9 E K v m R R E Y ";
$msg " ----------------------------------------";
0 X X X X X X X X X X H X X X X X /* Test invertor */
1 X X X X X X X X X X L X X X X X
X 1 1 X X X X X X X X X H X X X X /* Testing memory read latch enabling */
X 1 0 X X X X X X X X X H X X X X
X 0 1 X X X X X X X X X L X X X X
X 0 0 X X X X X X X X X H X X X X
X X X X X X X 0 0 0 0 X X X X H L /* Testing 8207 enabling. Should only */
X X X X X X X 0 0 1 0 X X X X H L /* be enabled if a Memory access, and */
X X X X X X X 0 1 0 0 X X X X H L /* the ROM is disabled, or if ROM */
X X X X X X X 0 1 1 1 X X X X H L /* enabled, should only be enabled if */
X X X X X X X 1 0 0 1 X X X X L H /* A19 = 0 */
X X X X X X X 1 0 1 1 X X X X L H
X X X X X X X 1 1 0 1 X X X X L H
X X X X X X X 1 1 1 0 X X X X H L
X X X 1 1 C 0 X X X X X X H H X X /* Test WRITE output strobes. */
X X X 1 0 C 0 X X X X X X H H X X
X X X 0 1 C 0 X X X X X X H H X X
X X X 0 0 C 0 X X X X X X H H X X
X X X 1 1 C 1 X X X X X X H H X X
X X X 1 0 C 1 X X X X X X L H X X
X X X 0 1 C 1 X X X X X X H L X X
X X X 0 0 C 1 X X X X X X L L X X


105
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{De-Compiled Library}
PREFIX
END
'MEMPAL'
REFERENCE '20RS4'
{X Size =} 12 {Y Size =} 12 {Parts per Package =} 1
L1 1 IN 'N\o\t\P\S\E\N\'
L2 2 IN 'PSEN'
L3 3 IN 'DT/R\'
L4 4 IN 'DEN'
L5 5 IN 'BHE'
L6 6 IN 'A0'
L7 7 IN 'WE'
L8 8 IN 'M/I\O\'
L9 9 IN 'A19'
L10 10 IN 'ROME'
L11 11 IN 'E\A\A\C\K\'
R2 23 OUT 'PSENInv'
R4 22 OUT 'E\v\e\n\W\R\'
R5 21 OUT 'O\d\d\W\R\'
R7 16 OUT 'R\e\a\d\M\e\m\'
R9 15 OUT 'P\E\'
R11 14 OUT 'C\R\D\Y\'
T4 24 PWR 'VCC'
B4 12 PWR 'GND'
'PCPAL'
REFERENCE '16L8'
{X Size =} 12 {Y Size =} 13 {Parts per Package =} 1
L1 1 IN 'A0'
L2 2 IN 'A1'
L3 3 IN 'A3'
L4 4 IN 'A4'
L5 5 IN 'A5'
L6 6 IN 'A6'
L7 7 IN 'A7'
L8 8 IN 'A8'
L9 9 IN 'A9'
L10 11 IN 'C\P\U\A\E\N\'
L11 13 IN 'I\O\W\R\'
L12 14 IN 'I\O\R\D\'
R2 19 OUT 'R\D\S\T\A\T\'
R3 18 OUT 'WRCOM'
R5 17 OUT 'R\D\P\C\L\'
R6 16 OUT 'WRPCL'
R8 15 OUT 'A\D\D\R\'
R10 12 OUT 'S\E\L\2\4\5\'
T4 20 PWR 'VCC'
B4 10 PWR 'GND'
'CPUPAL'
REFERENCE '16L8'
{X Size =} 14 {Y Size =} 10 {Parts per Package =} 1
L1 1 IN 'I\O\W\R\'
L2 2 IN 'I\O\R\D\'
L3 3 IN 'A1'
L4 4 IN 'A2'
L5 5 IN 'A10'
L6 6 IN 'A11'
L7 7 IN 'A19'
L8 8 IN 'R\E\S\E\T\'
L9 9 IN 'MEMRES'
R1 19 OUT 'LINKWR'
R2 18 OUT 'L\I\N\K\R\D\'
R3 17 OUT 'COMWR'
R4 16 OUT 'S\T\A\T\R\D\'
R5 15 OUT 'FF1'
R6 14 OUT 'FF2'
R7 13 OUT 'R\O\M\S\E\L\'
R8 12 OUT 'LOADSHIFT'
T4 20 PWR 'VCC'
B4 10 PWR 'GND'
'LINKPAL'
REFERENCE '20RA10'
{X Size =} 16 {Y Size =} 14 {Parts per Package =} 1
L1 1 IN 'P\L\'
L2 2 IN 'P\C\R\D\L\N\K\'
L3 3 IN 'PCWRLNK'
L4 4 IN 'R\E\A\D\L\N\K\'
L5 5 IN 'WRITELNK'
L6 6 IN 'PCD0'
L7 7 IN 'PCD1'
L8 8 IN 'PCD2'
L9 9 IN 'P\C\C\O\M\'
L10 10 IN 'D0'
L11 11 IN 'D1'
L12 14 IN 'C\O\M\'
L13 13 IN 'O\E\'
R1 23 OUT 'P\C\D\A\T\A\R\'
R2 22 OUT 'D\A\T\A\R\'
R4 21 OUT 'INTR2'
R5 20 OUT 'NMI'
R7 19 OUT 'MEMRESET'
R8 18 OUT '2\8\6\R\E\S\E\T\'
R10 17 OUT 'PCCout'
R11 16 OUT 'Cout'
R13 15 OUT 'TEST'
T4 24 PWR 'VCC'
B4 12 PWR 'GND'


77
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Revised: January 24, 1988
TurboRacer 286 Revision: A
Bill Of Materials January 24, 1988 18:45:44 Page 1
Item Quantity Reference Part
_____________________________________________________
1 9 R4,R5,R6,R7,R8,R9,R10, 33R
R11,R12
2 1 U14 8207
3 1 U10 74F00
4 1 U11 74F04
5 2 U15,U9 74F74
6 32 UM1,UM2,UM3,UM4,UM5,UM6, 41256
UM7,UM8,UM9,UM10,UM11,
UM12,UM13,UM14,UM15,UM16,
UM17,UM18,UM19,UM20,UM21,
UM22,UM23,UM24,UM25,UM26,
UM27,UM28,UM29,UM30,UM31,
UM32
7 4 RP1,RP2,R13,R14 1K
8 2 SW1,SW2 DIPSW-8
9 2 U28,U29 74LS165
10 8 U16,U4,U5,U6,U7,U8,U17, 74F244
U18
11 2 U19,U20 74F245
12 1 U27 74F32
13 1 U21 74F85
14 1 U22 74ALS133
15 1 SW3 DIPSW-4
16 2 U25,U13 74F138
17 1 U23 74HCT75
18 1 U26 74F273
19 1 U24 74HCT243
20 1 R1 910R
21 1 X1 12MHz
22 2 C1,C2 10pF
23 1 U1 80286
Revised: January 24, 1988
TurboRacer 286 Revision: A
Bill Of Materials January 24, 1988 18:45:44 Page 2
Item Quantity Reference Part
_____________________________________________________
24 1 U2 82284
25 1 R2 300R
26 1 U12 74F08
27 1 C3 .047uF
28 1 U3 82288

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41
CIRCUITS/PC.JED Executable file
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CUPL 2.15b Serial# 6-00002-120
Device p16l8 Library DLIB-h-24-8
Created Tue Jan 01 00:12:57 1980
Name PC I/O decoder PAL
Partno PC 1
Revision 01
Date 25/02/88
Designer P.D. Smart
Company Feduptronics
Assembly XXXXX
Location XXXXX
*QP20
*QF2048
*G0
*F0
*L0000 11111111111111111111111111111111
*L0032 10011111111111111110111011011110
*L0256 11111111111111111111111111111111
*L0288 11111111111111111111111111111101
*L0320 11111111111111111111111111011111
*L0352 11111111111111111111111011111111
*L0384 11111111111111111101111111111111
*L0416 11101111111111111111111111111111
*L0448 01111111111111111111111111111111
*L0512 11111111111111111111111111111111
*L0544 10101111111111111110111011011110
*L0768 11111111111111111111111111111111
*L0800 11111111111111111111111111111101
*L0832 11111111111111111111111111011111
*L0864 11111111111111111111111011111111
*L0896 11111111111111111101111111111111
*L0928 11011111111111111111111111111111
*L0960 01111111111111111111111111111111
*L1024 11111111111111111111111111111111
*L1056 11111011011110111011101110110111
*L1792 11111111111111111111111111111111
*L1824 11111111111111111110111011111110
*L1856 11111111111111111110111111101110
*C55D1
*05CF

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46
CIRCUITS/PCPAL.PLD Executable file
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Name PC I/O decoder PAL;
Partno PC 1;
Date 25/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to decode the IBM PC I/O space to generate 4 select */
/* signals for I/O devices in the range 0210-0211 hex. Also */
/* generates a 74LS245 select signal. */
/******************************************************************/
/* Allowable Target Device Types: 16L8 */
/******************************************************************/
/** Inputs **/
Pin [1..2] = [A0..1] ; /* PC bus address signals */
Pin [3..9] = [A3..9] ; /* */
Pin 11 = CPUAEN ; /* CPUAEN signal from PC bus */
Pin 13 = IOWR ; /* I/O write strobe */
Pin 14 = IORD ; /* I/O read strobe */
/** Outputs **/
Pin 15 = ADDR ; /* Intermediate address output */
Pin 16 = WRPCL ; /* Write LINK signal */
Pin 17 = RDPCL ; /* Read LINK signal */
Pin 18 = WRCOM ; /* Write command */
Pin 19 = RDSTAT ; /* Read status */
Pin 12 = SEL245 ; /* Select 245 */
/** Declarations and Intermediate Variable Definitions **/
/** Logic Equations **/
ADDR = A3 # !A4 # A5 # A6 # A7 # A8 # !A9;
WRPCL = !(CPUAEN # IOWR # !IORD # ADDR # A0 # A1);
RDPCL = CPUAEN # !IOWR # IORD # ADDR # A0 # A1;
WRCOM = !(CPUAEN # IOWR # !IORD # ADDR # !A0 # A1);
RDSTAT = CPUAEN # !IOWR # IORD # ADDR # !A0 # A1;
SEL245 = CPUAEN # (IOWR & IORD) # ADDR;


60
CIRCUITS/PCPAL.SI Executable file
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Name PC I/O decoder PAL;
Partno PC 1;
Date 25/02/88;
Revision 01;
Designer P.D. Smart;
Company Feduptronics;
Assembly XXXXX;
Location XXXXX;
/******************************************************************/
/* A PAL to decode the IBM PC I/O space to generate 4 select */
/* signals for I/O devices in the range 0210-0211 hex. Also */
/* generates a 74LS245 select signal. */
/******************************************************************/
/* Allowable Target Device Types: 16L8 */
/******************************************************************/
ORDER: A9, %1, A8, %1, A7, %1, A6, %1, A5, %1, A4, %1, A3, %1, A1, %1, A0, %1,
CPUAEN, %1, IOWR, %1, IORD, %2,
ADDR, %1, WRPCL, %1, RDPCL, %1, WRCOM, %1, RDSTAT, %1, SEL245;
VECTORS:
$msg " ";
$msg " ";
$msg " ";
$msg " C R S";
$msg " P W R W D E";
$msg " U I I A R D R S L";
$msg " A O O D P P C T 2";
$msg " A A A A A A A A A E W R D C C O A 4";
$msg " 9 8 7 6 5 4 3 1 0 N R D R L L M T 5";
$msg " ------------------------------------";
0 0 0 0 0 0 0 0 0 0 0 0 H L H L H H
0 0 0 0 0 0 0 0 0 0 0 1 H L H L H H
0 0 0 0 0 0 0 0 0 0 1 0 H L H L H H
0 0 0 0 0 0 0 0 0 0 1 1 H L H L H H
0 0 0 0 0 0 0 0 0 1 0 0 H L H L H H
0 0 0 0 0 0 0 0 0 1 0 1 H L H L H H
0 0 0 0 0 0 0 0 0 1 1 0 H L H L H H
0 0 0 0 0 0 0 0 0 1 1 1 H L H L H H
1 0 0 0 0 1 0 0 0 0 0 0 L L H L H L
1 0 0 0 0 1 0 0 0 0 0 1 L H H L H L
1 0 0 0 0 1 0 0 0 0 1 0 L L L L H L
1 0 0 0 0 1 0 0 0 0 1 1 L L H L H H
1 0 0 0 0 1 0 0 0 1 0 0 L L H L H H
1 0 0 0 0 1 0 0 0 1 0 1 L L H L H H
1 0 0 0 0 1 0 0 0 1 1 0 L L H L H H
1 0 0 0 0 1 0 0 0 1 1 1 L L H L H H
1 0 0 0 0 1 0 0 1 0 0 0 L L H L H L
1 0 0 0 0 1 0 0 1 0 0 1 L L H H H L
1 0 0 0 0 1 0 0 1 0 1 0 L L H L L L
1 0 0 0 0 1 0 0 1 0 1 1 L L H L H H
1 0 0 0 0 1 0 0 1 1 0 0 L L H L H H
1 0 0 0 0 1 0 0 1 1 0 1 L L H L H H
1 0 0 0 0 1 0 0 1 1 1 0 L L H L H H
1 0 0 0 0 1 0 0 1 1 1 1 L L H L H H


86
CIRCUITS/PUFFTA Executable file
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*D21077
*G0
*L0000 1111111111111111111111111111111111111111
*L0040 0000000000000000000000000000000000000000
*L0080 1111111110111111111111111111111111111111
*L0120 1111011111111111111111111111111111111111
*L0160 0000000000000000000000000000000000000000
*L0200 0000000000000000000000000000000000000000
*L0240 0000000000000000000000000000000000000000
*L0280 0000000000000000000000000000000000000000
*L0320 1111111111111111111111111111111111111111
*L0360 0000000000000000000000000000000000000000
*L0400 1011111111111111111111111111111111111111
*L0440 1111111111110111111111111111111111111111
*L0480 0000000000000000000000000000000000000000
*L0520 0000000000000000000000000000000000000000
*L0560 0000000000000000000000000000000000000000
*L0600 0000000000000000000000000000000000000000
*L0640 1111111111111111111111111111111111111111
*L0680 0000000000000000000000000000000000000000
*L0720 1111111111111111111111111111111111111111
*L0760 1111111111111111111111111111111111111111
*L0800 1111110111111111111111111111110111111111
*L0840 0000000000000000000000000000000000000000
*L0880 0000000000000000000000000000000000000000
*L0920 0000000000000000000000000000000000000000
*L0960 1111111111111111111111111111111111111111
*L1000 0000000000000000000000000000000000000000
*L1040 1111111111111111111111111111111111111111
*L1080 1111111111111111111111111111111111111111
*L1120 1101111111111111111111111101111111111111
*L1160 0000000000000000000000000000000000000000
*L1200 0000000000000000000000000000000000000000
*L1240 0000000000000000000000000000000000000000
*L1280 1111111111111111111111111111111111111111
*L1320 1111111111111111111111111111011111111111
*L1360 0000000000000000000000000000000000000000
*L1400 0000000000000000000000000000000000000000
*L1440 1111111111111111011111111111111111111111
*L1480 0000000000000000000000000000000000000000
*L1520 0000000000000000000000000000000000000000
*L1560 0000000000000000000000000000000000000000
*L1600 1111111111111111111111111111111111111111
*L1640 1111111111111111111111111111011111111111
*L1680 0000000000000000000000000000000000000000
*L1720 0000000000000000000000000000000000000000
*L1760 1111111111111111111101111111111111111111
*L1800 0000000000000000000000000000000000000000
*L1840 0000000000000000000000000000000000000000
*L1880 0000000000000000000000000000000000000000
*L1920 1111111111111111111111111111111111111111
*L1960 1111111111111111111111111111011111111111
*L2000 0000000000000000000000000000000000000000
*L2040 0000000000000000000000000000000000000000
*L2080 1111111111111111111111110111111111111111
*L2120 0000000000000000000000000000000000000000
*L2160 0000000000000000000000000000000000000000
*L2200 0000000000000000000000000000000000000000
*L2240 1111111111111111111111111111111111111111
*L2280 1111111111111111111111111111111111111101
*L2320 0000000000000000000000000000000000000000
*L2360 0000000000000000000000000000000000000000
*L2400 1111111111111111111111111111111101111111
*L2440 0000000000000000000000000000000000000000
*L2480 0000000000000000000000000000000000000000
*L2520 0000000000000000000000000000000000000000
*L2560 1111111111111111111111111111111111111111
*L2600 1111111111111111111111111111111111111101
*L2640 0000000000000000000000000000000000000000
*L2680 0000000000000000000000000000000000000000
*L2720 1111111111111111111111111111111111110111
*L2760 0000000000000000000000000000000000000000
*L2800 0000000000000000000000000000000000000000
*L2840 0000000000000000000000000000000000000000
*L2880 0000000000000000000000000000000000000000
*L2920 0000000000000000000000000000000000000000
*L2960 1111111111111111111111111111111111111111
*L3000 1111111111111111111111111111111111111111
*L3040 0000000000000000000000000000000000000000
*L3080 0000000000000000000000000000000000000000
*L3120 0000000000000000000000000000000000000000
*L3160 0000000000000000000000000000000000000000
*L3200 1111111110
*C99E6
*D90C

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229
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/****************************************************************************
* TurboRacer 286 ACCELerator software *
* ----------------------------------- *
* *
* (C) 1987,1988 P.D. Smart. *
* *
* *
* This file contains startup and initialisation code for the accelerator. *
* *
* Basically, it resets the ADRAM controller and the 286 processor, and *
* awaits the return of a self test validation code. If the accelerator *
* does not pass it's self test, then this programs terminates back to the *
* DOS enviroment being run on the PC. It also processes user option flags, *
* and passes the necessary information to the accelerator. Whilst the *
* accelerator is running, the server code, which is written in assembly *
* language and bonded to this C program, services the accelerator. If an *
* error occurs, or the user abandons the accelerator, then control returns *
* to this program, and a termination message is printed. The program then *
* terminates back to the DOS enviroment being run on the PC. *
* *
* HISTORY *
* ------- *
* *
* V1.0 - Basic program structure prepared and implemented. *
* *
* *
****************************************************************************/
#include <stdio.h>
#include <io.h>
#include <time.h>
#include <stddef.h>
#define BOOTDOS 0x01
#define COPYBOOT 0x02
#define LOADBIOS 0x03
#define LOADTEST 0x04
#define MEMTEST 0x05
#define VERSION "1.00"
#define DATEREL "6th April 1988"
int BOOTflag;
char BIOSFILE[80];
main(argc,argv)
int argc;
char *argv[];
{
FILE *fp1;
int result;
unsigned char data,intno;
char tempbuf[80];
/* Sign on message. */
printf("TurboRacer 286 Accelerator\n");
printf("Version %s, Released %s\n",VERSION,DATEREL);
printf("(C) 1987,1988 P.D. Smart. All rights reserved.\n\n");
/* Process flags. */
BOOTflag=0;
strcpy(BIOSFILE,"TURBOROM.OBJ");
while(argc>1)
{
strcpy(tempbuf,*++argv);
flags(tempbuf);
argc--;
}
/* Reset ADRAM controller, then 286 processor. */
outp(0x211,0x01);
outp(0x211,0x00);
if(readstat()) readlink(); /* Clear link. */
outp(0x211,0x02);
/* Once 286 reset, a self test is performed. A value is returned
on the link indicating status of accelerator board. */
printf("286 performing memory test.....");
if(data=readlink())
error(data,"");
else
printf("Memory OK.\n");
/* If the bootflag is set, then the BIOS contained on the
accelerator will not be used, instead, a new BIOS, contained
within the file named by BIOSFILE, will be loaded into the
accelerator. */
if(BOOTflag)
{
printf("Loading new BIOS.....");
if((fp1=fopen(BIOSFILE,"rb"))==NULL)
error(3,BIOSFILE);
writelink(LOADBIOS); /* Send command to accelerator to load
a new BIOS. */
while(!feof(fp1))
{
data=fgetc(fp1);
writelink(data);
}
fclose(fp1);
/* Once the new BIOS is loaded, it re-performs the self-test,
returning a result code over the link. */
if(data=readlink())
error(4,"");
else
printf("BIOS loaded OK.\n");
writelink(BOOTDOS); /* Send command to accelerator to boot DOS.*/
} else
writelink(COPYBOOT); /* Use internal BIOS and boot DOS. */
/* Execute the server software, which is written in assembler.
If the accelerator is terminated by user, or error, a result is
returned. If the high byte of the result is not zero, then the
low byte contains an error code. If the high byte of the result
is zero, then the user terminated the accelerator. */
result=setup();
if((result>>8)&0x00ff)
{
printf("\n\nAccelerator terminated, ");
switch(result&0x00ff)
{
case 0:
printf("Divide error exception occurred.\n");
break;
case 1:
printf("Single step interrupt occurred.\n");
break;
case 3:
printf("Breakpoint intercepted.\n");
break;
case 4:
printf("Overflow exception occurred.\n");
break;
case 5:
printf("Range exceeded exception occurred.\n");
break;
case 6:
printf("Invalid opcode exception occurred.\n");
break;
case 7:
printf("No math unit available exception occurred.\n");
break;
case 8:
printf("IDT too small exception occurred.\n");
break;
case 10:
case 11:
case 12:
case 14:
case 15:
case 24:
case 29:
case 30:
case 31:
printf("Reserved interrupt - %02X occurred.\n",result&0x00ff);
break;
case 13:
printf("Segment overrun exception occurred.\n");
break;
default:
printf("Illegal interrupt - %02X occurred.\n",result&0x00ff);
break;
}
} else
printf("\n\nAccelerator terminated by user.\n");
}
/* This subroutine processes flags present on the input line. A flag begins
with a '-' sign, followed by a letter. */
flags(tempbuf)
char *tempbuf;
{
int cnt=0;
int index=0;
while(tempbuf[cnt]!=0)
{
if(tempbuf[cnt++]!='-')
error(5,tempbuf);
switch(tempbuf[cnt++])
{
case 'B':
case 'b':
BOOTflag=1;
break;
case 'F':
case 'f':
while(tempbuf[cnt]!=0)
BIOSFILE[index++]=tempbuf[cnt++];
BIOSFILE[index]=0;
break;
default:
error(5,tempbuf);
break;
}
}
}
/* This subroutine processes errors, indicating on the standard output, an
internal processing error, or a hardware error on the accelerator. */
error(errno,tempbuf)
int errno;
char *tempbuf;
{
printf("\nACCEL: ");
switch(errno)
{
case 1:
printf("286 processor failure...\n");
exit(-1);
break;
case 2:
printf("286 memory failure...\n");
exit(-2);
break;
case 3:
printf("Can't open '%s'\n",tempbuf);
exit(-3);
break;
case 4:
printf("BIOS loading failed...\n");
exit(-4);
break;
case 5:
printf("Illegal flag '%s'.\n",tempbuf);
exit(-5);
break;
}
}


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;****************************************************************************
;* TurboRacer 286 ACCELerator software *
;* ----------------------------------- *
;* *
;* (C) 1987,1988 P.D. Smart. *
;* *
;* *
;* This file contains assembly language routines to implement I/O server *
;* functions, under the control of the Accelerator board. Also contained *
;* within this file are assembly language routines to bind to the main C *
;* program to implement link communications. *
;* *
;* HISTORY *
;* ------- *
;* *
;* V1.0 - Basic program structure prepared and implemented. *
;* *
;* *
;****************************************************************************
TITLE Routines to do link communications, and serving.
;* Necessary declarations to enable these assembly language routines to be
;* linked into the main C program.
_TEXT SEGMENT BYTE PUBLIC 'CODE'
_TEXT ENDS
CONST SEGMENT WORD PUBLIC 'CONST'
CONST ENDS
_BSS SEGMENT WORD PUBLIC 'BSS'
_BSS ENDS
_DATA SEGMENT WORD PUBLIC 'DATA'
_DATA ENDS
DGROUP GROUP CONST, _BSS, _DATA
ASSUME CS: _TEXT, DS: DGROUP, SS: DGROUP, ES:DGROUP
;* Global data segment. Any Global data variables must be declared here.
_DATA SEGMENT
_DATA ENDS
;* All assembly coding must be included within a TEXT segment, a peculiarity
;* of the Microsoft assembler.
_TEXT SEGMENT
;****************************************************************************
; SETUP() - Routine to initialise the PC I/O server. Keyboard and Timer tick*
; interrupts are revectored, stack pointers altered to a new *
; storage space, and the I/O server is activated. Should the *
; accelerator require termination, through user request, or un- *
; recoverable error, then the keyboard and Timer tick vectors are *
; changed back to there original values, along with the stack *
; pointers. Then control is returned back to the calling C *
; program, along with a reason code for termination. *
; *
; INPUT: None. *
; *
; OUTPUT: Termination code in AX. *
;****************************************************************************
PUBLIC _setup
_setup PROC NEAR
cli
push bp ;Save all used registers.
push bx
push cx
push dx
push si
push di
push ds
push es
mov ax,0000h ;Revector necessary interrupts.
mov ds,ax
mov word ptr cs:segsave,ss
mov word ptr cs:stksave,sp
mov ax,word ptr ds:[0024h]
mov word ptr cs:keyip,ax
mov ax,word ptr ds:[0026h]
mov word ptr cs:keycs,ax
mov ax,word ptr ds:[0070h]
mov word ptr cs:tickip,ax
mov ax,word ptr ds:[0072h]
mov word ptr cs:tickcs,ax
mov bx,OFFSET _keybi
mov word ptr ds:[0024h],bx
mov word ptr ds:[0026h],cs
mov bx,OFFSET _ticki
mov word ptr ds:[0070h],bx
mov word ptr ds:[0072h],cs
push cs
push cs
push cs
pop ds
pop es
pop ss
mov sp,OFFSET tos ;Change to new TOP OF STACK.
sti
jmp _control ;Execute I/O server.
_set1: cli
mov ss,word ptr cs:segsave ;Restore old stack.
mov sp,word ptr cs:stksave
push ax
mov ax,0000h ;Restore old vectors.
mov ds,ax
mov ax,word ptr cs:keyip
mov word ptr ds:[0024h],ax
mov ax,word ptr cs:keycs
mov word ptr ds:[0026h],ax
mov ax,word ptr cs:tickip
mov word ptr ds:[0070h],ax
mov ax,word ptr cs:tickcs
mov word ptr ds:[0072h],ax
sti
pop ax ;Restore old registers.
pop es
pop ds
pop di
pop si
pop dx
pop cx
pop bx
pop bp
ret
_setup ENDP
;****************************************************************************
; CONTROL - Routine to perform I/O server functions for the TurboRacer 286 *
; multiprocessor board. Routine polls the LINK status port until *
; a command becomes available, then, via means of a function *
; table, jumps to the necessary code to perform the service *
; request. *
; *
; INPUT: None. *
; *
; OUTPUT: Termination code in AH. *
;****************************************************************************
_control PROC NEAR
mov si,OFFSET lodmes
push cs
pop ds
cont_1: lodsb ;Get byte addressed by SI. SI+1.
cmp al,0ffh ;End of message.
je cont_2
mov ah,0eh ;Do a write teletype.
mov bx,7
mov cx,1
push si
int 10h
pop si
jmp cont_1
cont_2: mov dx,0211h
cont_3: in al,dx ;Await a command.
test al,8
jnz cont_3
dec dx
in al,dx ;Get command.
cmp al,(COM_TAE-COM_TAB)/2 ;Get address of service routine.
jb cont_4
mov al,00h
cont_4: mov cl,al
xor ch,ch
shl cx,1
mov bx,OFFSET COM_TAB
add bx,cx
call word ptr cs:[bx] ;And execute service routine.
jmp cont_2
;*
;* I/O service routine table. Contains addresses for all service routines.
;*
COM_TAB dw bad_com ;00h
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw _intr5
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw _intr10 ;10h
dw _intr11
dw bad_com
dw bad_com
dw _intr14
dw bad_com
dw bad_com
dw _intr17
dw bad_com
dw bad_com
dw _intr1a
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com ;20h
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw disk_reset ;30h
dw disk_status
dw disk_read
dw disk_write
dw disk_verf
dw disk_parms
dw disk_type
dw disk_change
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw bad_com
dw end_com ;3Fh
COM_TAE equ $
;*
;* If this routine is executed, then an unrecoverable error occurred on the
;* TurboRacer 286. Reason code contained in AL.
;*
bad_com:mov ah,1 ;Indicate error in AH.
jmp _set1
;*
;* This routine is executed if the user requests a termination.
;*
end_com:mov ah,0 ;Indicate termination in AH.
jmp _set1
;*
;* Message to indicate that the TurboRacer has control over the PC
;*
lodmes: db 'Accelerator running.......',0DH,0AH,0FFH
_control ENDP
;****************************************************************************
; KEYBI - This routine replaces the standard IBM PC interrupt handler. *
; Routine passes keyboard code directly to the TurboRacer via *
; interrupting the 80286 processor. *
; *
; INPUT: None. *
; *
; OUTPUT: None. *
;****************************************************************************
_keybi PROC NEAR
sti ;Interrupts back on.
push ax ;Save all registers used.
push bx
push cx
push dx
push si
push di
push ds
push es
cli
mov dx,0211h ;Wait until LINK is clear.
keyb1: in al,dx
test al,1
jz keyb1
mov al,06h
out dx,al
nop
nop
nop
nop
mov al,02h
out dx,al
dec dx
mov al,09h
out dx,al
mov dx,0211h
keyb2: in al,dx
test al,1
jz keyb2
in al,60h
push ax
in al,61h
mov ah,al
or al,80h
out 061h,al
xchg ah,al
out 061h,al
pop ax
dec dx
out dx,al
mov al,20h
out 20h,al
pop es
pop ds
pop di
pop si
pop dx
pop cx
pop bx
pop ax
iret
_keybi ENDP
_ticki PROC NEAR
sti
push ax
push dx
push ds
mov ax,DGROUP
mov ds,ax
mov dx,0211h
tick1: in al,dx
test al,1
jz tick1
cli
mov al,06h
out dx,al
nop
nop
nop
mov al,02h
out dx,al
dec dx
mov al,01ch
out dx,al
sti
ticke: pop ds
pop dx
pop ax
sti
iret
_ticki ENDP
_intr5 PROC NEAR
int 05h
mov bx,0
mov ax,50h
mov ds,ax
mov al,ds:[bx]
call txbyte
ret
_intr5 ENDP
_intr10 PROC NEAR
mov di,sp ;Save stack pointer.
mov ax,8000h
mov ds,ax
mov es,ax
call rxword ;Get AX from link.
push ax ;And save on stack.
call rxword ;Next BX.
push ax
call rxword ;Next CX.
push ax
call rxword ;Next DX.
push ax
mov bp,sp ;BP addresses stack.
mov ax,[bp+6] ;Get AX.
mov bx,OFFSET tbs
cmp ah,13h ;Write string?
jne i10_2
mov cx,[bp+2] ;Get count.
i10_1: call rxbyte ;Read in string.
mov es:[bx],al
inc bx ;Next byte.
loop i10_1
i10_2: mov ax,[bp+6] ;Restore AX,BX,CX,DX.
mov bx,[bp+4]
mov cx,[bp+2]
mov dx,[bp]
mov bp,OFFSET tbs
int 10h
call txword ;Return AX.
mov ax,bx
call txword ;Return BX.
mov ax,cx
call txword ;Return CX.
mov ax,dx
call txword ;Return DX.
mov sp,di
ret
_intr10 ENDP
_intr11 PROC NEAR
int 11h
call txword ;Return AX.
ret
_intr11 ENDP
disk_reset PROC NEAR
mov ax,0000h
mov ds,ax
mov bx,ds:[0078h] ;Get parameters pointers.
mov ax,ds:[007ah]
mov ds,ax
mov cx,0bh
dsk_res:call rxbyte
mov ds:[bx],al
inc bx
loop dsk_res
mov ax,0000h ;Get back AX.
int 13h
pushf
call txword ;Send AX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_reset ENDP
disk_status PROC NEAR
mov ax,0100h
int 13h
pushf
call txword ;Send AX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_status ENDP
disk_read PROC NEAR
push cs
pop es
mov dx,0211h
diskr1: in al,dx ;Read in AL.
test al,8
jnz diskr1
dec dx
in al,dx
mov ah,02h
push ax
push ax ;Two copies.
inc dx
diskr2: in al,dx ;Read in CL.
test al,8
jnz diskr2
dec dx
in al,dx
mov bl,al
inc dx
diskr3: in al,dx ;Read in CH.
test al,8
jnz diskr3
dec dx
in al,dx
mov bh,al
push bx
inc dx
diskr4: in al,dx ;Read in DL.
test al,8
jnz diskr4
dec dx
in al,dx
mov bl,al
inc dx
diskr5: in al,dx ;Read in DH.
test al,8
jnz diskr5
dec dx
in al,dx
mov bh,al
mov dx,bx
pop cx
pop ax
mov bx,OFFSET tbs
int 13h
pop dx ;Get AX copy int DX.
pushf
push ax
mov ax,dx ;Work out size to transfer.
xor ah,ah
mov cx,0200h
mul cx
mov cx,ax
diskr6: mov dx,0211h
diskr7: in al,dx
test al,1 ;Check link status.
jz diskr7
dec dx
mov al,es:[bx]
out dx,al
inc bx
loop diskr6
pop ax
call txword ;Send AX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_read ENDP
disk_write PROC NEAR
push cs
pop es
mov dx,0211h
diskw1: in al,dx ;Read in AL.
test al,8
jnz diskw1
dec dx
in al,dx
mov ah,03h
mov cx,ax
push ax ;Two copies.
inc dx
diskw2: in al,dx ;Read in CL.
test al,8
jnz diskw2
dec dx
in al,dx
mov bl,al
inc dx
diskw3: in al,dx ;Read in CH.
test al,8
jnz diskw3
dec dx
in al,dx
mov bh,al
push bx
inc dx
diskw4: in al,dx ;Read in DL.
test al,8
jnz diskw4
dec dx
in al,dx
mov bl,al
inc dx
diskw5: in al,dx ;Read in DH.
test al,8
jnz diskw5
dec dx
in al,dx
mov bh,al
push bx
mov bx,OFFSET tbs ;Write a sector.
mov ax,cx
xor ah,ah
mov cx,0200h
mul cx
mov cx,ax
diskw6: mov dx,0211h
diskw7: in al,dx
test al,8
jnz diskw7
dec dx
in al,dx
mov es:[bx],al
inc bx
loop diskw6
pop dx
pop cx
pop ax
mov bx,OFFSET tbs
int 13h
pushf
call txword ;Send AX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_write ENDP
disk_verf PROC NEAR
push cs
pop es
mov bx,OFFSET tbs
call rxword
push ax
call rxword
push ax
call rxword
mov dx,ax
pop cx
pop ax
int 13h
pushf
call txword ;Send AX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_verf ENDP
disk_parms PROC NEAR
call rxword
push ax
call rxword
mov dx,ax
pop ax
int 13h
pushf
call txword ;Send AX.
mov ax,cx
call txword ;Send CX.
mov ax,dx
call txword ;Send DX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_parms ENDP
disk_type PROC NEAR
disk_change:
call rxword
int 13h
pushf
call txword ;Send AX.
mov ax,dx
call txword ;Send DX.
popf
lahf
mov al,ah
call txbyte ;Send flags.
ret
disk_type ENDP
_intr14 PROC NEAR
call rxword ;Read AX.
push ax
call rxword ;Read DX.
mov dx,ax
pop ax
int 14h
call txword ;Return AX.
ret
_intr14 ENDP
_intr17 PROC NEAR
call rxword ;Read AX.
push ax
call rxword ;Read DX.
mov dx,ax
pop ax
int 17h
call txword ;Return AX.
ret
_intr17 ENDP
_intr1a PROC NEAR
call rxword
push ax ;Save AX.
call rxword
mov cx,ax ;Get CX.
call rxword
mov dx,ax ;Get DX.
pop ax ;Restore AX.
int 1ah
pushf
call txword ;Return AX.
mov ax,cx
call txword ;Return CX.
mov ax,dx
call txword ;Return DX.
popf
lahf
mov al,ah
call txbyte ;Return flags.
ret
_intr1a ENDP
;***************************************
; Read a byte from link. *
;***************************************
rxbyte PROC NEAR
cli
push dx
mov dx,0211h
rxb1: in al,dx
test al,8
jnz rxb1
dec dx
in al,dx
xor ah,ah
pop dx
sti
ret
rxbyte ENDP
;***************************************
; Read a word from link. *
;***************************************
rxword PROC NEAR
cli
push dx
mov dx,0211h
rxw1: in al,dx
test al,8
jnz rxw1
dec dx
in al,dx ;Read in LOW byte.
mov ah,al
inc dx
rxw2: in al,dx
test al,8
jnz rxw2
dec dx
in al,dx ;Read in HIGH byte.
xchg al,ah ;Right order.
pop dx
sti
ret
rxword ENDP
;***************************************
; Write a byte to link. *
;***************************************
txbyte PROC NEAR
cli
push ax
push dx
mov ah,al
mov dx,0211h
txb1: in al,dx
test al,1 ;Check link status.
jz txb1
dec dx
mov al,ah
out dx,al ;Transfer.
pop dx
pop ax
sti
ret
txbyte ENDP
;***************************************
; Write a word to link. *
;***************************************
txword PROC NEAR
cli
push ax
push dx
push ax
mov dx,0211h
txw1: in al,dx
test al,1
jz txw1
dec dx
pop ax
out dx,al ;Transfer LOW byte.
inc dx
txw2: in al,dx
test al,1
jz txw2
dec dx
mov al,ah
out dx,al ;Transfer HIGH byte.
pop dx
pop ax
sti
ret
txword ENDP
CODEEND equ $ ;End of reusable code.
PUBLIC _readlink
_readlink PROC NEAR
push bp
mov bp,sp
mov dx,0211h
rd1: in al,dx
test al,00001000b
jnz rd1
dec dx
in al,dx
xor ah,ah
mov sp,bp
pop bp
ret
_readlink ENDP
PUBLIC _readstat
_readstat PROC NEAR
push bp
mov bp,sp
mov dx,0211h
in al,dx
test al,00001000b
mov al,1
jz rds
mov al,0
rds: xor ah,ah
mov sp,bp
pop bp
ret
_readstat ENDP
PUBLIC _intstat
_intstat PROC NEAR
push bp
mov dx,0211h
in al,dx
test al,00000010b
mov al,1
jz ints
mov al,0
ints: xor ah,ah
pop bp
ret
_intstat ENDP
PUBLIC _writelink
_writelink PROC NEAR
push bp
mov bp,sp
mov dx,0211h
wr1: in al,dx
test al,00000001b
jz wr1
mov ax,[bp+4]
dec dx
out dx,al
mov sp,bp
pop bp
ret
_writelink ENDP
_locald PROC NEAR
dataseg equ $
tbs db 02000h dup(?) ;8192 byte temporary buffer.
dskt db 0ch dup(?) ;11 byte Disk parameter buffer.
db 02000h dup(?)
tos equ $ ;8192 byte stack.
segsave dw 00000H
stksave dw 00000H
keyip dw 00000H
keycs dw 00000H
tickip dw 00000H
tickcs dw 00000H
_locald ENDP
_TEXT ENDS
END


38
SOURCE/BACKUP.BAT Executable file
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ECHO OFF
ECHO Copying TURBOROM files from C:\PROJECT to A:\
PAUSE
COPY C:\PROJECT\TURBOROM.ASM A:\ >NUL
COPY C:\PROJECT\STARTUP.ASM A:\ >NUL
COPY C:\PROJECT\TABLES.ASM A:\ >NUL
COPY C:\PROJECT\BIOS.ASM A:\ >NUL
COPY C:\PROJECT\MEM.ASM A:\ >NUL
COPY C:\PROJECT\EDTURBO.BAT A:\ >NUL
COPY C:\PROJECT\TURBO.BAT A:\ >NUL
COPY C:\PROJECT\BACKUP.BAT A:\ >NUL
COPY C:\PROJECT\RESTORE.BAT A:\ >NUL
ECHO Copying ACCELERATOR files from C:\PROJECT to A:\
COPY C:\PROJECT\ACCEL.C A:\ >NUL
COPY C:\PROJECT\ACCL.ASM A:\ >NUL
COPY C:\PROJECT\ACCEL.EXE A:\ >NUL
COPY C:\PROJECT\EDACC.BAT A:\ >NUL
COPY C:\PROJECT\MKACC.BAT A:\ >NUL
ECHO Copying MEMTEST files from C:\PROJECT to A:\
COPY C:\PROJECT\MEMTEST.C A:\ >NUL
COPY C:\PROJECT\MEMASM.ASM A:\ >NUL
ECHO Copying SUPPORT files from C:\PROJECT to A:\
COPY C:\PROJECT\SPLIT.C A:\ >NUL
COPY C:\PROJECT\VIDEO A:\ >NUL
COPY C:\PROJECT\LINK.ASM A:\>NUL
ECHO Copying now complete.


1153
SOURCE/BIOS.ASM Executable file
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BIN
SOURCE/CHKLIST.MS Executable file
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5
SOURCE/EDACC.BAT Executable file
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ECHO OFF
EDIT -i120 ACCEL.C ACCL.ASM BIOS.ASM
PAUSE
MKACC.BAT


6
SOURCE/EDTURBO.BAT Executable file
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ECHO OFF
EDIT -i120 TURBOROM.ASM STARTUP.ASM MEM.ASM TABLES.ASM BIOS.ASM
PAUSE
TURBO


47
SOURCE/LINK.ASM Executable file
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ORG 0000H
MAIN: MOV AX,0FC00H
MOV DS,AX
X3: MOV DX,0C02H
X4: IN AL,DX
TEST AL,8
JNZ X4
MOV DX,0C00H
IN AL,DX
CMP AL,1
JE Z0
CMP AL,2
JE Z1
CMP AL,3
JE Z2
JMP X3
Z0: MOV AX,0000
MOV DS,AX
MOV BX,0000
ZD1: MOV AL,DS:[BX]
MOV DX,0C00H
OUT DX,AL
JMP ZD1
Z1: MOV AX,0000
MOV DS,AX
MOV BX,0000
ZD2: MOV AL,DS:[BX]
MOV DX,0C00H
OUT DX,AL
JMP ZD2
Z2: MOV AX,0000
MOV DS,AX
MOV BX,0000
ZD3: MOV AL,55H
MOV DS:[BX],AL
JMP ZD3
ORG 3FF0H
JMP MAIN
ORG 3FFFH


651
SOURCE/MEM.ASM Executable file
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;****************************************************************************
;** MEM.ASM **
;** ------- **
;** **
;** (C) 1987, 1988 P.D. Smart **
;** **
;** This file is part of the TURBOROM.ASM source code. It contains code **
;** to perform interactive memory testing. As the code is stored in low **
;** memory, it will normally be written over during normal DOS operations. **
;** **
;** **
;****************************************************************************
;***************************************
; Memory exerciser code. *
; *
; FUNCTION: Interactively tests 80286 *
; 1M RAM system. *
;***************************************
MEMTEST:MOV AX,0FC00H ;Print out message indicating
MOV DS,AX ;interactive memory test code on line.
MOV SI,MESBOOT
X1: LODSB ;NB. All code has to be written with
CMP AL,0FFH ;out using stack or memory storage.
JE X3
MOV AH,AL
MOV DX,0C02H
X2: IN AL,DX
TEST AL,1
JZ X2
MOV DX,0C00H
MOV AL,AH
OUT DX,AL
JMP X1
X3: MOV DX,0C02H ;Once message printed out, await a
X4: IN AL,DX ;command from the IBM PC.
TEST AL,8 ;Poll status port. Data available?
JNZ X4
MOV DX,0C00H
IN AL,DX ;Get data.
CMP AL,1 ;Read memory?
JE MEM1
CMP AL,2 ;Write memory?
JE MEM2
CMP AL,3 ;Partial memory test?
JE MEM3
CMP AL,4 ;Full memory test?
JE MEM4
CMP AL,5 ;Memory search?
JE MEM5
MOV SI,MESILC ;If illegal command, print out illegal
X5: LODSB ;command message.
CMP AL,0FFH
JE X7
MOV AH,AL
MOV DX,0C02H
X6: IN AL,DX
TEST AL,1
JZ X6
MOV DX,0C00H
MOV AL,AH
OUT DX,AL
JMP X5
X7: JMP X3
MEM2: JMP N0 ;At conditional jump only has a
MEM3: JMP MTEST ;limited range, thus these jumps
MEM4: JMP FULL ;are needed to jump to routines
MEM5: JMP SRCH ;located over 128 bytes away.
;***************************************
; Read memory. *
; *
; FUNCTION: Dump memory to PC in HEX *
; form. PC supplies the *
; addresses to dump between. *
;***************************************
MEM1: MOV DX,0C02H ;First of all, get parameters from
M1: IN AL,DX ;IBM PC.
TEST AL,8 ;Wait until a byte appears in link
JNZ M1 ;data register.
MOV DX,0C00H
IN AL,DX ;Get byte.
MOV BL,AL ;Store as low byte, getting a word.
MOV DX,0C02H
M2: IN AL,DX ;Wait until a byte appears in link
TEST AL,8 ;data register.
JNZ M2
MOV DX,0C00H
IN AL,DX ;Get byte.
MOV BH,AL ;Get DS first (start segment).
MOV AX,BX
MOV DS,AX
MOV DX,0C02H
M3: IN AL,DX
TEST AL,8
JNZ M3
MOV DX,0C00H
IN AL,DX
MOV BL,AL
MOV DX,0C02H
M4: IN AL,DX
TEST AL,8
JNZ M4
MOV DX,0C00H
IN AL,DX
MOV BH,AL ;Get BX next (start address).
MOV DX,0C02H
M5: IN AL,DX
TEST AL,8
JNZ M5
MOV DX,0C00H
IN AL,DX
MOV CL,AL
MOV DX,0C02H
M6: IN AL,DX
TEST AL,8
JNZ M6
MOV DX,0C00H
IN AL,DX
MOV CH,AL
MOV AX,CX
MOV SS,AX ;Get SS next (end segment).
MOV DX,0C02H
M7: IN AL,DX
TEST AL,8
JNZ M7
MOV DX,0C00H
IN AL,DX
MOV CL,AL
MOV DX,0C02H
M8: IN AL,DX
TEST AL,8
JNZ M8
MOV DX,0C00H
IN AL,DX
MOV CH,AL
MOV BP,CX ;Get BP next (end address).
M10: MOV DX,0C02H
M11: IN AL,DX
TEST AL,1
JZ M11
MOV DX,0C00H
MOV AL,DS:[BX] ;Get a byte from memory,
OUT DX,AL ;Send data.
MOV AX,DS
MOV DX,SS
CMP AX,DX ;End of dump?
JNE M12
MOV AX,BP
CMP AX,BX
JNE M12
JMP X3
M12: INC BX
CMP BX,00000H
JNE M10
MOV AX,DS
ADD AX,1000H
MOV DS,AX
JMP M10
;***************************************
; Write memory. *
; *
; FUNCTION: Write XX to memory. PC *
; supplies the start address,*
; end address, and XX. *
;***************************************
N0: MOV DX,0C02H ;First of all, get parameters from
N1: IN AL,DX ;IBM PC.
TEST AL,8
JNZ N1
MOV DX,0C00H
IN AL,DX
MOV BL,AL
MOV DX,0C02H
N2: IN AL,DX
TEST AL,8
JNZ N2
MOV DX,0C00H
IN AL,DX
MOV BH,AL ;Get DS first (start segment).
MOV AX,BX
MOV DS,AX
MOV DX,0C02H
N3: IN AL,DX
TEST AL,8
JNZ N3
MOV DX,0C00H
IN AL,DX
MOV BL,AL
MOV DX,0C02H
N4: IN AL,DX
TEST AL,8
JNZ N4
MOV DX,0C00H
IN AL,DX
MOV BH,AL ;Get BX next (start address).
MOV DX,0C02H
N5: IN AL,DX
TEST AL,8
JNZ N5
MOV DX,0C00H
IN AL,DX
MOV CL,AL
MOV DX,0C02H
N6: IN AL,DX
TEST AL,8
JNZ N6
MOV DX,0C00H
IN AL,DX
MOV CH,AL
MOV AX,CX
MOV SS,AX ;Get SS next (end segment).
MOV DX,0C02H
N7: IN AL,DX
TEST AL,8
JNZ N7
MOV DX,0C00H
IN AL,DX
MOV CL,AL
MOV DX,0C02H
N8: IN AL,DX
TEST AL,8
JNZ N8
MOV DX,0C00H
IN AL,DX
MOV CH,AL
MOV BP,CX ;Get BP next (end address).
MOV DX,0C02H
N9: IN AL,DX
TEST AL,8
JNZ N9
MOV DX,0C00H
IN AL,DX
MOV CL,AL ;Get data to write into memory.
N10: MOV DS:[BX],CL ;Write data to memory.
MOV AX,DS
MOV DX,SS
CMP AX,DX
JNE N11
MOV AX,BP
CMP AX,BX
JNE N11
JMP X3
N11: INC BX ;End of block write?
CMP BX,00000H
JNE N10
MOV AX,DS
ADD AX,1000H
MOV DS,AX
JMP N10
;***************************************
; Partial memory test. *
; *
; FUNCTION: Performs a byte/word read/ *
; write to lower 512K memory *
; block. Writes different *
; values into memory to catch*
; out any faulty bit. *
;***************************************
MTEST: MOV AX,0 ;Prepare to test memory.
MOV DS,AX
ST0: MOV BX,0 ;Have to do the job in 8*64K segments
MOV CX,0FFFFH
ST1: MOV AX,55AAH ;Write a word 55AAH firstly.
MOV [BX],AX
NOP
NOP
MOV AX,[BX] ;Check to see if memory store it
CMP AX,55AAH ;correctly.
JNE ERR1
MOV AX,0AA55H ;Try the same word but bytes reversed
MOV [BX],AX
NOP
NOP
MOV AX,[BX] ;Memory stored it correctly?
CMP AX,0AA55H
JNE ERR2
MOV AX,00FFH ;Now try 00FFH.
MOV [BX],AX
NOP
NOP
MOV AX,[BX] ;Memory stored it correctly?
CMP AX,00FFH
JNE ERR3
MOV AX,0FF00H ;Reverse of above word.
MOV [BX],AX
NOP
NOP
MOV AX,[BX] ;Memory stored it correctly?
CMP AX,0FF00H
JNE ERR4
MOV AL,00H ;Now try a byte write.
MOV [BX],AL
NOP
NOP
MOV AL,[BX] ;Was the byte stored?
CMP AL,00H
JNE ERR5
MOV AL,0FFH ;Now try the complement of above byte
MOV [BX],AL
NOP
NOP
MOV AL,[BX] ;Was the byte stored?
CMP AL,0FFH
JNE ERR6
INC BX ;Move onto next byte.
MOV AL,00H ;And try the byte writes on the
MOV [BX],AL ;other byte in word pair.
NOP
NOP
MOV AL,[BX]
CMP AL,00H
JNE ERR7
MOV AL,0FFH
MOV [BX],AL
NOP
NOP
MOV AL,[BX]
CMP AL,0FFH
JNE ERR8
MOV ES,AX
LOOP ST1 ;Loop until 64K segment tested.
MOV AX,DS
ADD AX,1000H ;All 8 segments tested?
MOV DS,AX
CMP AX,8000H
JNE ST0
MOV AL,0
JMP ERR
ERR1: MOV ES,AX ;If an error occurred, inform the PC.
MOV AL,1
JMP ERR
ERR2: MOV ES,AX
MOV AL,2
JMP ERR
ERR3: MOV ES,AX
MOV AL,3
JMP ERR
ERR4: MOV ES,AX
MOV AL,4
JMP ERR
ERR5: MOV ES,AX
MOV AL,5
JMP ERR
ERR6: MOV ES,AX
MOV AL,6
JMP ERR
ERR7: MOV ES,AX
MOV AL,7
JMP ERR
ERR8: MOV ES,AX
MOV AL,8
ERR: MOV AH,AL
MOV DX,0C02H
ER1: IN AL,DX
TEST AL,1
JZ ER1
MOV DX,0C00H
MOV AL,AH ;Send error code.
OUT DX,AL
MOV DX,0C02H
ER2: IN AL,DX
TEST AL,1
JZ ER2
MOV DX,0C00H
MOV AX,ES
OUT DX,AL ;Send AL.
MOV DX,0C02H
ER3: IN AL,DX
TEST AL,1
JZ ER3
MOV DX,0C00H
MOV AX,ES
MOV AL,AH ;Send AH.
OUT DX,AL
MOV DX,0C02H
ER4: IN AL,DX
TEST AL,1
JZ ER4
MOV DX,0C00H
MOV AL,BL ;Send BL.
OUT DX,AL
MOV DX,0C02H
ER5: IN AL,DX
TEST AL,1
JZ ER5
MOV DX,0C00H
MOV AL,BH ;Send BH.
OUT DX,AL
MOV DX,0C02H
ER6: IN AL,DX
TEST AL,1
JZ ER6
MOV DX,0C00H
MOV AX,DS ;Send low DS.
OUT DX,AL
MOV DX,0C02H
ER7: IN AL,DX
TEST AL,1
JZ ER7
MOV DX,0C00H
MOV AX,DS
MOV AL,AH ;Send high DS.
OUT DX,AL
JMP MEMTEST
;***************************************
; Full memory test code. *
; *
; FUNCTION: Tests memory in probably *
; the best memory test *
; possible. Writes zero's to *
; all memory, writes a 1 to *
; 1 byte in the memory array *
; and then scans the entire *
; memory array for errors. *
;***************************************
FULL: MOV SI,0000H ;Prepare for memory test.
MOV SS,SI
MOV BP,SI
MF1: MOV DS,SI
MF2: MOV BX,SI
MOV CX,7FFFH ;Zero fill entire memory bank.
MF3: MOV [BX],SI
INC BX
INC BX
LOOP MF3
MOV AX,DS
ADD AX,1000H
MOV DS,AX
CMP AX,8000H
JNE MF2
; ;Write a byte of 1's to address
MF4: MOV AL,0FFH ;pointed to by DS:BP.
MOV [BP],AL
;
SEARCH: MOV DS,SI ;Now search entire memory for any byte
SR0: MOV BX,SI ;which has any bit set.
MOV CX,07FFFH
SR1: CMP [BX],SI
JE SR3
SR2: MOV AX,SS
MOV DX,DS
CMP AX,DX
JNE SRP
MOV AX,BP ;If address = DS:BP, jump over.
AND AX,0FFFEH
CMP BX,AX
JNE SRP
JMP SR3
SRP: MOV ES,AX
JMP FLP
SR3: INC BX ;Continue search for entire memory.
INC BX
LOOP SR1
MOV AX,DS
ADD AX,1000H
MOV DS,AX
CMP AX,8000H
JNE SR0
MOV AX,SI
MOV ES,AX
;
FLP: MOV DX,0C02H ;Send to IBM PC, current position
FL1: IN AL,DX ;of test.
TEST AL,1
JZ FL1
MOV DX,0C00H
MOV AX,SS ;Send SS.
OUT DX,AL
MOV DX,0C02H
FL2: IN AL,DX
TEST AL,1
JZ FL2
MOV DX,0C00H
MOV AX,SS
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
FL3: IN AL,DX
TEST AL,1
JZ FL3
MOV DX,0C00H
MOV AX,BP ;Send BP.
OUT DX,AL
MOV DX,0C02H
FL4: IN AL,DX
TEST AL,1
JZ FL4
MOV DX,0C00H
MOV AX,BP
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
FL5: IN AL,DX
TEST AL,1
JZ FL5
MOV DX,0C00H
MOV AX,DS ;Send DS.
OUT DX,AL
MOV DX,0C02H
FL6: IN AL,DX
TEST AL,1
JZ FL6
MOV DX,0C00H
MOV AX,DS
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
FL7: IN AL,DX
TEST AL,1
JZ FL7
MOV DX,0C00H
MOV AX,BX ;Send BX.
OUT DX,AL
MOV DX,0C02H
FL8: IN AL,DX
TEST AL,1
JZ FL8
MOV DX,0C00H
MOV AX,BX
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
FL9: IN AL,DX
TEST AL,1
JZ FL9
MOV DX,0C00H
MOV AX,ES ;Send AL.
OUT DX,AL
;
MOV AL,0 ;Zero fill memory, and check to see
MOV [BP],AL ;if it is end of test.
INC BP
CMP BP,SI
JNE MQ1
MOV AX,SS
ADD AX,1000H
MOV SS,AX
CMP AX,8000H
JNE MQ1 ;If not, repeat search.
JMP MEMTEST
MQ1: JMP MF4
;***************************************
; Memory search code. *
; *
; FUNCTION: Search memory to check *
; that memory is set to a *
; particular byte, reporting *
; to the PC any byte which *
; is not correct. *
;***************************************
SRCH: MOV DX,0C02H ;Get byte from PC to search for.
SRC1: IN AL,DX
TEST AL,8
JNZ SRC1
MOV DX,0C00H
IN AL,DX
MOV AH,AL
MOV DI,AX
MOV SI,0000H
MOV DS,SI
SRC2: MOV BX,0000H
MOV CX,0FFFFH
SRC3: MOV AL,[BX]
CMP AL,AH ;If byte is not the same as that
JNE SRC4 ;searched for, report to IBM PC.
INC BX
LOOP SRC3
MOV AX,DS
ADD AX,1000H
MOV DS,AX
CMP AX,8000H
MOV AX,DI
JNE SRC2
MOV CX,6
MOV DX,0C02H
SRCE: IN AL,DX ;End of search?
TEST AL,1
JZ SRCE
DEC DX
DEC DX
MOV AL,0FFH ;If so, send end of search byte.
OUT DX,AL
INC DX
INC DX
LOOP SRCE
JMP MEMTEST
SRC4: MOV SI,AX ;Send details to PC of memory location
MOV DX,0C02H ;that was not the same as the search
SRC5: IN AL,DX ;value.
TEST AL,1
JZ SRC5
MOV DX,0C00H
MOV AX,SI ;Send AX.
OUT DX,AL
MOV DX,0C02H
SRC6: IN AL,DX
TEST AL,1
JZ SRC6
MOV DX,0C00H
MOV AX,SI
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
SRC7: IN AL,DX
TEST AL,1
JZ SRC7
MOV DX,0C00H
MOV AX,DS ;Send DS.
OUT DX,AL
MOV DX,0C02H
SRC8: IN AL,DX
TEST AL,1
JZ SRC8
MOV DX,0C00H
MOV AX,DS
MOV AL,AH
OUT DX,AL
MOV DX,0C02H
SRC9: IN AL,DX
TEST AL,1
JZ SRC9
MOV DX,0C00H
MOV AX,BX ;Send BX.
OUT DX,AL
MOV DX,0C02H
SRC10: IN AL,DX
TEST AL,1
JZ SRC10
MOV DX,0C00H
MOV AX,BX
MOV AL,AH
OUT DX,AL
MOV AX,DI ;Get back AX.
JMP SRC3
;***************************************
; End of interactive memory test code. *
;***************************************


113
SOURCE/MEMASM.ASM Executable file
View File

@@ -0,0 +1,113 @@
PAGE 60,80
TITLE Routines to do link communications.
_TEXT SEGMENT BYTE PUBLIC 'CODE'
_TEXT ENDS
CONST SEGMENT WORD PUBLIC 'CONST'
CONST ENDS
_BSS SEGMENT WORD PUBLIC 'BSS'
_BSS ENDS
_DATA SEGMENT WORD PUBLIC 'DATA'
_DATA ENDS
DGROUP GROUP CONST, _BSS, _DATA
ASSUME CS: _TEXT, DS: DGROUP, SS: DGROUP, ES:DGROUP
_DATA SEGMENT
_DATA ENDS
_TEXT SEGMENT
PUBLIC _readbyte
_readbyte PROC NEAR
mov dx,0211h
rdbyte1:in al,dx
test al,00001000b
jnz rdbyte1
dec dx
in al,dx
xor ah,ah
ret
_readbyte ENDP
PUBLIC _readword
_readword PROC NEAR
mov dx,0211h
rdword1:in al,dx
test al,00001000b
jnz rdword1
dec dx
in al,dx
xchg al,ah
inc dx
rdword2:in al,dx
test al,00001000b
jnz rdword2
dec dx
in al,dx
xchg al,ah
ret
_readword ENDP
PUBLIC _readstat
_readstat PROC NEAR
push bp
mov bp,sp
mov dx,0211h
in al,dx
test al,00001000b
mov al,1
jz rds
mov al,0
rds: xor ah,ah
mov sp,bp
pop bp
ret
_readstat ENDP
PUBLIC _writebyte
_writebyte PROC NEAR
push bp
mov bp,sp
mov dx,0211h
wrbyte1:in al,dx
test al,00000001b
jz wrbyte1
mov ax,[bp+4]
dec dx
out dx,al
pop bp
ret
_writebyte ENDP
PUBLIC _writeword
_writeword PROC NEAR
push bp
mov bp,sp
mov dx,0211h
wrword1:in al,dx
test al,00000001b
jz wrword1
dec dx
mov ax,[bp+4]
out dx,al
inc dx
wrword2:in al,dx
test al,00000001b
jz wrword2
dec dx
mov ax,[bp+4]
xchg al,ah
out dx,al
pop bp
ret
_writeword ENDP
_TEXT ENDS
END


450
SOURCE/MEMTEST.C Executable file
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#include <windows.h>
#include <io.h>
#include <time.h>
#include <stddef.h>
WINDOWPTR w0, w1, w2;
main(argc,argv)
int argc;
char *argv[];
{
int key,flag;
unsigned char databyte;
v_smode(C8025);
w0 = wn_open(0,12,0,78,10,(BLUE<<4|WHITE),GREEN);
wn_puts(w0,2,20," TurboRacer 286 ");
wn_puts(w0,4,20," Memory Read/Write testing aid ");
wn_puts(w0,6,20," (C) March 1988, P.D. Smart ");
pause(2);
wn_close(w0);
w0 = wn_open(0,1,0,78,18,YELLOW,RED);
wn_wrap(w0,TRUE);
wn_scroll(w0,BIOS);
w1 = wn_open(1000,0,0,78,1,BOLD|YELLOW,BLACK);
w2 = wn_open(1000,21,0,80,4,CYAN,BLACK);
wn_wrap(w2,TRUE);
wn_scroll(w2,BIOS);
reset();
wn_clr(w1);
wn_puts(w1,0,25,"MEMORY READ/WRITE TESTER MENU");
while(1)
{
wn_clr(w0);
wn_puts(w0,2,30, "[A] - Read memory");
wn_puts(w0,4,30, "[B] - Write memory");
wn_puts(w0,6,30, "[C] - Partial memory test");
wn_puts(w0,8,30, "[D] - Full memory Test");
wn_puts(w0,10,30,"[E] - Search for value");
wn_puts(w0,12,30,"[F] - Reset accelerator");
wn_puts(w0,14,30,"[G] - Quit");
wn_puts(w0,17,14," Select option by pressing a bracketed key ");
wn_clr(w2);
key=' ';
while(key!='A'&&key!='a'&&key!='B'&&key!='b'&&key!='C'&&key!='c'
&&key!='D'&&key!='d'&&key!='E'&&key!='e'&&key!='f'
&&key!='F'&&key!='g'&&key!='G')
{
while(!kbhit())
{
if(readstat())
{
databyte=readbyte();
wn_printf(w2,"%c",databyte);
}
}
key=v_getch()&0xff;
}
switch(key)
{
case 'A':
case 'a':
readmem();
break;
case 'B':
case 'b':
writemem();
break;
case 'C':
case 'c':
parttest();
break;
case 'D':
case 'd':
fulltest();
break;
case 'E':
case 'e':
search();
break;
case 'F':
case 'f':
reset();
break;
case 'G':
case 'g':
W_exit(0);
break;
}
}
}
fulltest()
{
unsigned ss,bp,ds,bx,error;
unsigned char databyte;
FILE *fp1;
error=0;
if((fp1=fopen("FULLTEST.DAT","wb"))==NULL)
{
wn_printf(w0,"Can't open FULLTEST.DAT\n");
pause(2);
return(1);
}
wn_clr(w0);
wn_clr(w2);
if(readstat()) readbyte();
wn_printf(w2,"\nSending command to 286...");
writebyte(0x04);
wn_clr(w2);
wn_printf(w2,"Performing full test...");
while(1)
{
while(!readstat())
{
if(kbhit())
{
databyte=v_getch()&0xff;
if(databyte=='q' || databyte=='Q')
{
reset();
fclose(fp1);
return(1);
}
if(databyte==' ')
while(!kbhit());
}
}
ss=readword();
bp=readword();
ds=readword();
bx=readword();
databyte=readbyte();
wn_puts(w0,1,1,"SS:BP = ");
wn_printf(w0,"%04X:%04X",ss,bp);
if(databyte!=0)
{
error++;
fprintf(fp1,"SS=%04X, BP=%04X, DS=%04X, BX=%04X, AL=%02X - **ERROR**%c%c"
,ss,bp,ds,bx,databyte,0x0d,0x0a);
}
wn_puts(w0,2,1,"Errors = ");
wn_printf(w0,"%04X",error);
if(ss==0x8000 && bp==0xffff)
{
reset();
fclose(fp1);
return(1);
}
}
}
reset()
{
unsigned char databyte;
wn_clr(w2);
wn_clr(w0);
wn_putsa(w2,0,1,"RESETTING 8207 MEMORY CONTROLLER",YELLOW|BLINK);
outp(0x211,0x01);
pause(1);
outp(0x211,0x00);
wn_clr(w2);
wn_putsa(w2,0,1,"RESETTING 286 PROCESSOR",YELLOW|BLINK);
pause(1);
if(readstat()) readbyte();
outp(0x211,0x02);
wn_clr(w2);
wn_printf(w2,"Awaiting test result.....");
databyte=readbyte();
if(databyte!=0)
wn_printf(w2,"Failed, Error code=%02X\n",databyte);
else
{
wn_printf(w2,"PASSED.\n");
writebyte(0x05);
}
}
search()
{
unsigned ax,bx,ds;
unsigned char databyte;
char bufin[80];
if(readstat()) readbyte();
wn_printf(w2,"\nSending command to 286...");
writebyte(0x05);
wn_clr(w2);
wn_putsa(w0,10,36,"SEARCH FOR VALUE",YELLOW|BLINK);
wn_printf(w2,"\nEnter search value <00>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) databyte=0x00;
else
{
sscanf(bufin,"%x",&databyte);
}
writebyte(databyte);
while(1)
{
ax=readword();
ds=readword();
bx=readword();
if(ax==0xffff)
return(1);
wn_printf(w2,"Failure at %04X:%04X, Byte read=%02X\n"
,ds,bx,ax&0x00ff);
if(kbhit())
{
databyte=v_getch()&0xff;
if(databyte=='q' || databyte=='Q' )
{
reset();
return(1);
}
if(databyte==' ')
while(!kbhit());
}
}
}
parttest()
{
unsigned ax,bx,ds;
unsigned char ercode;
if(readstat()) readbyte();
wn_printf(w2,"\nSending command to 286...");
writebyte(0x03);
wn_clr(w2);
wn_putsa(w0,6,36,"PARTIAL MEMORY TEST",YELLOW|BLINK);
wn_printf(w2,"286 running memory test...waiting\n");
ercode=readbyte();
ax=readword();
bx=readword();
ds=readword();
wn_printf(w2,"AX=%04X, BX=%04X, DS=%04X: ",ax,bx,ds);
switch(ercode)
{
case 0:
wn_printf(w2,"Memory test successful\n");
break;
case 1:
wn_printf(w2,"Failure writing 55AAH\n");
break;
case 2:
wn_printf(w2,"Failure writing AA55H\n");
break;
case 3:
wn_printf(w2,"Failure writing 00FFH\n");
break;
case 4:
wn_printf(w2,"Failure writing FF00H\n");
break;
case 5:
wn_printf(w2,"Failure writing byte 00 (1)\n");
break;
case 6:
wn_printf(w2,"Failure writing byte FF (1)\n");
break;
case 7:
wn_printf(w2,"Failure writing byte 00 (2)\n");
break;
case 8:
wn_printf(w2,"Failure writing byte FF (2)\n");
break;
}
pause(4);
}
readmem()
{
long start,end,i;
char bufin[80];
unsigned char cnt, databyte;
unsigned dataword;
wn_clr(w2);
wn_putsa(w0,2,36,"READ MEMORY",YELLOW|BLINK);
wn_printf(w2,"\nEnter start address <00000>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) start=0x00000;
else
{
sscanf(bufin,"%lx",&start);
if(start>0xfffff) start=0xfffff;
}
wn_clr(w2);
wn_printf(w2,"\nEnter end address <00100>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) end=0x00100;
else
{
sscanf(bufin,"%lx",&end);
if(end>0xfffff) end=0xfffff;
}
wn_clr(w2);
wn_printf(w2,"\nSending command to 286...");
if(readstat()) readbyte();
writebyte(0x01); /* Send command. */
dataword=(start>>4)&0xf000; /* Start segment. */
writeword(dataword);
dataword=start&0xffff; /* Start address. */
writeword(dataword);
dataword=(end>>4)&0xf000; /* End segment. */
writeword(dataword);
dataword=end&0xffff; /* End address. */
writeword(dataword);
wn_clr(w2);
wn_clr(w0);
cnt=16;
for(i=start;i<=end;i++)
{
if(cnt++>=15)
{
cnt=0;
wn_printf(w0,"\n%05lX ",i);
}
databyte=readbyte();
wn_printf(w0," %02X ",databyte);
if(kbhit())
{
databyte=v_getch()&0xff;
if(databyte=='q' || databyte=='Q')
{
reset();
break;
}
if(databyte==' ')
while(!kbhit());
}
}
}
writemem()
{
long start,end,i;
char bufin[80];
unsigned char cnt;
unsigned dataword,temp;
wn_clr(w2);
wn_putsa(w0,4,36,"WRITE MEMORY",YELLOW|BLINK);
wn_printf(w2,"\nEnter start address <00000>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) start=0x00000;
else
{
sscanf(bufin,"%lx",&start);
if(start>0xfffff) start=0xfffff;
}
wn_clr(w2);
wn_printf(w2,"\nEnter end address <7FFFF>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) end=0x7ffff;
else
{
sscanf(bufin,"%lx",&end);
if(end>0xfffff) end=0xfffff;
}
wn_clr(w2);
wn_printf(w2,"\nEnter data <00>: ");
wn_sync(w2,TRUE);
wn_fixcsr(w2);
wn_gets(w2,bufin,6,"0123456789AaBbCcDdEeFf");
if(bufin[0]==0x00) temp=0x00;
else
{
sscanf(bufin,"%x",&temp);
if(temp>0xff) temp=0x00ff;
}
wn_clr(w2);
wn_printf(w2,"\nSending command to 286...");
if(readstat()) readbyte();
writebyte(0x02); /* Send command. */
dataword=(start>>4)&0xf000; /* Start segment. */
writeword(dataword);
dataword=start&0xffff; /* Start address. */
writeword(dataword);
dataword=(end>>4)&0xf000; /* End segment. */
writeword(dataword);
dataword=end&0xffff; /* End address. */
writeword(dataword);
writebyte(temp); /* Data. */
}
pause(seconds)
int seconds;
{
unsigned cnt,cnt2;
for(cnt=0;cnt<seconds;cnt++)
for(cnt2=0;cnt2<30000;cnt2++);
}
W_exit(no)
int no;
{
wn_close(w1);
wn_close(w2);
wn_close(w0);
switch(no)
{
case 0:
break;
case 1:
break;
case 3:
break;
case 4:
break;
case 5:
break;
case 6:
break;
}
exit(no);
}


BIN
SOURCE/MEMTEST.EXE Executable file
View File

Binary file not shown.

18
SOURCE/MKACC.BAT Executable file
View File

@@ -0,0 +1,18 @@
ECHO OFF
ECHO Compiling ACCEL.C -> ACCEL.OBJ
MSC ACCEL.C /Zi;
IF ERRORLEVEL 1 GOTO ERXIT
ECHO Assembling ACCL.ASM -> ACCL.OBJ
MASM ACCL.ASM;
IF ERRORLEVEL 1 GOTO ERXIT
LINK ACCEL+ACCL /CO;
DEL *.MAP >NUL
DEL *.SYM >NUL
GOTO EXIT
:ERXIT
ECHO Errors have occurred.
:EXIT


45
SOURCE/PRNTHEX.ASM Executable file
View File

@@ -0,0 +1,45 @@
;***************************************
; Display AX as a hex value on VIDEO *
;***************************************
DHEX: PUSH AX ;Store AX, print AH.
MOV AL,AH
CALL HEX
POP AX
CALL HEX ;Print AL.
RET
;***************************************
; Display AL as a hex value on VIDEO *
;***************************************
HEX: PUSH BX ;Store registers used.
PUSH CX
PUSH DX
PUSH AX
AND AL,0F0H ;High nibble first.
SHR AL,1
SHR AL,1
SHR AL,1
SHR AL,1
CALL HEX1 ;Print
POP AX
AND AL,0FH ;Now low nibble.
CALL HEX1
MOV AL,20H
MOV AH,0EH
MOV BL,7
INT 10H
POP DX
POP CX
POP BX
RET
HEX1: CMP AL,0AH
JL HEX2
ADD AL,07H
HEX2: ADD AL,30H
MOV AH,0EH
MOV BL,7
INT 10H
RET


30
SOURCE/RESTORE.BAT Executable file
View File

@@ -0,0 +1,30 @@
ECHO OFF
ECHO Copying TURBOROM files from A:\ to C:\PROJECT
PAUSE
COPY A:\TURBOROM.ASM C:\PROJECT >NUL
COPY A:\STARTUP.ASM C:\PROJECT >NUL
COPY A:\TABLES.ASM C:\PROJECT >NUL
COPY A:\BIOS.ASM C:\PROJECT >NUL
COPY A:\MEM.ASM C:\PROJECT >NUL
COPY A:\EDTURBO.BAT C:\PROJECT >NUL
COPY A:\TURBO.BAT C:\PROJECT >NUL
COPY A:\BACKUP.BAT C:\PROJECT >NUL
COPY A:\RESTORE.BAT C:\PROJECT >NUL
ECHO Copying ACCELERATOR files from A:\ to C:\PROJECT
COPY A:\ACCEL.C C:\PROJECT >NUL
COPY A:\ACCL.ASM C:\PROJECT >NUL
COPY A:\ACCEL.EXE C:\PROJECT >NUL
COPY A:\EDACC.BAT C:\PROJECT >NUL
COPY A:\MKACC.BAT C:\PROJECT >NUL
ECHO Copying MEMTEST files from A:\ to C:\PROJECT
COPY A:\MEMTEST.C C:\PROJECT >NUL
COPY A:\MEMASM.ASM C:\PROJECT >NUL
ECHO Copying SUPPORT files from A:\ to C:\PROJECT
COPY A:\ C:\PROJECT\SPLIT.C >NUL
COPY A:\ C:\PROJECT\VIDEO >NUL
COPY A:\ C:\PROJECT\LINK.ASM >NUL
ECHO Copying now complete.


113
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#include <windows.h>
#include <io.h>
#include <time.h>
#include <stddef.h>
WINDOWPTR w0, w1, w2, w3, w4;
FILE *fp1,*fp2,*fp3;
int count,cntlo,cnthi,debug,dot,flag,i,printer;
unsigned st,st2;
char filein[80],filelo[80],filehi[80],store[80];
unsigned char data;
main(argc,argv)
int argc;
char *argv[];
{
v_smode(C8025);
w0 = wn_open(0,12,0,78,10,(BLUE<<4|WHITE),GREEN);
wn_puts(w0,2,20," TurboRacer 286 ");
wn_puts(w0,4,20," 8086 16bit - 8bit splitter aid ");
wn_puts(w0,6,20," (C) March 1988, P.D. Smart ");
pause(1);
wn_close(w0);
count=dot=0;
if(argc==1 || argc>2)
{
printf("SPLIT: Invalid arguments\n");
exit(-1);
}
strcpy(store,*++argv);
while(store[count]!=0)
{
filein[count]=store[count];
if(filein[count]=='.') dot=count;
count++;
}
if(dot) store[dot]=0;
filein[count]=0;
strcpy(filelo,store);
strcpy(filehi,store);
strcat(filelo,".LO");
strcat(filehi,".HI");
if((fp1=fopen(filein,"rb"))==NULL)
{
printf("SPLIT: File '%s' does not exist\n",filein);
exit(-1);
}
if((fp2=fopen(filelo,"wb"))==NULL)
{
printf("SPLIT: Can't create '%s'... Directory or Disk full\n",filelo);
exit(-1);
}
if((fp3=fopen(filehi,"wb"))==NULL)
{
printf("SPLIT: Can't create '%s'... Directory or Disk full\n",filehi);
exit(-1);
}
w0 = wn_open(0,1,0,78,22,YELLOW,RED);
wn_wrap(w0,TRUE);
wn_scroll(w0,BIOS);
wn_clr(w0);
wn_printf(w0,"Splitting file: %s -> %s, %s\n",filein,filelo,filehi);
count=cntlo=cnthi=flag=i=0;
wn_printf(w0,"Splitting word: 0000");
while(1)
{
if(feof(fp1)) break;
data=fgetc(fp1);
count++;
if(!flag)
{
fputc(data,fp2);
cntlo++;
flag=1;
} else
{
fputc(data,fp3);
cnthi++;
flag=0;
}
if(i++>255)
{
wn_printf(w0,"%cSplitting word: %04X",0x0d,count/2);
i=0;
}
}
wn_printf(w0,"\nBytes written to file: %s = %04X\n",filelo,cntlo);
wn_printf(w0,"Bytes written to file: %s = %04X\n",filehi,cnthi);
pause(1);
fclose(fp1);
fclose(fp2);
fclose(fp3);
wn_close(w0);
}
pause(seconds)
int seconds;
{
unsigned cnt,cnt2;
for(cnt=0;cnt<seconds;cnt++)
for(cnt2=0;cnt2<30000;cnt2++);
}


BIN
SOURCE/SPLIT.EXE Executable file
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Binary file not shown.

309
SOURCE/STARTUP.ASM Executable file
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;****************************************************************************
;** STARTUP.ASM **
;** ----------- **
;** **
;** (C) 1987, 1988 P.D. Smart **
;** **
;** This file is part of the TURBOROM.ASM source code. It contains code **
;** to perform:- **
;** **
;** FC00:0000 -> CPU test code, **
;** Memory test code, **
;** Basic initiator code, **
;** :- Load in new BIOS. **
;** :- Load in test code. **
;** :- Execute memory exercise code. **
;** :- Boot up DOS using BIOS in rom. **
;** **
;** These routines reside at ROM location FC00:0000 **
;** **
;****************************************************************************
STARTUP:MOV DX,0C00H ;Read scrap data out of link.
IN AL,DX
;*******************************
; Test 80286 processor. *
;*******************************
;Test 80286 flags.
CLI ;Disable interrupts.
MOV AH,0D5H ;Set SF, CF, ZF, and AF flags on.
SAHF
JNC E1 ;Error if CF not set.
JNZ E1 ;Error if ZF not set.
JNP E1 ;Error if PF not set.
JNS E1 ;Error if SF not set.
LAHF ;Load flag image to AH.
MOV CL,5
SHR AH,CL ;Shift AF into carry.
JNC E1 ;Error if AF not set.
MOV AL,40H
SHL AL,1
JNO E1 ;Error if OF not set.
XOR AH,AH
SAHF ;Clear SF, CF, ZF and PF.
JBE E1 ;Error if CF, ZF set.
JS E1 ;Error if SF set.
JP E1 ;Error if PF set.
LAHF
SHR AH,CL
JC E1 ;Error if AF set.
SHL AH,1
JO E1 ;Error if OF set.
;Test 80286 registers
MOV AX,0FFFFH
STC
PT1: MOV DS,AX ;Write all registers.
MOV BX,DS
MOV ES,BX
MOV CX,ES
MOV SS,CX
MOV DX,SS
MOV SP,DX
MOV BP,SP
MOV SI,BP
MOV DI,SI
JNC PT2
XOR AX,DI ;Pattern make it through registers.
JNZ E1 ;Error if it didnt.
CLC
JMP PT1
PT2: OR AX,DI
JZ MT
E1: MOV AL,1 ;Processor error code.
JMP ESEND
;*******************************
; End of 80286 testing. *
;*******************************
;*******************************
; Test lower 512K of memory. *
;*******************************
MT: MOV AX,0
MOV DS,AX ;DS points to 64K segment.
MT0: MOV BX,0 ;BX points to offset within segment.
MOV CX,07FFFH ;CX = number of writes per segment.
MT1: MOV AX,0FFFFH ;First load FF's into memory.
MOV [BX],AX
MOV AX,[BX]
CMP AX,0FFFFH ;Check to see if memory retained FF's.
JNE MT2
MOV AX,0000H ;Load 00's into memory.
MOV [BX],AX
MOV AX,[BX] ;Check to see if memory retained 00's.
CMP AX,0000H
JNE MT2
MOV AX,05555H ;Load 55's into memory.
MOV [BX],AX
MOV AX,[BX]
CMP AX,05555H ;Check to see if memory retained 55's.
JNE MT2
MOV AX,0AAAAH ;Load AA's into memory.
MOV [BX],AX
MOV AX,[BX]
CMP AX,0AAAAH ;Check to see if memory retained AA's.
JNE MT2
MOV AX,055AAH ;Now try a mixed combination.
MOV [BX],AX
MOV AX,[BX]
CMP AX,055AAH ;Check to see if retained.
JNE MT2
MOV AX,00000H ;Load in 0000's to clear memory.
MOV [BX],AX
INC BX
INC BX
LOOP MT1 ;Loop until count exhausted.
MOV AX,DS
ADD AX,1000H ;Move to next data segment.
MOV DS,AX
CMP AX,8000H ;If DS>=8000H, then 512K checked, exit.
JNE MT0
MOV AL,0 ;AL = Memory test pass code.
JMP ESEND
MT2: MOV AL,2 ;AL = Memory test fail code.
ESEND: MOV AH,AL
MOV DX,0C02H
ES1: IN AL,DX ;Determine if link is clear to send data.
TEST AL,1
JZ ES1 ;If not, wait until clear.
MOV DX,0C00H
MOV AL,AH ;Send error code.
OUT DX,AL
CMP AL,0
JE LDT ;Jump to load tables if no errors.
CMP AL,2
JNE ES2
JMP MEMTEST
ES2: HLT ;Halt if error.
;*******************************
; End of memory testing. *
;*******************************
;*******************************
; Setup H/W interrupt tables. *
;*******************************
LDT: MOV AX,0FC00H
MOV DS,AX
MOV AX,00000H
MOV ES,AX
MOV SI,INTTAB ;Address of table in ROM.
MOV DI,0 ;Base of memory.
MOV CX,0200H ;Transfer 32 vectors.
REP MOVSW ;Transfer.
;*******************************
; End of table setup. *
;*******************************
;*******************************
; Command mode. *
;*******************************
CM: MOV AX,0FC00H
MOV DS,AX ;Setup data segment and extra segment.
MOV ES,AX
MOV AX,00000H
MOV SS,AX ;Setup stack segment.
MOV SP,0500H ;Setup Top Of Stack.
;
CM1: CALL RXBYTE ;Get a command from PC.
CMP AL,1
JE BOOT ;If command is 1, BOOT up DOS.
CMP AL,2
JNE CM2 ;If command is 2, Copy resident BIOS into
JMP CBIOS ;memory then BOOT up DOS.
CM2: CMP AL,3
JE LBIOS ;If command is 3, load BIOS code from PC.
CMP AL,4
JE LOADT ;If command is 4, load TEST code from PC.
CMP AL,5
JE LMEMT ;If command is 5, execute interactive memory
JMP CM1 ;testing code.
;*******************************
; End of command mode. *
;*******************************
BOOT: JMP BOOTSTRAP
LMEMT: JMP MEMTEST
;***************************************
; Load a new BIOS in from the PC over *
; the link. *
;***************************************
LBIOS: MOV CX,4000H ;BIOS must be 16K long.
MOV BX,0000H ;Start loading at segment FC00:0000.
LBS1: CALL RXBYTE ;Get byte.
MOV DS:[BX],AL
INC BX ;Store in memory, then back for next byte.
LOOP LBS1
MOV AX,0 ;In order to execute the new BIOS, the ROM
MOV ES,AX ;has to be paged out. As the ROM, and high
MOV SI,LTAB1 ;memory reside in the same space, a special
MOV DI,0 ;piece of code has to be executed in low
MOV CX,10 ;memory. Thus transfer the necessary code
REP MOVSB ;into low memory.
JMP 0000:0000 ;And execute.
;*******************************
; End of new BIOS load. *
;*******************************
;***************************************
; Load a test program in from the PC. *
;***************************************
LOADT: MOV AX,1000H ;Segment to load code in = 1000:0000.
MOV DS,AX
MOV BX,0000H
CALL RXBYTE ;Get code size. Can't be >64Kbyte.
MOV CL,AL
CALL RXBYTE
MOV CH,AL ;Load count from link.
LDT1: CALL RXBYTE
MOV DS:[BX],AL ;Load test code into memory.
INC BX
LOOP LDT1 ;Continue for code size.
JMP 1000:0000
;*******************************
; End of test code loader. *
;*******************************
;***************************************
; Copy resident BIOS into RAM, then *
; boot up DOS. *
;***************************************
CBIOS: MOV BX,00000H ;Start at segment FC00:0000
MOV CX,1FFFH ;8k words to transfer.
CB1: MOV AX,[BX] ;Transfer by doing a read/write to the
MOV [BX],AX ;same location.
INC BX
INC BX
LOOP CB1
MOV DX,0C04H ;Page out ROM. Due to RAM occupying same
OUT DX,AL ;address space as ROM, and RAM containing
;a copy of ROM, execution will continue in
;RAM.
JMP BOOTSTRAP
;***************************************
; Print string. *
;***************************************
PRNTS: PUSH DS ;Store all registers used.
PUSH AX
PUSH BX
PUSH CX
PUSH DX
PUSH CS
POP DS
PRNTS1: LODSB ;Get byte addressed by SI. SI+1.
CMP AL,0FFH ;End of message.
JE PRNE
MOV AH,0EH ;Do a write teletype.
MOV BX,7
MOV CX,1
PUSH SI
INT 10H
POP SI
JMP PRNTS1
PRNE: POP DX ;Recover all registers.
POP CX
POP BX
POP AX
POP DS
RET
;*******************************
; End of print string. *
;*******************************


219
SOURCE/TABLES.ASM Executable file
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;****************************************************************************
;** TABLES.ASM **
;** ---------- **
;** **
;** (C) 1987, 1988 P.D. Smart **
;** **
;** This file is part of the TURBOROM.ASM source code. Once the system has **
;** initialised itself, these tables can be overwritten for extra storage **
;** space. The tables stored are:- **
;** **
;** Interrupt vector table, **
;** Memory Read/Write messages, **
;** Boot up messages, **
;** Bios ROM - RAM code. **
;** **
;** These tables reside at ROM location FC00:1000 **
;** **
;****************************************************************************
ORG 01000H ;Tables at FC00:1000
;***************************************
; Interrupt Table. *
; *
; Contains pointers to all the int's *
; used on the accelerator board. *
;***************************************
INTTAB: DW INTRAP0 ;IP 0
DW 0FC00H ;CS
DW INTRAP1 ;IP 1
DW 0FC00H ;CS
DW NMI ;IP 2
DW 0FC00H ;CS
DW INTRAP3 ;IP 3
DW 0FC00H ;CS
DW INTRAP4 ;IP 4
DW 0FC00H ;CS
DW INTRAP5 ;IP 5
DW 0FC00H ;CS
DW INTRAP6 ;IP 6
DW 0FC00H ;CS
DW INTRAP7 ;IP 7
DW 0FC00H ;CS
DW INTRAP8 ;IP 8
DW 0FC00H ;CS
DW KB_INT ;IP 9
DW 0FC00H ;CS
DW INTRAPA ;IP A
DW 0FC00H ;CS
DW INTRAPB ;IP B
DW 0FC00H ;CS
DW INTRAPC ;IP C
DW 0FC00H ;CS
DW INTRAPD ;IP D
DW 0FC00H ;CS
DW INTRAPE ;IP E
DW 0FC00H ;CS
DW INTRAPF ;IP F
DW 0FC00H ;CS
DW INTR10 ;IP 10
DW 0FC00H ;CS
DW INTR11 ;IP 11
DW 0FC00H ;CS
DW INTR12 ;IP 12
DW 0FC00H ;CS
DW INTR13 ;IP 13
DW 0FC00H ;CS
DW INTR14 ;IP 14
DW 0FC00H ;CS
DW INTRAP ;IP 15
DW 0FC00H ;CS
DW INTR16 ;IP 16
DW 0FC00H ;CS
DW INTR17 ;IP 17
DW 0FC00H ;CS
DW INTRAP18 ;IP 18
DW 0FC00H ;CS
DW BOOTSTRAP ;IP 19
DW 0FC00H ;CS
DW INTR1A ;IP 1A
DW 0FC00H ;CS
DW INTRAP ;IP 1B
DW 0FC00H ;CS
DW INTRAP ;IP 1C
DW 0FC00H ;CS
DW INTRAP1D ;IP 1D
DW 0FC00H ;CS
DW INTRAP1E ;IP 1E
DW 0FC00H ;CS
DW INTRAP1F ;IP 1F
DW 0FC00H ;CS
DW 00000H ;IP 20
DW 00000H ;CS
DW 00000H ;IP 21
DW 00000H ;CS
DW 00000H ;IP 22
DW 00000H ;CS
DW 00000H ;IP 23
DW 00000H ;CS
DW 00000H ;IP 24
DW 00000H ;CS
DW 00000H ;IP 25
DW 00000H ;CS
DW 00000H ;IP 26
DW 00000H ;CS
DW 00000H ;IP 27
DW 00000H ;CS
DW 00000H ;IP 28
DW 00000H ;CS
DW 00000H ;IP 29
DW 00000H ;CS
DW 00000H ;IP 2A
DW 00000H ;CS
DW 00000H ;IP 2B
DW 00000H ;CS
DW 00000H ;IP 2C
DW 00000H ;CS
DW 00000H ;IP 2D
DW 00000H ;CS
DW 00000H ;IP 2E
DW 00000H ;CS
DW 00000H ;IP 2F
DW 00000H ;CS
DW 00000H ;IP 30
DW 00000H ;CS
DW 00000H ;IP 31
DW 00000H ;CS
DW 00000H ;IP 32
DW 00000H ;CS
DW 00000H ;IP 33
DW 00000H ;CS
DW 00000H ;IP 34
DW 00000H ;CS
DW 00000H ;IP 35
DW 00000H ;CS
DW 00000H ;IP 36
DW 00000H ;CS
DW 00000H ;IP 37
DW 00000H ;CS
DW 00000H ;IP 38
DW 00000H ;CS
DW 00000H ;IP 39
DW 00000H ;CS
DW 00000H ;IP 3A
DW 00000H ;CS
DW 00000H ;IP 3B
DW 00000H ;CS
DW 00000H ;IP 3C
DW 00000H ;CS
DW 00000H ;IP 3D
DW 00000H ;CS
DW 00000H ;IP 3E
DW 00000H ;CS
DW 00000H ;IP 3F
DW 00000H ;CS
DW HARD_BASE ;IP 40
DW 0FC00H ;CS
DW HARD_BASE ;IP 41
DW 0FC00H ;CS
DB 0780H DUP(0)
;*******************************
; End of Interrupt table. *
;*******************************
BADMES: DB 'Non system disk or NO disk in DRIVE A:',0DH,0AH
DB 'Place system disk in drive A:, press ANY key when ready'
DB 0DH,0AH,0AH,0FFH
ACCEL: DB 'Booting DOS...........',0DH,0AH,0FFH
MESBOOT:DB '286 CPU MEMORY READ/WRITE SOFTWARE, (C) 1987,1988 P.D. Smart',0DH,0AH,0FFH
MESILC: DB 'COMMAND PASSED IS NOT RECOGNISED',0DH,0AH,0FFH
LTAB1: DB 0BAH,04H,0CH,0EEH,0EAH,0F0H,03FH,00H,0FCH,00H
RS232_BASE EQU 0000H
PRINTER_BASE EQU 0008H
EQUIP_FLAG EQU 0010H
MFG_TST EQU 0012H
MEMORY_SIZE EQU 0013H
MFG_ERR_FLAG EQU 0015H
KB_FLAG EQU 0017H
KB_FLAG_1 EQU 0018H
ALT_INPUT EQU 0019H
BUFFER_HEAD EQU 001AH
BUFFER_TAIL EQU 001CH
KB_BUFFER EQU 001EH
INTR_FLAG EQU 006BH
BIOS_BREAK EQU 0071H
RESET_FLAG EQU 0072H
PRINT_TIM_OUT EQU 0078H
RS232_TIM_OUT EQU 007CH
BUFFER_START EQU 0080H
BUFFER_END EQU 0082H
;
INS_STATE EQU 80H
CAPS_STATE EQU 40H
NUM_STATE EQU 20H
SCROLL_STATE EQU 10H
ALT_SHIFT EQU 08H
CTL_SHIFT EQU 04H
LEFT_SHIFT EQU 02H
RIGHT_SHIFT EQU 01H
INS_SHIFT EQU 80H
CAPS_SHIFT EQU 40H
NUM_SHIFT EQU 20H
SCROLL_SHIFT EQU 10H
HOLD_STATE EQU 08H
NUM_KEY EQU 69
SCROLL_KEY EQU 70
ALT_KEY EQU 56
CTL_KEY EQU 29
CAPS_KEY EQU 58
LEFT_KEY EQU 42
RIGHT_KEY EQU 54
INS_KEY EQU 82
DEL_KEY EQU 83


7
SOURCE/TURBO.BAT Executable file
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ECHO OFF
ECHO Assembling TURBOROM.
A86 TURBOROM.ASM STARTUP.ASM MEM.ASM TABLES.ASM BIOS.ASM
DEL *.SYM >NUL


50
SOURCE/TURBOROM.ASM Executable file
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;****************************************************************************
;** TurboRacer 286 control ROM routines. **
;** ------------------------------------ **
;** **
;** (C) 1987, 1988 P.D. Smart **
;** **
;** This source file contains the coding used to control the TurboRacer **
;** 286. It's basic structure is as follows:- **
;** **
;** 16k ROM (8K * 16bit) mapped into addresses 8000:0000 - FFFF:FFFF, **
;** which is 512K in size. The rom is only used for initialization, and **
;** is paged out after startup. **
;** **
;** Addresses considered within this ROM are FC00:0000 - FC00:3FFF which **
;** is 16K. Within this 16K allocation, it is subdivided into 4 main **
;** areas, namely:- **
;** **
;** FC00:0000 -> CPU test code, **
;** Memory test code, **
;** Basic initiator code, **
;** :- Load in new BIOS. **
;** :- Load in test code. **
;** :- Execute memory exercise code. **
;** :- Boot up DOS using BIOS in rom. **
;** **
;** FC00:1000 -> Interrupt vector tables, **
;** Read/Write messages. **
;** **
;** FC00:2000 -> BIOS **
;** **
;** FC00:3FF0 -> RESET boot up code. **
;** **
;** This file is assembled using the A86 assembler. To assemble correctly, **
;** invoke A86 at the DOS prompt as follows:- **
;** **
;** C:\> A86 TURBOROM.ASM STARTUP.ASM MEM.ASM TABLES.ASM BIOS.ASM **
;** **
;** **
;****************************************************************************
ORG 00000H ;FC00:0000


86
SOURCE/VIDEO Executable file
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M1: DW OFFSET SET_MODE
DW OFFSET SET_CTYPE
DW OFFSET SET_CPOS
DW OFFSET READ_CURSOR
DW OFFSET READ_LPEN
DW OFFSET ACT_DISP_PAGE
DW OFFSET SCROLL_UP
DW OFFSET SCROLL_DOWN
DW OFFSET READ_AC_CURRENT
DW OFFSET WRITE_AC_CURRENT
DW OFFSET WRITE_C_CURRENT
DW OFFSET SET_COLOR
DW OFFSET WRITE_DOT
DW OFFSET READ_DOT
DW OFFSET WRITE_TTY
DW OFFSET VIDEO_STATE
DW OFFSET VIDEO_RETURN
DW OFFSET VIDEO_RETURN
DW OFFSET VIDEO_RETURN
DW OFFSET WRITE_STRING
M1N:
M1L EQU M1N-M1
VIDEO: STI
CLD
CMP AH,MIL/2
JNB M4
PUSH ES
PUSH DS
PUSH DX
PUSH CX
PUSH BX
PUSH SI
PUSH DI
PUSH BP
MOV SI,DATA
MOV DS,SI
MOV SI,AX
MOV AL,BYTE PTR EQUIP_FLAG
AND AL,30H
CMP AL,30H
MOV DI,0B800H
JNE M2
MOV DI,0B000H
M2: MOV ES,DI
MOV AL,AH
CBW
SAL AX,1
XCHG SI,AX
MOV AH,BYTE PTR CRT_MODE
JMP WORD PTR CS:[SI+OFFSET M1]
M4: IRET
SET_MODE:
MOV DX,03D4H
MOV DI,WORD PTR EQUIP_FLAG
AND DI,30H
CMP DI,30H
JNE M8C
MOV AL,7
MOV DL,0B4H
JMP SHORT M8
M8C: CMP AL,7
JB M8
MOV AL,0
CMP DI,20H
JE M8
MOV AL,2
M8: MOV BYTE PTR CRT_MODE,AL
MOV WORD PTR ADDR_6845,DX
MOV BYTE PTR ROWS,25-1
PUSH DS
PUSH AX
CBW
MOV SI,AX
MOV AL,CS:[SI+OFFSET M7]
MOV BYTE PTR CRT_MODE_SET,AL
AND AL,037H
PUSH DX
ADD DX,4
OUT DX,AL
POP DX
SUB BX,BX
MOV DS,BX