mister-devel/ao486_MiSTer
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Author SHA1 Message Date
sorgelig
4382cf299d Use synchronous reset. add some constraints. 2020-08-14 16:04:16 +08:00
sorgelig
98ab37ef83 vga: overhaul of pixel clock and blanks, proper handling of scandoubled resolutions. 2020-08-14 13:47:48 +08:00
sorgelig
4a79bc5a64 Independent clock for video. 2020-08-12 13:41:38 +08:00
sorgelig
cf9e20fcbc Move 100MHz to debug menu. 2020-08-11 21:11:45 +08:00
sorgelig
be09364186 uart: don't use fifo in mpu mode. 2020-08-11 21:10:57 +08:00
sorgelig
a0768d240d uart: fixes in mpu mode. 2020-08-11 18:37:17 +08:00
sorgelig
a2217cf337 temp commit with low slack. 2020-08-11 12:34:04 +08:00
sorgelig
100432eeb7 Adjust non-MPU UART speed in MIDI mode. Cleanup from cross-device ports. 2020-08-11 02:56:19 +08:00
sorgelig
06092fc46b Standard 31250 baud rate for MIDI mode. 2020-08-10 19:42:24 +08:00
sorgelig
bb05e49631 Simplify mgmt module, other cleanups. 2020-08-10 19:42:23 +08:00
sorgelig
00750849cf More cleanup, multibus devices mux busses internally. 2020-08-10 19:42:23 +08:00
sorgelig
49c1b52de6 Simplification, cleanup. 2020-08-10 19:42:23 +08:00
sorgelig
aab20e1d5c Remove redundatnt avalon_io layer. 2020-08-10 19:42:22 +08:00
sorgelig
8ec0951cfb Use custom I/O arbiter. Goodbye to QSYS. 2020-08-10 19:42:22 +08:00
sorgelig
95e1cbb253 joystick: use 8bit access. 2020-08-10 19:42:22 +08:00
Robert Peip
9c63fe4c0f add simulation framework for modelsim for both caches and cpu test 2020-08-07 09:00:45 +02:00
sorgelig
d3b3859da0 Eliminate interconnect between dma and cpu. 2020-08-07 14:35:47 +08:00
sorgelig
9a86faeb2d hdd: add pre-fetch. 2020-08-07 13:14:26 +08:00
sorgelig
ae96e38de3 Overhaul of mgmt bus to reduce resources. Calc timings for floppy internally. 2020-08-07 13:14:09 +08:00
sorgelig
574af5e23f uart: use tx fifo for mpu. fake intelligent mode. 2020-08-07 13:12:26 +08:00
sorgelig
d4f6897eca vgabios: update the logo. 2020-08-07 13:11:59 +08:00
Robert Peip
fd243565df revert: prefetch TLB request removal 2020-08-06 15:28:39 +02:00
sorgelig
239ee87dcf Add SVGA BIOS and Win9x driver. 2020-08-05 14:40:40 +08:00
sorgelig
a471da10b2 Calculate clock-dependent timings locally. 2020-08-05 14:40:39 +08:00
sorgelig
c81d4f7b0c uart: fixes in mpu mode. 2020-08-05 14:40:39 +08:00
sorgelig
6c58f2e68f pipelining to relax the routing. 2020-08-05 14:40:39 +08:00
Robert Peip
09fcf84765 Instruction Fetch path improved: 
- bypass prefetch fifo
- don't request TLB if not required
- stop cache burst when jump happened
 2020-08-04 20:08:12 +02:00
sorgelig
edc3c8f5e7 Cleanup in mgmt bus. 2020-08-04 05:52:28 +08:00
sorgelig
0746e96ef3 3Mbit connection in high-speed PPP/Console mode. 2020-08-04 03:45:41 +08:00
sorgelig
565cc05d22 qsys: fix mgmt_bridge settings. 2020-08-04 03:43:48 +08:00
sorgelig
0bbcb4c9da uart: don't ack to FF in mpu-uart mode. 2020-08-04 03:43:08 +08:00
maikmerten
214d17673e execute_shift.v: restructure shifter 
The original shifter code selects shifter results using nested ternary statements. This leads to a long chain of conditionals. This is now restructured to using case statements, which are "wider", but less "deep".

For now, both the origina code and the restructured code are included and can be selected via defines. In the future, the unused code path can be removed.
 2020-08-04 00:24:25 +08:00
sorgelig
3aab0a4523 hdd: simplified data bus. 2020-08-03 17:11:23 +08:00
sorgelig
b6b2e3199d uart: implement MPU-401 dumb mode. 2020-08-03 16:59:58 +08:00
Robert Peip
a6023474e0 timing optimization: removed not needed multiplexers in TLB and not required signal in CPU 2020-08-02 16:55:35 +02:00
sorgelig
933dc96169 hdd: faster bus for read/write. 2020-08-02 18:16:12 +08:00
sorgelig
ece74aba2a uart: fifo-off compatibility, implement mark/space parity. 2020-08-01 20:43:01 +08:00
sorgelig
f10086a5bb Remove intermediate disk i/o module. 2020-08-01 20:37:19 +08:00
Robert Peip
7431d4b433 fixed shared memory 2020-08-01 14:32:01 +02:00
Robert Peip
aa65f9e698 bypass aligned reads directly into CPU 2020-08-01 12:02:30 +02:00
Robert Peip
087914ebb6 L2 Cache: 2 times size, LRU exchange stategy, reduced dirtyflag ressource usage 2020-07-31 21:38:19 +02:00
sorgelig
911796999d Use opensource UART. 2020-08-01 01:18:21 +08:00
sorgelig
8ad57c2e2c joystick: support for variable cpu clock and some fixes. 2020-07-30 20:47:22 +08:00
sorgelig
7534fe6954 Add MiSTerFS. 2020-07-30 19:26:06 +08:00
sorgelig
393830024f vga: additional wait state for ports reading to relax the timings. 2020-07-30 19:17:46 +08:00
sorgelig
da81e35b10 vgabios: remove unused features, make it fit to 32KB. 2020-07-30 19:07:18 +08:00
sorgelig
be08f83f9e joystick: add 4-buttons and gravis pro. 2020-07-30 02:08:29 +08:00
sorgelig
b725ea4977 Update system bios binary. 2020-07-29 22:55:31 +08:00
sorgelig
7b75f60bd2 ps2: clear receive buffer when host sends the command. 2020-07-29 07:33:54 +08:00
sorgelig
a6a1f81ec1 bios: fix cli/sti in keyboard int handler. 2020-07-29 07:33:54 +08:00