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Fix dual SDRAM mode.

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This commit is contained in:
Sorgelig
2025-09-09 07:39:00 +08:00
parent b293ea0c2a
commit da7dddecff
1 changed files with 32 additions and 29 deletions
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61
sys/sys_top.v
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@@ -512,7 +512,9 @@ always@(posedge clk_sys) begin
1: PhaseInc[15:0] <= io_din;
2: PhaseInc[31:16] <= io_din;
3: PhaseInc[39:32] <= io_din[7:0];
`ifndef MISTER_DUAL_SDRAM
6: subcarrier <= io_din[0];
`endif
endcase
end
end
@@ -1397,38 +1399,39 @@ osd vga_osd
wire vga_cs_osd;
csync csync_vga(clk_vid, vga_hs_osd, vga_vs_osd, vga_cs_osd);
`ifndef MISTER_DISABLE_YC
reg pal_en;
reg yc_en;
reg cvbs;
reg [16:0] ColorBurst_Range;
wire [23:0] yc_o;
wire yc_hs, yc_vs, yc_cs, yc_de;
yc_out yc_out
(
.clk(clk_vid),
.PAL_EN(pal_en),
.CVBS(cvbs),
.PHASE_INC(PhaseInc),
.COLORBURST_RANGE(ColorBurst_Range),
.hsync(vga_hs_osd),
.vsync(vga_vs_osd),
.csync(vga_cs_osd),
.de(vga_de_osd),
.dout(yc_o),
.din(vga_data_osd),
.hsync_o(yc_hs),
.vsync_o(yc_vs),
.csync_o(yc_cs),
.de_o(yc_de)
);
`endif
reg [39:0] PhaseInc;
`ifndef MISTER_DUAL_SDRAM
`ifndef MISTER_DISABLE_YC
reg pal_en;
reg yc_en;
reg cvbs;
reg [16:0] ColorBurst_Range;
wire [23:0] yc_o;
wire yc_hs, yc_vs, yc_cs, yc_de;
yc_out yc_out
(
.clk(clk_vid),
.PAL_EN(pal_en),
.CVBS(cvbs),
.PHASE_INC(PhaseInc),
.COLORBURST_RANGE(ColorBurst_Range),
.hsync(vga_hs_osd),
.vsync(vga_vs_osd),
.csync(vga_cs_osd),
.de(vga_de_osd),
.dout(yc_o),
.din(vga_data_osd),
.hsync_o(yc_hs),
.vsync_o(yc_vs),
.csync_o(yc_cs),
.de_o(yc_de)
);
`endif
// Subcarrier generation for external encoders (independent of YC module)
reg subcarrier;
reg [39:0] PhaseInc;
reg [39:0] sub_accum;
always @(posedge clk_vid) sub_accum <= sub_accum + PhaseInc;