* Allow UART access to ROM and WRAM for SNI
* [SNI] SRAM and controller register support
* keep file definitions in files.qip
* fix SDRAM timing
* further SDRAM optimization
* add a protocol version number to SNI command handler
* sdram: move raw_req_test off the critical path
* sni: fix issue with WRAM writes to SA-1 games
* Address review feedback
* Revert "Fix save states when rom address mirror is active (#470)"
This reverts commit f9901ee8e7.
* Revert "Add rom address mirroring when rom size is not a power of 2 (#469)"
This reverts commit 38396226dd.
* PPU: fix FORCE_BLANK inferred as async clk
With the undocumented sizes 16x32 and 32x64 two of the obj size signals
are active simultaneously. It seems that the Range and Time periods use
a mix of the two sizes for different checks.
Example: With a sprite size of 16x32 the sprite is still in range when
the H position is set to -16. Time treats the sprite as 16x16 but with
H position -16 it displays the tiles with horizontal offset 2 & 3
instead of 0 & 1.
Normally with sprite interlace enabled, the sprite height is halved but
with a sprite size of 16x32 it is treated as 32x8 instead of 32x16.
With tile flip it only inverts the tile count bits according to sprite
size.
Pocky & Rocky title screen pixels should change from white to purple
when Options menu appears.
In VBlank if BG mode is 0-6 then BG fetches all $FF like Force Blank.
If the mode is then changed to mode 7 in VBLank then the latched $FF will
stay in the latched data until mode is changed to 0-6 again.
-fix fetching of disabled bg layers (Pocky & Rocky: title)
-increase the pixel output pipeline (Wild Guns: pixel)
-implement the behavior of the Color Math unit when changing settings (Shounen Ashibe - Goma-chan no Yuuenchi Daibouken, Pocky & Rocky: pixels)
This behavior was confirmed with test roms.
MPY implemented as described in the FullSnes doc. Mode7 gets 2
multiplication results per pixel. Signed 16x11 multiplier (27 bits).
If Force Blank is enabled during the M7_TEMP_X/Y calculation
then it uses the result of the general purpose M7AxM7B multiply.
That means the following line will start at the wrong position.
BG fetching continues during Force Blank but Tile map data and pixels
read from VRAM will read as $FF.
Force Blank can be disabled at any BG fetch cycle. Depending on the
cycle where Force Blank is disabled a BG layer will read Tile $3FF or
pixels as color $FF.
The real directory is rtl/chip/BSX/ and not rtl/chip/bsx/
This change permits with linux compilation to fix freeze on welcom screen of Satellaview contents.
* Save states WIP
Read/write to DDRAM directly
DDRAM: reset cache during reset
SNES.sv: change ROM index so boot1 can be used for savestate ROM
Restore UART and MIDI in CONF str
Fix SPC file playing
* Save state: add SA1 support
SA1: fix save state rd/wr signals
* Add savestates.asm source
* Save state: remove emulation interrupt vectors
* Save state: make PPU regs readable
* Save state: add DSP support
* Save state: add Super FX support
* Default state save to SD ON, Option for Save state button combo
* parameter to build without save states
* Add boot1.rom for save states
