Aitor Gómez García ebbecd6712 Fix HGC border display by calculating HBlank timing on correct clock domain ...

- Add std_hsyncwidth and vblank_border outputs to HGC module for border detection
- Connect CRTC hsync_width register (R3) to enable dynamic sync width detection
- Update HGC H_SYNCWIDTH to standard value (4'd15) per Hercules specifications
- Extend Peripherals.sv to multiplex HGC timing signals with CGA
- Fix critical bug: HBlank_fixed was calculated only in CGA clock domain
  In HGC mode, it was desynchronized, causing shifted display instead of proper border
- Add HBlank_fixed_hgc calculated on clk_57_272 (HGC clock) for correct timing
- Update LHBL logic to use appropriate HBlank_fixed for each video mode
- Border now properly reduces visible area in HGC mode with correct synchronization

2026-01-23 13:42:58 +01:00

..

cga_attrib.v

Tandy 160x200x16

2022-11-13 10:11:39 +01:00

cga_composite.v

Beta 0.3

2022-05-23 14:32:32 +02:00

cga_pixel.sv

Enhanced Tandy 640x225 text mode display

2022-11-21 05:47:16 +01:00

cga_scandoubler.v

Beta 0.3

2022-05-23 14:32:32 +02:00

cga_sequencer.v

Fix timing issues 160x200x16

2022-11-19 19:44:32 +01:00

cga_vgaport.v

CGA CRTC updated to UM6845R

2023-03-12 17:04:54 +01:00

cga_vram.v

Beta 0.3

2022-05-23 14:32:32 +02:00

cga.hex

Beta 0.3

2022-05-23 14:32:32 +02:00

cga.v

Ensure UM6845R exposes the horizontal sync width register so CGA/HGC can query the real timing

2026-01-23 13:42:58 +01:00

hgc_attrib.v

MDA Upgrade to Hercules Graphics Card

2023-01-19 11:22:20 +01:00

hgc_pixel.v

MDA Upgrade to Hercules Graphics Card

2023-01-19 11:22:20 +01:00

hgc_sequencer.v

MDA Upgrade to Hercules Graphics Card

2023-01-19 11:22:20 +01:00

hgc_vgaport.v

MDA Upgrade to Hercules Graphics Card

2023-01-19 11:22:20 +01:00

hgc.hex

MDA Upgrade to Hercules Graphics Card

2023-01-19 11:22:20 +01:00

hgc.v

Fix HGC border display by calculating HBlank timing on correct clock domain

2026-01-23 13:42:58 +01:00

splash_rom.v

Clear CGA VRAM on status[0] reset path and hold reset during clear

2025-12-23 11:23:28 +01:00

splash.hex

Update splash/credits text and regenerate assets

2026-01-06 20:14:42 +01:00

UM6845R.v

Ensure UM6845R exposes the horizontal sync width register so CGA/HGC can query the real timing

2026-01-23 13:42:58 +01:00

video_monochrome_converter.sv

Fix HGC mono jitter by aligning mono timing and blanking

2025-12-19 10:53:25 +01:00

video.qip

Clear CGA VRAM on status[0] reset path and hold reset during clear

2025-12-23 11:23:28 +01:00

vram.v

VRAM resizing for MDA to 4Kb

2022-09-05 05:48:30 +02:00