Fix 10MHz.

2026-05-17 03:04:20 +00:00 · 2022-11-13 23:41:16 +09:00
parent bf13833328
commit e15e45e0ea
1 changed files with 4 additions and 1 deletions
--- a/PCXT.sv
+++ b/PCXT.sv
@@ -453,7 +453,10 @@ module emu
    reg [4:0] clk_10_cnt = 1'b0;
    always @(posedge clk_chipset)
        if (4'd0 == clk_10_cnt) begin
-            clk_10_cnt  <= 4'd5 - 4'd1;
+            if (clk_10)
+                clk_10_cnt  <= 4'd3 - 4'd1;
+            else
+                clk_10_cnt  <= 4'd2 - 4'd1;
            clk_10      <= ~clk_10;
        end
        else begin