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Fix overflow flag, by @MicroCoreLabs

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This commit is contained in:
Aitor Gómez
2022-11-03 10:40:38 +01:00
parent f4348db7bd
commit 5e19ce2cb2
1 changed files with 85 additions and 7 deletions
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92
rtl/8088/mcl86_eu_core.v
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@@ -117,9 +117,6 @@ wire eu_flag_c;
wire eu_opcode_jump_call;
wire intr_asserted;
wire eu_jump_boolean;
wire eu_nmi_pending;
wire eu_flag_temp;
wire new_instruction;
reg [12:0] eu_rom_address;
reg [51:0] eu_calling_address;
reg [15:0] eu_register_ax;
@@ -159,6 +156,11 @@ wire [15:0] eu_operand0;
wire [15:0] eu_operand1;
wire [31:0] eu_rom_data;
wire [15:0] adc_total;
wire [15:0] sbb_total;
reg eu_overflow_fix;
reg eu_add_overflow8_fixed;
reg eu_add_overflow16_fixed;
//------------------------------------------------------------------------
@@ -332,6 +334,10 @@ assign intr_asserted = BIU_INTR & intr_enable_delayed;
assign new_instruction = (eu_rom_address[12:8]==5'h01) ? 1'b1 : 1'b0;
assign adc_total = eu_register_r0 + eu_register_r1 + eu_flag_c;
assign sbb_total = eu_register_r0 - eu_register_r1 - eu_flag_c;
//------------------------------------------------------------------------------------------
//
// EU Microsequencer
@@ -413,17 +419,89 @@ else
biu_done_caught <= 1'b1;
else if (eu_biu_req_d1==1'b1 && eu_biu_req==1'b0)
biu_done_caught <= 1'b0;
// ADC - Byte
//
if (eu_rom_address == 16'h0A03)
begin
eu_overflow_fix <= 1'b1;
if ( ( (eu_register_r0[7]==1'b0) && (eu_register_r1[7]==1'b0) && (adc_total[7]==1'b1) ) ||
( (eu_register_r0[7]==1'b1) && (eu_register_r1[7]==1'b1) && (adc_total[7]==1'b0) ) )
begin
eu_add_overflow8_fixed <= 1'b1;
end
else
begin
eu_add_overflow8_fixed <= 1'b0;
end
end
// SBB - Byte
//
if (eu_rom_address == 16'h0AAE)
begin
eu_overflow_fix <= 1'b1;
if ( ( (eu_register_r0[7]==1'b0) && (eu_register_r1[7]==1'b1) && (sbb_total[7]==1'b1) ) ||
( (eu_register_r0[7]==1'b1) && (eu_register_r1[7]==1'b0) && (sbb_total[7]==1'b0) ) )
begin
eu_add_overflow8_fixed <= 1'b1;
end
else
begin
eu_add_overflow8_fixed <= 1'b0;
end
end
// ADC - Word
//
if (eu_rom_address == 16'h0A12)
begin
eu_overflow_fix <= 1'b1;
if ( ( (eu_register_r0[15]==1'b0) && (eu_register_r1[15]==1'b0) && (adc_total[15]==1'b1) ) ||
( (eu_register_r0[15]==1'b1) && (eu_register_r1[15]==1'b1) && (adc_total[15]==1'b0) ) )
begin
eu_add_overflow16_fixed <= 1'b1;
end
else
begin
eu_add_overflow16_fixed <= 1'b0;
end
end
// SBB - Word
//
if (eu_rom_address == 16'h0ABA)
begin
eu_overflow_fix <= 1'b1;
if ( ( (eu_register_r0[15]==1'b0) && (eu_register_r1[15]==1'b1) && (sbb_total[15]==1'b1) ) ||
( (eu_register_r0[15]==1'b1) && (eu_register_r1[15]==1'b0) && (sbb_total[15]==1'b0) ) )
begin
eu_add_overflow16_fixed <= 1'b1;
end
else
begin
eu_add_overflow16_fixed <= 1'b0;
end
end
if (eu_rom_address == 16'h0011) eu_overflow_fix <= 1'b0;
// Generate and store flags for addition
if (eu_stall_pipeline==1'b0 && eu_opcode_type==3'h2)
begin
eu_add_carry <= carry[16];
eu_add_carry8 <= carry[8];
eu_add_aux_carry <= carry[4];
eu_add_overflow16 <= carry[16] ^ carry[15];
eu_add_overflow8 <= carry[8] ^ carry[7];
eu_add_overflow16 <= (eu_overflow_fix==1'b1) ? eu_add_overflow16_fixed : (carry[16] ^ carry[15]);
eu_add_overflow8 <= (eu_overflow_fix==1'b1) ? eu_add_overflow8_fixed : (carry[8] ^ carry[7]);
end