David Hunter ffc527951b huc6261: Match huc6260.vhd pixel clock timings

2026-01-01 11:39:37 -08:00

..

fifo

Add the SCSI controller and a fake CD drive

2025-12-26 16:19:59 -08:00

pll

Fix multiple instabilities due to unplanned CDC

2025-12-30 22:54:44 -08:00

tb

huc6270: Fix some sprites not rendered

2025-12-31 00:19:00 -08:00

v810 @ d5797519dc

VDC0 is rendering sprites?

2025-12-28 11:43:06 -08:00

.gitignore

Simulate full core with SDRAM memory

2025-11-26 20:18:16 -08:00

dpram.sv

Builds in Quartus

2025-12-24 10:58:50 -08:00

dpram.vhd

Add HuC6270.vhd and dependencies for FPGA testing

2025-12-30 22:58:19 -08:00

fake_cd.sv

Add the SCSI controller and a fake CD drive

2025-12-26 16:19:59 -08:00

fx_ga.sv

Fix upper halfword read from ROM

2025-12-26 23:21:09 -08:00

huc6261_lite.sv

HuC6261: Add color palette RAM, sync gen, and VDC out mixer

2025-12-29 20:14:30 -08:00

huc6261.sv

huc6261: Match huc6260.vhd pixel clock timings

2026-01-01 11:39:37 -08:00

huc6270.pre-xlate.vhd

Add HuC6270.vhd and dependencies for FPGA testing

2025-12-30 22:58:19 -08:00

huc6270.sv

huc6270: Fix some sprites not rendered

2025-12-31 00:19:00 -08:00

huc6270.vhd

Add HuC6270.vhd and dependencies for FPGA testing

2025-12-30 22:58:19 -08:00

huc6272.sv

Add the SCSI controller and a fake CD drive

2025-12-26 16:19:59 -08:00

mach.sv

HuC6261: Add color palette RAM, sync gen, and VDC out mixer

2025-12-29 20:14:30 -08:00

memif_sdram.sv

Handle reset during active SDRAM access

2025-11-28 12:33:34 -08:00

mycore.v

Fix multiple instabilities due to unplanned CDC

2025-12-30 22:54:44 -08:00

pll.qip

Fix multiple instabilities due to unplanned CDC

2025-12-30 22:54:44 -08:00

pll.v

Fix multiple instabilities due to unplanned CDC

2025-12-30 22:54:44 -08:00

ram.sv

Add copyright

2025-11-25 10:47:18 -08:00

scsi.v

Add the SCSI controller and a fake CD drive

2025-12-26 16:19:59 -08:00

sdram.v

Fix SDRAM 8- and 16-bit writes

2025-12-20 22:46:38 -08:00