mister-devel/GBA_MiSTer
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3 Commits

Author SHA1 Message Date
Robert Peip
e16206b254 testbench: fixed ddrram model, added automatic test for savestates 2020-01-22 16:12:07 +01:00
Robert Peip
592c32fbdf simulation: loading of ROM + savestate added, fix bug where savestate loading could hang savestate processing until reboot 2020-01-22 13:59:12 +01:00
Robert Peip
bac5249ef5 added simulation framework 2020-01-22 12:29:33 +01:00