mirror of
https://github.com/MiSTer-devel/CDi_MiSTer.git
synced 2026-04-19 03:04:19 +00:00
738bd44379
- Attach display file and ICA to SDRAM - Fixed byte order of 8 bit accesses by CPU - Added SDRAM burst mode to fix video timing - Fixed missing reset behavior of some components - Added optional SDRAM zeroing - Added SDRAM refresh during ROM download - Added OS aware syscall parser to simulation - Fixed SCC68070 on-chip interrupt autovector - Fixed SCC68070 Timer0 frequency - Added video pixel data FIFO - Changed SDRAM auto refresh command
35 lines
391 B
NASM
35 lines
391 B
NASM
section .text
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org $400000
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vector:
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dc.l $300
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dc.l main
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dc.l 0,0
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main:
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move.l #0,d0
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move.l #0,a0
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move.l #(1024*512/4),d1
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erasebank0:
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move.l d0,(a0)
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add.l #4,a0
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add.l #-1,d1
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bne erasebank0
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move.l #$200000,a0
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move.l #(1024*512/4),d1
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erasebank1:
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move.l d0,(a0)
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add.l #4,a0
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add.l #-1,d1
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bne erasebank1
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endless:
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bra endless
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wastespace:
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incbin "misterdump.bin"
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