mirror of
https://github.com/MiSTer-devel/CDi_MiSTer.git
synced 2026-04-19 03:04:19 +00:00
- Required for games like Lost Ride - Partially breaks https://github.com/Slamy/CDi_FMVTest/tree/main/fmv_moving_window again - Mechanism not yet fully understood
Verilator Simulation
Verilator is much faster than ModelSim but is restricted to Verilog/SystemVerilog. VHDL source code must be converted first.
Please use the convert scripts in case the VHDL code was changed. To be safe, a conversion is already part of the repo.
Prerequisites
You need CD images to use with the simulation. Only the .bin files are required. .chd is not supported.
Usage
./sim_top.sh