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jackyangantelope
2025-12-09 23:13:04 +08:00
committed by GitHub
parent 6627e7a75c
commit 084be9eff5
10 changed files with 3120 additions and 2947 deletions
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2
Archie.qsf
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@@ -13,7 +13,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Standard Edition"
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Lite Edition"
set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files

5
Archie.sv
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@@ -57,6 +57,8 @@ module emu
input [11:0] HDMI_WIDTH,
input [11:0] HDMI_HEIGHT,
output HDMI_FREEZE,
output HDMI_BLACKOUT,
output HDMI_BOB_DEINT,
`ifdef MISTER_FB
// Use framebuffer in DDRAM
@@ -185,6 +187,9 @@ assign LED_DISK = hdd_led;
assign LED_POWER = 0;
assign BUTTONS = 0;
assign HDMI_FREEZE = 0;
assign HDMI_BLACKOUT = 0;
assign HDMI_BOB_DEINT = 0;
assign VGA_DISABLE = 0;
wire vga_de;

5931
sys/ascal.vhd
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File diff suppressed because it is too large Load Diff

24
sys/hps_io.sv
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@@ -27,7 +27,7 @@
// VDNUM 1..10
// BLKSZ 0..7: 0 = 128, 1 = 256, 2 = 512(default), .. 7 = 16384
//
module hps_io #(parameter CONF_STR, CONF_STR_BRAM=1, PS2DIV=0, WIDE=0, VDNUM=1, BLKSZ=2, PS2WE=0)
module hps_io #(parameter CONF_STR, CONF_STR_BRAM=0, PS2DIV=0, WIDE=0, VDNUM=1, BLKSZ=2, PS2WE=0, STRLEN=$size(CONF_STR)>>3)
(
input clk_sys,
inout [48:0] HPS_BUS,
@@ -39,7 +39,7 @@ module hps_io #(parameter CONF_STR, CONF_STR_BRAM=1, PS2DIV=0, WIDE=0, VDNUM=1,
output reg [31:0] joystick_3,
output reg [31:0] joystick_4,
output reg [31:0] joystick_5,
// analog -127..+127, Y: [15:8], X: [7:0]
output reg [15:0] joystick_l_analog_0,
output reg [15:0] joystick_l_analog_1,
@@ -232,7 +232,6 @@ video_calc video_calc
/////////////////////////////////////////////////////////
localparam STRLEN = $size(CONF_STR)>>3;
localparam MAX_W = $clog2((64 > (STRLEN+2)) ? 64 : (STRLEN+2))-1;
wire [7:0] conf_byte;
@@ -281,7 +280,7 @@ always@(posedge clk_sys) begin : uio_block
stflg <= stflg + 1'd1;
status_req <= status_in;
end
old_upload_req <= ioctl_upload_req;
if(~old_upload_req & ioctl_upload_req) upload_req <= 1;
@@ -523,7 +522,7 @@ always@(posedge clk_sys) begin : uio_block
//menu mask
'h2E: if(byte_cnt == 1) io_dout <= status_menumask;
//sdram size set
'h31: if(byte_cnt == 1) sdram_sz <= io_din;
@@ -630,7 +629,7 @@ always@(posedge clk_sys) begin : fio_block
reg has_cmd;
reg [26:0] addr;
reg wr;
ioctl_rd <= 0;
ioctl_wr <= wr;
wr <= 0;
@@ -663,7 +662,7 @@ always@(posedge clk_sys) begin : fio_block
FIO_FILE_TX:
begin
cnt <= cnt + 1'd1;
case(cnt)
case(cnt)
0: if(io_din[7:0] == 8'hAA) begin
ioctl_addr <= 0;
ioctl_upload <= 1;
@@ -1032,8 +1031,15 @@ module confstr_rom #(parameter CONF_STR, STRLEN)
output reg [7:0] conf_byte
);
wire [7:0] rom[STRLEN];
initial for(int i = 0; i < STRLEN; i++) rom[i] = CONF_STR[((STRLEN-i)*8)-1 -:8];
reg [7:0] rom[STRLEN];
initial begin
if( CONF_STR=="" )
$readmemh("cfgstr.hex",rom);
else
for(int i = 0; i < STRLEN; i++) rom[i] = CONF_STR[((STRLEN-i)*8)-1 -:8];
end
always @ (posedge clk_sys) conf_byte <= rom[conf_addr];
endmodule

2
sys/i2c.v
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@@ -75,7 +75,7 @@ always @(posedge CLK) begin
END <= 0;
rd <= READ;
len <= I2C_WLEN;
if(READ) SD <= {2'b10, I2C_ADDR, 1'b1, 1'b1, 8'b11111111, 1'b0, 3'b011, 9'b111111111};
if(READ) SD <= {2'b10, I2C_ADDR, 1'b1, 1'b1, 8'b11111111, 1'b1, 3'b011, 9'b111111111};
else SD <= {2'b10, I2C_ADDR, 1'b0, 1'b1, I2C_WDATA1, 1'b1, I2C_WDATA2, 4'b1011};
SD_COUNTER <= 0;
end else begin

8
sys/sd_card.sv
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@@ -58,10 +58,10 @@ localparam DW = WIDE ? 15 : 7;
localparam SZ = OCTAL ? 8 : 1;
localparam SW = SZ-1;
wire [7:0] DATA_TOKEN_CMD25 = 8'hfc;
wire [7:0] STOP_TRAN = 8'hfd;
wire [7:0] DATA_TOKEN = 8'hfe;
wire [7:0] WRITE_DATA_RESPONSE = 8'h05;
localparam DATA_TOKEN_CMD25 = 8'hfc;
localparam STOP_TRAN = 8'hfd;
localparam DATA_TOKEN = 8'hfe;
localparam WRITE_DATA_RESPONSE = 8'he5;
// number of bytes to wait after a command before sending the reply
localparam NCR = 5+3; // 5 bytes are required (command length)

4
sys/sys.tcl
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@@ -65,8 +65,8 @@ set_location_assignment PIN_AD17 -to SDRAM_A[11]
set_location_assignment PIN_D12 -to SDRAM_A[12]
set_location_assignment PIN_Y17 -to SDRAM_BA[0]
set_location_assignment PIN_AB25 -to SDRAM_BA[1]
set_location_assignment PIN_E8 -to SDRAM_DQ[0]
set_location_assignment PIN_V12 -to SDRAM_DQ[1]
set_location_assignment PIN_V12 -to SDRAM_DQ[0]
set_location_assignment PIN_E8 -to SDRAM_DQ[1]
set_location_assignment PIN_D11 -to SDRAM_DQ[2]
set_location_assignment PIN_W12 -to SDRAM_DQ[3]
set_location_assignment PIN_AH13 -to SDRAM_DQ[4]

2
sys/sys_top.sdc
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@@ -74,4 +74,4 @@ set_false_path -from {ascal|o_hsstart* ascal|o_vsstart* ascal|o_hsend* ascal|o_v
set_false_path -from {ascal|o_hsize* ascal|o_vsize*}
set_false_path -from {mcp23009|flg_*}
set_false_path -to {sysmem|fpga_interfaces|clocks_resets*}
set_false_path -to {sysmem|fpga_interfaces|clocks_resets|f2h*}

76
sys/sys_top.v
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@@ -128,12 +128,13 @@ module sys_top
wire SD_CS, SD_CLK, SD_MOSI, SD_MISO, SD_CD;
`ifndef MISTER_DUAL_SDRAM
assign SD_CD = mcp_en ? mcp_sdcd : SDCD_SPDIF;
wire sd_cd = SDCD_SPDIF & ~SW[2]; // SW[2]=ON workaround for faulty boards without SD card detect pin.
assign SD_CD = mcp_en ? mcp_sdcd : sd_cd;
assign SD_MISO = SD_CD | (mcp_en ? SD_SPI_MISO : (VGA_EN | SDIO_DAT[0]));
assign SD_SPI_CS = mcp_en ? (mcp_sdcd ? 1'bZ : SD_CS) : (sog & ~cs1 & ~VGA_EN) ? 1'b1 : 1'bZ;
assign SD_SPI_CLK = (~mcp_en | mcp_sdcd) ? 1'bZ : SD_CLK;
assign SD_SPI_MOSI = (~mcp_en | mcp_sdcd) ? 1'bZ : SD_MOSI;
assign {SDIO_CLK,SDIO_CMD,SDIO_DAT} = av_dis ? 6'bZZZZZZ : (mcp_en | (SDCD_SPDIF & ~SW[2])) ? {vga_g,vga_r,vga_b} : {SD_CLK,SD_MOSI,SD_CS,3'bZZZ};
assign {SDIO_CLK,SDIO_CMD,SDIO_DAT} = av_dis ? 6'bZZZZZZ : (mcp_en | sd_cd) ? {vga_g,vga_r,vga_b} : {SD_CLK,SD_MOSI,SD_CS,3'bZZZ};
`else
assign SD_CD = mcp_sdcd;
assign SD_MISO = mcp_sdcd | SD_SPI_MISO;
@@ -183,10 +184,10 @@ wire io_dig = mcp_en ? mcp_mode : SW[3];
assign LED_USER = VGA_TX_CLK;
wire BTN_DIS = VGA_EN;
`else
wire BTN_RESET = SDRAM2_DQ[9];
wire BTN_OSD = SDRAM2_DQ[13];
wire BTN_USER = SDRAM2_DQ[11];
wire BTN_DIS = SDRAM2_DQ[15];
wire BTN_RESET = 1'b1;
wire BTN_OSD = 1'b1;
wire BTN_USER = 1'b1;
wire BTN_DIS = 1'b1;
`endif
reg BTN_EN = 0;
@@ -299,8 +300,9 @@ wire audio_96k = cfg[6];
wire csync_en = cfg[3];
wire io_osd_vga = io_ss1 & ~io_ss2;
`ifndef MISTER_DUAL_SDRAM
wire ypbpr_en = cfg[5];
wire sog = cfg[9];
wire forced_scandoubler = cfg[4];
wire ypbpr_en = cfg[5];
wire sog = cfg[9];
`ifdef MISTER_DEBUG_NOHDMI
wire vga_scaler = 0;
`else
@@ -331,6 +333,7 @@ reg [11:0] vs_line = 0;
reg scaler_out = 0;
reg vrr_mode = 0;
wire hdmi_blackout;
reg [31:0] aflt_rate = 7056000;
reg [39:0] acx = 4258969;
@@ -392,6 +395,7 @@ always@(posedge clk_sys) begin
`ifndef MISTER_DEBUG_NOHDMI
if(io_din[7:0] == 'h40) io_dout_sys <= fb_crc;
`endif
if(io_din[7:0] == 'h42) io_dout_sys <= {1'b1, frame_cnt};
end
else begin
cnt <= cnt + 1'd1;
@@ -498,18 +502,22 @@ always@(posedge clk_sys) begin
endcase
end
`endif
`ifndef MISTER_DISABLE_YC
if(cmd == 'h41) begin
case(cnt[3:0])
0: {pal_en,cvbs,yc_en} <= io_din[2:0];
1: PhaseInc[15:0] <= io_din;
2: PhaseInc[31:16] <= io_din;
3: PhaseInc[39:32] <= io_din[7:0];
4: ColorBurst_Range[15:0] <= io_din;
5: ColorBurst_Range[16] <= io_din[0];
`ifndef MISTER_DISABLE_YC
0: {pal_en,cvbs,yc_en} <= io_din[2:0];
4: ColorBurst_Range[15:0] <= io_din;
5: ColorBurst_Range[16] <= io_din[0];
`endif
// Subcarrier commands (independent of YC module)
1: PhaseInc[15:0] <= io_din;
2: PhaseInc[31:16] <= io_din;
3: PhaseInc[39:32] <= io_din[7:0];
`ifndef MISTER_DUAL_SDRAM
6: subcarrier <= io_din[0];
`endif
endcase
end
`endif
end
end
@@ -528,6 +536,15 @@ always@(posedge clk_sys) begin
if(~vs_d2 & vs_d1) vs_wait <= 0;
end
reg [7:0] frame_cnt;
always @(posedge clk_sys) begin
reg vs_r, vs_old;
vs_r <= vs_fix;
if(vs_r == vs_fix) vs_old <= vs_r;
if(~vs_old & vs_r) frame_cnt <= frame_cnt + 1'd1;
end
cyclonev_hps_interface_peripheral_uart uart
(
.ri(0),
@@ -677,6 +694,7 @@ wire vbuf_write;
wire [23:0] hdmi_data;
wire hdmi_vs, hdmi_hs, hdmi_de, hdmi_vbl, hdmi_brd;
wire freeze;
wire bob_deint;
`ifndef MISTER_DEBUG_NOHDMI
wire clk_hdmi = hdmi_clk_out;
@@ -708,9 +726,10 @@ wire freeze;
)
ascal
(
.reset_na (~reset_req),
.run (1),
.freeze (freeze),
.reset_na (~reset_req),
.run (1),
.freeze (freeze),
.bob_deint (bob_deint),
.i_clk (clk_ihdmi),
.i_ce (ce_hpix),
@@ -752,6 +771,7 @@ wire freeze;
.vmax (vmax),
.vrr (vrr_mode),
.vrrmax (HEIGHT + VBP + VS[11:0] + 12'd1),
.swblack (hdmi_blackout),
.mode ({~lowlat,LFB_EN ? LFB_FLT : |scaler_flt,2'b00}),
.poly_clk (clk_sys),
@@ -1394,7 +1414,6 @@ csync csync_vga(clk_vid, vga_hs_osd, vga_vs_osd, vga_cs_osd);
reg yc_en;
reg cvbs;
reg [16:0] ColorBurst_Range;
reg [39:0] PhaseInc;
wire [23:0] yc_o;
wire yc_hs, yc_vs, yc_cs, yc_de;
@@ -1418,7 +1437,20 @@ csync csync_vga(clk_vid, vga_hs_osd, vga_vs_osd, vga_cs_osd);
);
`endif
reg [39:0] PhaseInc;
`ifndef MISTER_DUAL_SDRAM
// Subcarrier generation for external encoders (independent of YC module)
reg subcarrier;
reg [39:0] sub_accum;
always @(posedge clk_vid) sub_accum <= sub_accum + PhaseInc;
// 1-bit output for positive/negative of wave, no LUT required. Output 1 if disabled for further logic
reg subcarrier_out;
always @(posedge clk_vid) subcarrier_out <= ~(subcarrier & csync_en & ~ypbpr_en & ~forced_scandoubler & ~vgas_en) | sub_accum[39];
wire VGA_DISABLE;
wire [23:0] vgas_o;
wire vgas_hs, vgas_vs, vgas_cs, vgas_de;
@@ -1471,7 +1503,7 @@ csync csync_vga(clk_vid, vga_hs_osd, vga_vs_osd, vga_cs_osd);
wire cs1 = vgas_en ? vgas_cs : vga_cs;
wire de1 = vgas_en ? vgas_de : vga_de;
assign VGA_VS = av_dis ? 1'bZ : ((vgas_en ? (~vgas_vs ^ VS[12]) : VGA_DISABLE ? 1'd1 : ~vga_vs) | csync_en);
assign VGA_VS = av_dis ? 1'bZ :(((vgas_en ? (~vgas_vs ^ VS[12]) : VGA_DISABLE ? 1'd1 : ~vga_vs) | csync_en) & subcarrier_out);
assign VGA_HS = av_dis ? 1'bZ : (vgas_en ? ((csync_en ? ~vgas_cs : ~vgas_hs) ^ HS[12]) : VGA_DISABLE ? 1'd1 : (csync_en ? ~vga_cs : ~vga_hs));
assign VGA_R = av_dis ? 6'bZZZZZZ : vgas_en ? vgas_o[23:18] : VGA_DISABLE ? 6'd0 : vga_o[23:18];
assign VGA_G = av_dis ? 6'bZZZZZZ : vgas_en ? vgas_o[15:10] : VGA_DISABLE ? 6'd0 : vga_o[15:10];
@@ -1734,6 +1766,8 @@ emu emu
.HDMI_WIDTH(direct_video ? 12'd0 : hdmi_width),
.HDMI_HEIGHT(direct_video ? 12'd0 : hdmi_height),
.HDMI_FREEZE(freeze),
.HDMI_BLACKOUT(hdmi_blackout),
.HDMI_BOB_DEINT(bob_deint),
.CLK_VIDEO(clk_vid),
.CE_PIXEL(ce_pix),

13
sys/video_cleaner.sv
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@@ -26,6 +26,10 @@ module video_cleaner
//optional de
input DE_in,
//optional interlace support
input interlace,
input f1,
// video output signals
output reg [7:0] VGA_R,
output reg [7:0] VGA_G,
@@ -56,14 +60,19 @@ always @(posedge clk_vid) begin
HBlank_out <= hbl;
VGA_HS <= hs;
if(~VGA_HS & hs) VGA_VS <= vs;
VGA_R <= R;
VGA_G <= G;
VGA_B <= B;
DE_out <= DE_in;
if(HBlank_out & ~hbl) VBlank_out <= vbl;
if (interlace & f1) begin
VGA_VS <= vs;
VBlank_out <= vbl;
end else begin
if(~VGA_HS & hs) VGA_VS <= vs;
if(HBlank_out & ~hbl) VBlank_out <= vbl;
end
end
end