mirror of
https://github.com/MiSTer-devel/Arcade-VBall_MiSTer.git
synced 2026-04-19 03:04:01 +00:00
master
U.S. Championship V'ball
This is the emulation of V'Ball from Technos Japan ported to MiSTerFPGA by Pierre Cornier (Pierco). The core uses SDRAM for background tiles & DDRAM for PCM data, loaded automagically from mra.
The default joystick mapping is:
| Name | Button |
|---|---|
| Coin A | R2 |
| Coin B | L2 |
| Jump | B |
| Action | A |
| Start | Start |
Games provided
- U.S. Championship V'ball (US)
- U.S. Championship V'ball (Bootleg of US set)
DIP-Switches
- Difficulty
- Single Player Game Time
- Start Buttons (4-player)
- Rotate Players 1 & 4
- Player Mode (2/4)
- Coin A (coins/credits)
- Coin B (coins/credits)
- Flip Screen
- Demo Sounds
I would like to thank Alan Steremberg, ElectronAsh, David Shadoff & Chockichoc for their help and support.
Languages
Verilog
63.3%
VHDL
23.2%
SystemVerilog
11.7%
Tcl
1.7%