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Fix initialization delay
There was an issue where the initialization sequence wasn't being calculated correctly. It could result in the SDRAM not being initialized properly.
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@@ -160,7 +160,7 @@ architecture arch of sdram is
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constant CLK_PERIOD : real := 1.0/CLK_FREQ*1000.0;
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-- the number of clock cycles to wait before initialising the device
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constant DESELECT_WAIT : natural := natural(ceil(T_DESL/CLK_PERIOD));
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constant INIT_WAIT : natural := natural(ceil(T_DESL/CLK_PERIOD));
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-- the number of clock cycles to wait while a LOAD MODE command is being
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-- executed
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@@ -234,13 +234,13 @@ begin
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when INIT =>
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if wait_counter = 0 then
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next_cmd <= CMD_DESELECT;
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elsif wait_counter = DESELECT_WAIT-1 then
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elsif wait_counter = INIT_WAIT-1 then
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next_cmd <= CMD_PRECHARGE;
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elsif wait_counter = PRECHARGE_WAIT-1 then
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elsif wait_counter = INIT_WAIT+PRECHARGE_WAIT-1 then
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next_cmd <= CMD_AUTO_REFRESH;
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elsif wait_counter = PRECHARGE_WAIT+REFRESH_WAIT-1 then
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elsif wait_counter = INIT_WAIT+PRECHARGE_WAIT+REFRESH_WAIT-1 then
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next_cmd <= CMD_AUTO_REFRESH;
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elsif wait_counter = PRECHARGE_WAIT+REFRESH_WAIT+REFRESH_WAIT-1 then
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elsif wait_counter = INIT_WAIT+PRECHARGE_WAIT+REFRESH_WAIT+REFRESH_WAIT-1 then
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next_state <= MODE;
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next_cmd <= CMD_LOAD_MODE;
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end if;
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