remove vestigial reg

This commit is contained in:
birdybro
2024-06-01 15:49:55 -06:00
parent 783890545d
commit 97b550bf3d

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@@ -310,8 +310,5 @@ assign CLK_VIDEO = clk_vga;
assign CE_PIXEL = 1;
assign VGA_DE = ~(HBlank | VBlank);
reg [26:0] act_cnt;
always @(posedge clk_sys) act_cnt <= act_cnt + 1'd1;
//assign LED_USER = act_cnt[26] ? act_cnt[25:18] > act_cnt[7:0] : act_cnt[25:18] <= act_cnt[7:0];
endmodule