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Merge pull request #2 from ika-musume/video-tilemap_simulation

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Tilemap logic complete
This commit is contained in:
Raki
2021-11-19 10:39:14 +09:00
committed by GitHub
parent cb76ffd1b9 6916aa085f
commit 98ff09eecc
45 changed files with 783 additions and 76 deletions
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17
BubSysROM_core_ModelSim/BubSysROM_video/asic/K005290.v → BubSysROM_core_ModelSim/BubSysROM_component/asic/K005290.v
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@@ -251,18 +251,15 @@ begin
end
end
always @(posedge i_EMU_MCLK)
always @(*)
begin
if(!i_EMU_CLK6MPCEN_n)
if(i_BFF == 1'b0)
begin
if(i_BFF == 1'b0)
begin
o_B_PIXEL <= B_PIXEL0; //shift normally
end
else
begin
o_B_PIXEL <= B_PIXEL7; //shift reversed direction(right)
end
o_B_PIXEL <= B_PIXEL0; //shift normally
end
else
begin
o_B_PIXEL <= B_PIXEL7; //shift reversed direction(right)
end
end

0
BubSysROM_core_ModelSim/BubSysROM_video/asic/K005291.v → BubSysROM_core_ModelSim/BubSysROM_component/asic/K005291.v
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10
BubSysROM_core_ModelSim/BubSysROM_video/asic/K005292.v → BubSysROM_core_ModelSim/BubSysROM_component/asic/K005292.v
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@@ -58,19 +58,20 @@ module K005292
output reg o_FRAMEPARITY = 1'b0,
output wire o_VSYNC_n,
output wire o_CSYNC_n
output wire o_CSYNC_n,
output wire [8:0] __REF_HCOUNTER,
output wire [8:0] __REF_VCOUNTER
);
reg __REF_DMA_n;
///////////////////////////////////////////////////////////
////// PIXEL COUNTER/BLANKING/SYNC/DMA
////
reg [8:0] horizontal_counter = 9'd511;
assign __REF_HCOUNTER = horizontal_counter;
assign {
o_ABS_256H,
o_ABS_128H,
@@ -95,6 +96,7 @@ assign {
assign o_HBLANK_n = horizontal_counter[8];
reg [8:0] vertical_counter = 9'd248;
assign __REF_VCOUNTER = vertical_counter;
assign {
o_ABS_128V,
o_ABS_64V,

2
BubSysROM_core_ModelSim/BubSysROM_video/asic/K005293.v → BubSysROM_core_ModelSim/BubSysROM_component/asic/K005293.v
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@@ -73,7 +73,7 @@ reg [11:0] A_PROPERTY_DELAY4;
wire [3:0] a_pr = A_PROPERTY_DELAY4[11:8];
wire [6:0] a_palette = A_PROPERTY_DELAY4[6:0];
assign o_A_FLIP = A_PROPERTY_DELAY4[7];
assign o_A_FLIP = A_PROPERTY_DELAY3[7];
always @(posedge i_EMU_MCLK)
begin

0
BubSysROM_core_ModelSim/BubSysROM_video/component/LOGIC373.v → BubSysROM_core_ModelSim/BubSysROM_component/logic/LOGIC373.v
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0
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4.v
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2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px0.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px0.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px0.txt", RAM16k4);
$readmemh("init_charram_px0.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px1.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px1.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px1.txt", RAM16k4);
$readmemh("init_charram_px1.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px2.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px2.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px2.txt", RAM16k4);
$readmemh("init_charram_px2.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px3.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px3.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px3.txt", RAM16k4);
$readmemh("init_charram_px3.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px4.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px4.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px4.txt", RAM16k4);
$readmemh("init_charram_px4.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px5.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px5.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px5.txt", RAM16k4);
$readmemh("init_charram_px5.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px6.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px6.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px6.txt", RAM16k4);
$readmemh("init_charram_px6.txt", RAM16k4);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/DRAM16k4_charram_px7.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/DRAM16k4_charram_px7.v
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@@ -69,7 +69,7 @@ end
initial
begin
$readmemh("charram_px7.txt", RAM16k4);
$readmemh("init_charram_px7.txt", RAM16k4);
end
endmodule

0
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM2k8.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM2k8.v
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38
BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM2k8_color_high.v Normal file
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@@ -0,0 +1,38 @@
/*
6116 SRAM
*/
module SRAM2k8_color_high
(
input wire i_MCLK,
input wire [10:0] i_ADDR,
input wire [7:0] i_DIN,
output reg [7:0] o_DOUT,
input wire i_WR_n,
input wire i_RD_n
);
reg [7:0] RAM2k8 [2047:0];
always @(posedge i_MCLK)
begin
if(i_WR_n == 1'b0)
begin
RAM2k8[i_ADDR] <= i_DIN;
end
end
always @(posedge i_MCLK) //read
begin
if(i_RD_n == 1'b0)
begin
o_DOUT <= RAM2k8[i_ADDR];
end
end
initial
begin
$readmemh("init_colorram_high.txt", RAM2k8);
end
endmodule

38
BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM2k8_color_low.v Normal file
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@@ -0,0 +1,38 @@
/*
6116 SRAM
*/
module SRAM2k8_color_low
(
input wire i_MCLK,
input wire [10:0] i_ADDR,
input wire [7:0] i_DIN,
output reg [7:0] o_DOUT,
input wire i_WR_n,
input wire i_RD_n
);
reg [7:0] RAM2k8 [2047:0];
always @(posedge i_MCLK)
begin
if(i_WR_n == 1'b0)
begin
RAM2k8[i_ADDR] <= i_DIN;
end
end
always @(posedge i_MCLK) //read
begin
if(i_RD_n == 1'b0)
begin
o_DOUT <= RAM2k8[i_ADDR];
end
end
initial
begin
$readmemh("init_colorram_low.txt", RAM2k8);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM2k8_obj.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM2k8_obj.v
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@@ -32,7 +32,7 @@ end
initial
begin
$readmemh("objram.txt", RAM2k8);
$readmemh("init_objram.txt", RAM2k8);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM2k8_scroll.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM2k8_scroll.v
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@@ -32,7 +32,7 @@ end
initial
begin
$readmemh("scrollram.txt", RAM2k8);
$readmemh("init_scrollram.txt", RAM2k8);
end
endmodule

0
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM4k8.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM4k8.v
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2
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM4k8_vram1_high.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM4k8_vram1_high.v
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@@ -32,7 +32,7 @@ end
initial
begin
$readmemh("vram1_high.txt", RAM4k8);
$readmemh("init_vram1_high.txt", RAM4k8);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM4k8_vram1_low.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM4k8_vram1_low.v
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@@ -32,7 +32,7 @@ end
initial
begin
$readmemh("vram1_low.txt", RAM4k8);
$readmemh("init_vram1_low.txt", RAM4k8);
end
endmodule

2
BubSysROM_core_ModelSim/BubSysROM_video/component/SRAM4k8_vram2.v → BubSysROM_core_ModelSim/BubSysROM_component/ram/SRAM4k8_vram2.v
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@@ -32,7 +32,7 @@ end
initial
begin
$readmemh("vram2.txt", RAM4k8);
$readmemh("init_vram2.txt", RAM4k8);
end
endmodule

121
BubSysROM_core_ModelSim/BubSysROM_cpu/BubSysROM_cpu.v Normal file
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@@ -0,0 +1,121 @@
module BubSysROM_cpu
(
//
// FLAT CABLE
//
input wire i_EMU_MCLK,
input wire i_EMU_CLK18MNCEN_n,
input wire i_EMU_CLK9MPCEN_n, //REF_CLK9M
input wire i_EMU_CLK9MNCEN_n,
input wire i_EMU_CLK6MPCEN_n, //REF_CLK6M
input wire i_EMU_CLK6MNCEN_n,
output wire i_MRST_n,
output wire [14:0] o_CPU_ADDR,
input wire [15:0] i_CPU_DIN,
output wire [15:0] o_CPU_DOUT,
output wire o_CPU_RW,
output wire o_CPU_UDS_n,
output wire o_CPU_LDS_n,
output wire o_VZCS_n,
output wire o_VCS1_n,
output wire o_VCS2_n,
output wire o_CHACS_n,
output wire o_OBJRAM_n,
output wire o_HFLIP,
output wire o_VFLIP,
input wire i_VBLANK_n,
input wire i_VSYNC_n,
input wire i_SYNC_n,
input wire i_BLK,
input wire [10:0] i_CD,
//
// CARD EDGE IO
//
output wire [4:0] o_EMU_VIDEO_R,
output wire [4:0] o_EMU_VIDEO_G,
output wire [4:0] o_EMU_VIDEO_B
);
//for simulation
wire colorram_n;
assign colorram_n = 1'b1;
assign o_CPU_ADDR = 16'd0;
assign o_CPU_DOUT = 16'hFFFF;
assign o_CPU_RW = 1'b1;
assign o_CPU_UDS_n = 1'b1;
assign o_CPU_LDS_n = 1'b1;
assign o_VZCS_n = 1'b1;
assign o_VCS1_n = 1'b1;
assign o_VCS2_n = 1'b1;
assign o_CHACS_n = 1'b1;
assign o_OBJRAM_n = 1'b1;
assign o_HFLIP = 1'b1;
assign o_VFLIP = 1'b1;
//make colorram address
wire [10:0] colorram_addr;
assign colorram_addr = (colorram_n == 1'b0) ? o_CPU_ADDR : i_CD; //cpu addr
//make colorram wr signal
wire colorram_wr = |{colorram_n, o_CPU_RW, o_CPU_LDS_n};
//declare COLORRAM
wire [15:0] colorram_dout;
SRAM2k8_color_high COLORRAM_HIGH
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (colorram_addr ),
.i_DIN (o_CPU_DOUT[15:8] ),
.o_DOUT (colorram_dout[15:8] ),
.i_WR_n (colorram_wr ),
.i_RD_n (1'b0 )
);
SRAM2k8_color_low COLORRAM_LOW
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (colorram_addr ),
.i_DIN (o_CPU_DOUT[7:0] ),
.o_DOUT (colorram_dout[7:0] ),
.i_WR_n (colorram_wr ),
.i_RD_n (1'b0 )
);
//rgb driver latch
reg [14:0] rgblatch;
assign {o_EMU_VIDEO_B, o_EMU_VIDEO_G, o_EMU_VIDEO_R} = rgblatch & {15{i_BLK}}; //LS09 drivers
always @(posedge i_EMU_MCLK)
begin
if(!i_EMU_CLK6MPCEN_n)
begin
rgblatch <= colorram_dout[14:0];
end
end
endmodule

69
BubSysROM_core_ModelSim/BubSysROM_screensim.v Normal file
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@@ -0,0 +1,69 @@
module BubSysROM_screensim
(
input wire i_EMU_MCLK,
input wire i_EMU_CLK6MPCEN_n,
input wire [8:0] i_HCOUNTER,
input wire [8:0] i_VCOUNTER,
input wire [15:0] i_VIDEODATA
);
/*
VCNTR
272 - HCNTR 278~511 + 128~149; 150 end of line
~
495 - HCNTR 278~511 + 128~149; 150 end of frame
*/
reg [7:0] RESNET_CONSTANT[31:0];
reg [7:0] BITMAP_HEADER[63:0];
integer BITMAP_LINE_ADDRESS = 32'h29D36;
wire [4:0] B = i_VIDEODATA[14:10];
wire [4:0] G = i_VIDEODATA[9:5];
wire [4:0] R = i_VIDEODATA[4:0];
integer fd;
integer i;
reg [15:0] frame = 16'd0;
initial begin
$readmemh("debug_resnet_level.txt", RESNET_CONSTANT);
$readmemh("debug_bitmap_header.txt", BITMAP_HEADER);
end
always @(posedge i_EMU_MCLK) begin
if(!i_EMU_CLK6MPCEN_n) begin
if(i_VCOUNTER > 9'd271 && i_VCOUNTER < 9'd496) begin
if (i_VCOUNTER == 9'd272 && i_HCOUNTER == 9'd276) begin
BITMAP_LINE_ADDRESS = 20'h29D36; //reset line
fd = $fopen($sformatf("gx400_frame%0d.bmp", frame), "wb"); //generate new file
for(i = 0; i < 54; i = i + 1) begin //write bitmap header
$fwrite(fd, "%c", BITMAP_HEADER[i]);
end
$display("Start of frame %d", frame); //debug message
frame = frame + 16'd1;
end
else if(i_HCOUNTER == 9'd277) begin
$fseek(fd, BITMAP_LINE_ADDRESS, 0); //set current line address
end
else if(i_HCOUNTER > 9'd277 || i_HCOUNTER < 9'd150) begin
$fwrite(fd, "%c%c%c", RESNET_CONSTANT[B], RESNET_CONSTANT[G], RESNET_CONSTANT[R]); //B G R
end
else if(i_HCOUNTER == 9'd150) begin
BITMAP_LINE_ADDRESS = BITMAP_LINE_ADDRESS - 32'h300; //decrease line
end
else if(i_VCOUNTER == 9'd495 && i_HCOUNTER == 9'd151) begin
$fclose(fd); //close this frame
end
else begin
end
end
end
end
endmodule

127
BubSysROM_core_ModelSim/BubSysROM_top.v Normal file
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@@ -0,0 +1,127 @@
module BubSysROM_top
(
input wire i_EMU_MCLK
);
wire [15:0] debug_video;
assign debug_video[15] = 1'b0;
wire [8:0] hcounter;
wire [8:0] vcounter;
//
// FLAT CABLE SIGNAL
//
wire CLK9MPCEN;
wire CLK9MNCEN;
wire CLK6MPCEN;
wire CLK6MNCEN;
wire CPU_ADDR;
wire CPU_DIN;
wire CPU_DOUT;
wire CPU_RW;
wire CPU_UDS_n;
wire CPU_LDS_n;
wire VZCS_n;
wire VBLANK;
wire VSYNC;
wire CSYNC;
wire BLK;
wire [10:0] CD;
BubSysROM_cpu cpu_main
(
.i_EMU_MCLK (i_EMU_MCLK ),
.i_EMU_CLK18MNCEN_n (1'b0 ),
.i_EMU_CLK9MPCEN_n (CLK9MPCEN ),
.i_EMU_CLK9MNCEN_n (CLK9MNCEN ),
.i_EMU_CLK6MPCEN_n (CLK6MPCEN ),
.i_EMU_CLK6MNCEN_n (CLK6MNCEN ),
.o_CPU_ADDR ( ),
.i_CPU_DIN ( ),
.o_CPU_DOUT ( ),
.o_CPU_RW ( ),
.o_CPU_UDS_n ( ),
.o_CPU_LDS_n ( ),
.o_VZCS_n ( ),
.o_VCS1_n ( ),
.o_VCS2_n ( ),
.o_CHACS_n ( ),
.o_OBJRAM_n ( ),
.o_HFLIP ( ),
.o_VFLIP ( ),
.i_VBLANK_n (VBLANK ),
.i_VSYNC_n (VSYNC ),
.i_SYNC_n (SYNC ),
.i_BLK (BLK ),
.i_CD (CD ),
.o_EMU_VIDEO_R (debug_video[4:0] ),
.o_EMU_VIDEO_G (debug_video[9:5] ),
.o_EMU_VIDEO_B (debug_video[14:10] )
);
BubSysROM_video video_main
(
.i_EMU_MCLK (i_EMU_MCLK ),
.i_EMU_CLK18MNCEN_n (1'b0 ),
.o_EMU_CLK9MPCEN_n (CLK9MPCEN ),
.o_EMU_CLK9MNCEN_n (CLK9MNCEN ),
.o_EMU_CLK6MPCEN_n (CLK6MPCEN ),
.o_EMU_CLK6MNCEN_n (CLK6MNCEN ),
.i_MRST_n (1'b1 ),
.i_CPU_ADDR (15'd0 ),
.o_CPU_DIN ( ),
.i_CPU_DOUT (16'hFFFF ),
.i_CPU_RW (1'b1 ),
.i_CPU_UDS_n (1'b1 ),
.i_CPU_LDS_n (1'b1 ),
.i_VZCS_n (1'b1 ),
.i_VCS1_n (1'b1 ),
.i_VCS2_n (1'b1 ),
.i_CHACS_n (1'b1 ),
.i_OBJRAM_n (1'b1 ),
.i_HFLIP (1'b0 ),
.i_VFLIP (1'b0 ),
.o_VBLANK_n (VBLANK ),
.o_VSYNC_n (VSYNC ),
.o_SYNC_n (SYNC ),
.o_BLK (BLK ),
.o_CD (CD ),
.__REF_HCOUNTER (hcounter ),
.__REF_VCOUNTER (vcounter )
);
BubSysROM_screensim main
(
.i_EMU_MCLK (i_EMU_MCLK ),
.i_EMU_CLK6MPCEN_n (CLK6MPCEN ),
.i_HCOUNTER (hcounter ),
.i_VCOUNTER (vcounter ),
.i_VIDEODATA (debug_video )
);
endmodule

14
BubSysROM_core_ModelSim/BubSysROM_top_tb.v Normal file
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@@ -0,0 +1,14 @@
`timescale 10ns/10ns
module BubSysROM_top_tb;
reg MCLK = 1'b0; //18.432MHz
reg CLK18MCEN_n = 1'b0;
BubSysROM_top main
(
.i_EMU_MCLK (MCLK )
);
always #1 MCLK = ~MCLK;
endmodule

64
BubSysROM_core_ModelSim/BubSysROM_video/BubSysROM_video.v
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@@ -8,9 +8,11 @@ module BubSysROM_video
output wire o_EMU_CLK6MPCEN_n, //REF_CLK6M
output wire o_EMU_CLK6MNCEN_n,
input wire i_MRST_n,
input wire [14:0] i_CPU_ADDR,
input wire [15:0] i_CPU_DIN,
output reg [15:0] o_CPU_DOUT,
output reg [15:0] o_CPU_DIN,
input wire [15:0] i_CPU_DOUT,
input wire i_CPU_RW,
input wire i_CPU_UDS_n,
input wire i_CPU_LDS_n,
@@ -29,9 +31,13 @@ module BubSysROM_video
output wire o_VSYNC_n,
output reg o_SYNC_n,
output wire [10:0] o_CD
);
output wire o_BLK,
output wire [10:0] o_CD,
output wire [8:0] __REF_HCOUNTER, //for pixel capture purpose
output wire [8:0] __REF_VCOUNTER
);
///////////////////////////////////////////////////////////
////// CLOCK DIVIDER
@@ -170,7 +176,7 @@ K005292 K005292_main
.i_EMU_MCLK (i_EMU_MCLK ),
.i_EMU_CLK6MPCEN_n (o_EMU_CLK6MPCEN_n ),
.i_MRST_n (1'b1 ),
.i_MRST_n (i_MRST_n ),
.i_HFLIP (i_HFLIP ),
.i_VFLIP (i_VFLIP ),
@@ -221,7 +227,10 @@ K005292 K005292_main
.o_FRAMEPARITY ( ), //256V
.o_VSYNC_n (o_VSYNC_n ),
.o_CSYNC_n (CSYNC_n )
.o_CSYNC_n (CSYNC_n ),
.__REF_HCOUNTER (__REF_HCOUNTER ),
.__REF_VCOUNTER (__REF_VCOUNTER )
);
@@ -316,7 +325,6 @@ end
//timing singals
wire OBJRW; //switches mux between active display+buffer clear/005295 write
wire OBJCLR; //fix mux output as 0 when clearing the buffer by writing 0s
wire BLK; //LS09 driver disable
//19H LS74A
reg DFF_19H_A;
@@ -379,7 +387,7 @@ end
assign OBJRW = DFF_19H_B;
assign OBJCLR = ~DFF_19H_B;
assign BLK = DFF_17A_A;
assign o_BLK = DFF_17A_A;
@@ -473,7 +481,7 @@ SRAM2k8_scroll SCROLLRAM_LOW
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (scrollram_addr ),
.i_DIN (i_CPU_DIN[7:0] ),
.i_DIN (i_CPU_DOUT[7:0] ),
.o_DOUT (scrollram_dout ),
.i_WR_n (scrollram_wr ),
.i_RD_n (1'b0 )
@@ -581,7 +589,7 @@ SRAM4k8_vram1_high VRAM1_HIGH
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (vram_addr ),
.i_DIN (i_CPU_DIN[15:8] ),
.i_DIN (i_CPU_DOUT[15:8] ),
.o_DOUT (vram1_dout[15:8] ),
.i_WR_n (vram1h_wr ),
.i_RD_n (VRTIME )
@@ -591,7 +599,7 @@ SRAM4k8_vram1_low VRAM1_LOW
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (vram_addr ),
.i_DIN (i_CPU_DIN[7:0] ),
.i_DIN (i_CPU_DOUT[7:0] ),
.o_DOUT (vram1_dout[7:0] ),
.i_WR_n (vram1l_wr ),
.i_RD_n (VRTIME )
@@ -603,7 +611,7 @@ SRAM4k8_vram2 VRAM2_LOW
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (vram_addr ),
.i_DIN (i_CPU_DIN[7:0] ),
.i_DIN (i_CPU_DOUT[7:0] ),
.o_DOUT (vram2_dout ),
.i_WR_n (vram2l_wr ),
.i_RD_n (VRTIME )
@@ -696,7 +704,7 @@ SRAM2k8_obj OBJRAM_LOW
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (objram_addr ),
.i_DIN (i_CPU_DIN[7:0] ),
.i_DIN (i_CPU_DOUT[7:0] ),
.o_DOUT (objram_dout ),
.i_WR_n (objram_wr ),
.i_RD_n (1'b0 )
@@ -872,7 +880,7 @@ DRAM16k4_charram_px0 CHARRAM_PX0 //6B
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[15:12] ),
.i_DIN (i_CPU_DOUT[15:12] ),
.o_DOUT (charram1_dout[15:12] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -883,7 +891,7 @@ DRAM16k4_charram_px1 CHARRAM_PX1 //6A
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[11:8] ),
.i_DIN (i_CPU_DOUT[11:8] ),
.o_DOUT (charram1_dout[11:8] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -894,7 +902,7 @@ DRAM16k4_charram_px2 CHARRAM_PX2 //2B
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[7:4] ),
.i_DIN (i_CPU_DOUT[7:4] ),
.o_DOUT (charram1_dout[7:4] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -905,7 +913,7 @@ DRAM16k4_charram_px3 CHARRAM_PX3 //2A
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[3:0] ),
.i_DIN (i_CPU_DOUT[3:0] ),
.o_DOUT (charram1_dout[3:0] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -916,7 +924,7 @@ DRAM16k4_charram_px4 CHARRAM_PX4 //7B
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[15:12] ),
.i_DIN (i_CPU_DOUT[15:12] ),
.o_DOUT (charram2_dout[15:12] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -927,7 +935,7 @@ DRAM16k4_charram_px5 CHARRAM_PX5 //7A
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[11:8] ),
.i_DIN (i_CPU_DOUT[11:8] ),
.o_DOUT (charram2_dout[11:8] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -938,7 +946,7 @@ DRAM16k4_charram_px6 CHARRAM_PX6 //4B
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[7:4] ),
.i_DIN (i_CPU_DOUT[7:4] ),
.o_DOUT (charram2_dout[7:4] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -949,7 +957,7 @@ DRAM16k4_charram_px7 CHARRAM_PX7 //4A
(
.i_MCLK (i_EMU_MCLK ),
.i_ADDR (charram_addr ),
.i_DIN (i_CPU_DIN[3:0] ),
.i_DIN (i_CPU_DOUT[3:0] ),
.o_DOUT (charram2_dout[3:0] ),
.i_RAS_n (charram_ras_n ),
.i_CAS_n (charram_cas_n ),
@@ -1078,13 +1086,13 @@ K005293 K005293_main
always @(*)
begin
case({i_VZCS_n, i_VCS1_n, i_VCS2_n, charcs1_n, charcs2_n, i_OBJRAM_n})
6'b011111: o_CPU_DOUT <= {8'hFF, scrollram_readlatch_q};
6'b101111: o_CPU_DOUT <= vram1_dout;
6'b110111: o_CPU_DOUT <= {8'hFF, vram2_dout};
6'b111011: o_CPU_DOUT <= charram1_dout;
6'b111101: o_CPU_DOUT <= charram2_dout;
6'b111110: o_CPU_DOUT <= {8'hFF, objram_readlatch_q};
default: o_CPU_DOUT <= 16'hFFFF; //pull up
6'b011111: o_CPU_DIN <= {8'hFF, scrollram_readlatch_q};
6'b101111: o_CPU_DIN <= vram1_dout;
6'b110111: o_CPU_DIN <= {8'hFF, vram2_dout};
6'b111011: o_CPU_DIN <= charram1_dout;
6'b111101: o_CPU_DIN <= charram2_dout;
6'b111110: o_CPU_DIN <= {8'hFF, objram_readlatch_q};
default: o_CPU_DIN <= 16'hFFFF; //pull up
endcase
end

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px0.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px1.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 1 1 1 1 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px2.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px3.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px4.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 1 0 1 1 0 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px5.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 1 0 1 1 0 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px6.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 1 1 1 0

2
BubSysROM_core_ModelSim/BubSysROM_video/charram_px7.txt
View File

@@ -1,2 +0,0 @@
@0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 0

1
BubSysROM_core_ModelSim/BubSysROM_video/scrollram.txt
View File

File diff suppressed because one or more lines are too long

1
BubSysROM_core_ModelSim/BubSysROM_video/vram1_high.txt
View File

File diff suppressed because one or more lines are too long

1
BubSysROM_core_ModelSim/BubSysROM_video/vram1_low.txt
View File

File diff suppressed because one or more lines are too long

1
BubSysROM_core_ModelSim/BubSysROM_video/vram2.txt
View File

File diff suppressed because one or more lines are too long

1
BubSysROM_core_ModelSim/debug_bitmap_header.txt Normal file
View File

@@ -0,0 +1 @@
42 4D 36 A0 02 00 00 00 00 00 36 00 00 00 28 00 00 00 00 01 00 00 E0 00 00 00 01 00 18 00 00 00 00 00 00 A0 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF

1
BubSysROM_core_ModelSim/debug_resnet_level.txt Normal file
View File

@@ -0,0 +1 @@
00 01 02 04 05 06 08 09 0B 0D 0F 12 14 16 19 1C 21 24 29 2E 33 39 40 49 50 5B 68 78 8E A8 CC FF

105
BubSysROM_core_ModelSim/wave.do Normal file
View File

@@ -0,0 +1,105 @@
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /BubSysROM_video_tb/main/i_EMU_MCLK
add wave -noupdate /BubSysROM_video_tb/main/__REF_CLK9M
add wave -noupdate /BubSysROM_video_tb/main/__REF_CLK6M
add wave -noupdate -radix unsigned {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[2]}
add wave -noupdate -radix unsigned {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[1]}
add wave -noupdate /BubSysROM_video_tb/main/K005290_main/ABS_2H_dl
add wave -noupdate -radix unsigned {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[0]}
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_VCLK
add wave -noupdate -radix unsigned /BubSysROM_video_tb/main/K005292_main/vertical_counter
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_HBLANK_n
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_VBLANK_n
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_VBLANKH_n
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_FRAMEPARITY
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_VSYNC_n
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/o_CSYNC_n
add wave -noupdate /BubSysROM_video_tb/main/TIME1
add wave -noupdate /BubSysROM_video_tb/main/TIME2
add wave -noupdate /BubSysROM_video_tb/main/CHAMPX
add wave -noupdate /BubSysROM_video_tb/main/VRTIME
add wave -noupdate /BubSysROM_video_tb/main/OBJCLRWE
add wave -noupdate /BubSysROM_video_tb/main/OBJRW
add wave -noupdate /BubSysROM_video_tb/main/OBJCLR
add wave -noupdate /BubSysROM_video_tb/main/BLK
add wave -noupdate -radix unsigned -childformat {{{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[8]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[7]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[6]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[5]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[4]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[3]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[2]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[1]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[0]} -radix unsigned}} -subitemconfig {{/BubSysROM_video_tb/main/K005292_main/horizontal_counter[8]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[7]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[6]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[5]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[4]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[3]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[2]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[1]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/horizontal_counter[0]} {-height 15 -radix unsigned}} /BubSysROM_video_tb/main/K005292_main/horizontal_counter
add wave -noupdate -radix hexadecimal -childformat {{{/BubSysROM_video_tb/main/scrollram_addr[10]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[9]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[8]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[7]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[6]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[5]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[4]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[3]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[2]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[1]} -radix hexadecimal} {{/BubSysROM_video_tb/main/scrollram_addr[0]} -radix hexadecimal}} -subitemconfig {{/BubSysROM_video_tb/main/scrollram_addr[10]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[9]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[8]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[7]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[6]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[5]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[4]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[3]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[2]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[1]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/scrollram_addr[0]} {-height 15 -radix hexadecimal}} /BubSysROM_video_tb/main/scrollram_addr
add wave -noupdate -radix unsigned /BubSysROM_video_tb/main/scrollram_dout
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005291_main/TMA_HSCROLL_VALUE
add wave -noupdate /BubSysROM_video_tb/main/K005291_main/o_SHIFTA1
add wave -noupdate /BubSysROM_video_tb/main/K005291_main/o_SHIFTA2
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005291_main/TMB_HSCROLL_VALUE
add wave -noupdate /BubSysROM_video_tb/main/K005291_main/o_SHIFTB
add wave -noupdate -radix unsigned /BubSysROM_video_tb/main/K005291_main/TMAB_VSCROLL_VALUE
add wave -noupdate -radix hexadecimal -childformat {{{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[11]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[10]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[9]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[8]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[7]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[6]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[5]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[4]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[3]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[2]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[1]} -radix hexadecimal} {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[0]} -radix hexadecimal}} -subitemconfig {{/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[11]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[10]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[9]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[8]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[7]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[6]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[5]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[4]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[3]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[2]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[1]} {-height 15 -radix hexadecimal} {/BubSysROM_video_tb/main/K005291_main/o_VRAMADDR[0]} {-height 15 -radix hexadecimal}} /BubSysROM_video_tb/main/K005291_main/o_VRAMADDR
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/tile_code
add wave -noupdate /BubSysROM_video_tb/main/VVFF
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005291_main/o_TILELINEADDR
add wave -noupdate -radix decimal /BubSysROM_video_tb/main/__REF_VCA_ORIGINAL
add wave -noupdate /BubSysROM_video_tb/main/CHAMPX2
add wave -noupdate /BubSysROM_video_tb/main/VCA
add wave -noupdate /BubSysROM_video_tb/main/charram_ras_n
add wave -noupdate /BubSysROM_video_tb/main/charram_cas_n
add wave -noupdate -radix decimal /BubSysROM_video_tb/main/CHARRAM_PX0/__ADDR
add wave -noupdate /BubSysROM_video_tb/main/charram1_rd
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/charram1_dout
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/charram2_dout
add wave -noupdate /BubSysROM_video_tb/main/__REF_CLK6M
add wave -noupdate /BubSysROM_video_tb/main/K005290_main/pixel7_n
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/A_LINELATCH
add wave -noupdate /BubSysROM_video_tb/main/K005290_main/i_A_MODE
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/A_PIXEL_DELAY1
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/A_PIXEL_DELAY2
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/A_PIXEL_DELAY3
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/o_A_PIXEL
add wave -noupdate /BubSysROM_video_tb/main/K005290_main/pixel3_n
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/B_LINELATCH
add wave -noupdate /BubSysROM_video_tb/main/K005290_main/i_B_MODE
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005290_main/o_B_PIXEL
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/PR
add wave -noupdate /BubSysROM_video_tb/main/VHFF
add wave -noupdate -radix unsigned /BubSysROM_video_tb/main/VC
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/A_PROPERTY_DELAY1
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/A_PROPERTY_DELAY2
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/A_PROPERTY_DELAY3
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/A_PROPERTY_DELAY4
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/B_PROPERTY_DELAY1
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/B_PROPERTY_DELAY2
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/B_PROPERTY_DELAY3
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/a_pr
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/b_pr
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/priority_mode
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/transparency
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/layer
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/i_A_PIXEL
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/i_B_PIXEL
add wave -noupdate /BubSysROM_video_tb/main/K005293_main/a_palette
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/b_palette
add wave -noupdate -radix hexadecimal /BubSysROM_video_tb/main/K005293_main/o_CD
add wave -noupdate /BubSysROM_video_tb/main/ABS_8H
add wave -noupdate /BubSysROM_video_tb/main/ABS_4H
add wave -noupdate /BubSysROM_video_tb/main/ABS_2H
add wave -noupdate /BubSysROM_video_tb/main/ABS_1H
add wave -noupdate -radix unsigned /BubSysROM_video_tb/main/K005292_main/horizontal_counter
add wave -noupdate -radix unsigned -childformat {{{/BubSysROM_video_tb/main/K005292_main/vertical_counter[8]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[7]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[6]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[5]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[4]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[3]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[2]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[1]} -radix unsigned} {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[0]} -radix unsigned}} -expand -subitemconfig {{/BubSysROM_video_tb/main/K005292_main/vertical_counter[8]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[7]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[6]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[5]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[4]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[3]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[2]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[1]} {-height 15 -radix unsigned} {/BubSysROM_video_tb/main/K005292_main/vertical_counter[0]} {-height 15 -radix unsigned}} /BubSysROM_video_tb/main/K005292_main/vertical_counter
add wave -noupdate /BubSysROM_video_tb/main/dma
add wave -noupdate /BubSysROM_video_tb/main/K005292_main/__REF_DMA_n
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {5273950 ns} 0}
quietly wave cursor active 1
configure wave -namecolwidth 179
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {1025200 ns} {6261840 ns}

206
GX400_datasplitter/GX400_datasplitter.cpp Normal file
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#include <iostream>
#include <fstream>
int main()
{
std::ifstream MemDump("gx400.bin", std::ios::in | std::ios::binary);
char inBuffer;
unsigned char outBuffer[4] = "0 "; // 0(space)
////////////////////////////
//////// charram
////
char init_charram_filename[21] = "init_charram_px0.txt";
std::ofstream charram_px[8];
for (int i = 0; i < 8; i++) {
charram_px[i].open(init_charram_filename, std::ios::out);
init_charram_filename[15]++;
}
MemDump.seekg(0x30000, std::ios::beg);
for (int i = 0; i < 0x4000; i++) { //0x4000 times
for (int j = 0; j < 4; j++) {
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
charram_px[j * 2].write((char*)outBuffer, 2);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] & 0x0F;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
charram_px[(j * 2) + 1].write((char*)outBuffer, 2);
}
}
for (int i = 0; i < 8; i++) {
charram_px[i].close();
}
////////////////////////////
//////// scrollram
////
std::ofstream scrollram("init_scrollram.txt", std::ios::out);
MemDump.seekg(0x50000, std::ios::beg);
for (int i = 0; i < 0x800; i++) { //0x800 times
MemDump.read((char*)&inBuffer, 1);
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
scrollram.write((char*)outBuffer, 3);
}
scrollram.close();
////////////////////////////
//////// vram1
////
std::ofstream vram1_high("init_vram1_high.txt", std::ios::out);
std::ofstream vram1_low("init_vram1_low.txt", std::ios::out);
MemDump.seekg(0x52000, std::ios::beg);
for (int i = 0; i < 0x1000; i++) { //0x1000 times
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
vram1_high.write((char*)outBuffer, 3);
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
vram1_low.write((char*)outBuffer, 3);
}
vram1_high.close();
vram1_low.close();
////////////////////////////
//////// vram2
////
std::ofstream vram2("init_vram2.txt", std::ios::out);
MemDump.seekg(0x54000, std::ios::beg);
for (int i = 0; i < 0x1000; i++) { //0x1000 times
MemDump.read((char*)&inBuffer, 1);
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
vram2.write((char*)outBuffer, 3);
}
vram2.close();
////////////////////////////
//////// objram
////
std::ofstream objram("init_objram.txt", std::ios::out);
MemDump.seekg(0x56000, std::ios::beg);
for (int i = 0; i < 0x800; i++) { //0x800 times
MemDump.read((char*)&inBuffer, 1);
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
objram.write((char*)outBuffer, 3);
}
objram.close();
////////////////////////////
//////// colorram
////
std::ofstream colorram_high("init_colorram_high.txt", std::ios::out);
std::ofstream colorram_low("init_colorram_low.txt", std::ios::out);
MemDump.seekg(0x5A000, std::ios::beg);
for (int i = 0; i < 0x800; i++) { //0x800 times
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
colorram_high.write((char*)outBuffer, 3);
MemDump.read((char*)&inBuffer, 1);
outBuffer[0] = inBuffer;
outBuffer[0] = outBuffer[0] >> 0x4;
(outBuffer[0] > 0x9) ? (outBuffer[0] = outBuffer[0] + 0x37) : (outBuffer[0] = outBuffer[0] + 0x30);
outBuffer[1] = inBuffer;
outBuffer[1] = outBuffer[1] & 0x0F;
(outBuffer[1] > 0x9) ? (outBuffer[1] = outBuffer[1] + 0x37) : (outBuffer[1] = outBuffer[1] + 0x30);
colorram_low.write((char*)outBuffer, 3);
}
colorram_high.close();
colorram_low.close();
return 0;
}

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GX400_datasplitter/GX400_datasplitter.exe Normal file
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