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Fix K5295 parameter

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__SAVE_FRAMEBUFFER_CAPACITY, I couldn't halve the framebuffer when I initialized the parity register with 0.
This commit is contained in:
Raki
2021-12-10 10:30:45 +09:00
parent dfbe82926c
commit 81082b80f0
1 changed files with 12 additions and 11 deletions
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23
BubSysROM_core_ModelSim/BubSysROM_component/asic/K005295.v
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@@ -1633,8 +1633,6 @@ end
///////////////////////////////////////////////////////////
////// BUFFER MUX
////
@@ -1656,7 +1654,7 @@ begin
if(i_VBLANK_n == 1'b0 && prev_vblank == 1'b1) //async reset by VBLANK
begin
buffer_frame_parity <= ~buffer_frame_parity | __SAVE_FRAMEBUFFER_CAPACITY;
buffer_frame_parity <= ~buffer_frame_parity;
end
end
end
@@ -1671,12 +1669,16 @@ always @(*)
begin
case(i_OBJWR)
1'b1: begin //sprite drawing period
EVENBUFFER_ADDR <= {buffer_frame_parity, buffer_ypos_counter, evenbuffer_xpos_counter[6:0]};
ODDBUFFER_ADDR <= {buffer_frame_parity, buffer_ypos_counter, oddbuffer_xpos_counter[6:0]};
EVENBUFFER_ADDR <= {buffer_frame_parity | __SAVE_FRAMEBUFFER_CAPACITY,
buffer_ypos_counter, evenbuffer_xpos_counter[6:0]};
ODDBUFFER_ADDR <= {buffer_frame_parity | __SAVE_FRAMEBUFFER_CAPACITY,
buffer_ypos_counter, oddbuffer_xpos_counter[6:0]};
end
1'b0: begin //active video period
EVENBUFFER_ADDR <= {buffer_frame_parity, buffer_y_screencounter ^ {8{i_FLIP}}, buffer_x_screencounter ^ {7{i_FLIP}}};
ODDBUFFER_ADDR <= {buffer_frame_parity, buffer_y_screencounter ^ {8{i_FLIP}}, buffer_x_screencounter ^ {7{i_FLIP}}};
EVENBUFFER_ADDR <= {buffer_frame_parity | __SAVE_FRAMEBUFFER_CAPACITY,
buffer_y_screencounter ^ {8{i_FLIP}}, buffer_x_screencounter ^ {7{i_FLIP}}};
ODDBUFFER_ADDR <= {buffer_frame_parity | __SAVE_FRAMEBUFFER_CAPACITY,
buffer_y_screencounter ^ {8{i_FLIP}}, buffer_x_screencounter ^ {7{i_FLIP}}};
end
endcase
end
@@ -1686,8 +1688,6 @@ end
///////////////////////////////////////////////////////////
////// XA7 XB7
////
@@ -1698,6 +1698,9 @@ end
as 1 and overwrite it with the existing data without updating the value.
Need to delay 1 clk.
Note that Konami swapped the name of two signals on the Nemesis schematics.
XA is on the ODD(B) buffer, and vice versa.
*/
always @(posedge i_EMU_MCLK)
@@ -1714,8 +1717,6 @@ end
///////////////////////////////////////////////////////////
////// CAS
////