Updates for tranZPUter v1.1 board
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1283
common/tranzputer.c
1283
common/tranzputer.c
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Load Diff
@@ -67,6 +67,7 @@
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#define TZMM_TZPU5 0x1D // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 5 is selected.
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#define TZMM_TZPU6 0x1E // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 6 is selected.
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#define TZMM_TZPU7 0x1F // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 7 is selected.
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#define TZMM_ENIOWAIT 0x20 // Enable wait state generator for Sharp system IO operations in region 0xE0-0xFF.
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// IO addresses on the tranZPUter or mainboard.
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//
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@@ -286,27 +287,27 @@
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}
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#define pinIndex(a) getPinIndex(pinMap[a])
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#define setZ80Data(a) { PORTB_GPCHR = 0x00FF0000 | (a & 0x000000ff); }
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#define setZ80Addr(a) { PORTC_GPCLR = 0x0FFF0000 | (a & 0x00000fff); PORTA_GPCLR = 0xF0000000 | (a & 0x0000f0000); PORTE_GPCHR = 0x07000000 | ((a >> 8) & 0x00000700); }
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#define setZ80AddrLower(a) { PORTC_GPCLR = 0x00FF0000 | (a & 0x000000ff); }
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#define setZ80RefreshAddr(a) { PORTC_GPCLR = 0x007F0000 | (a & 0x0000007f); }
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#define setZ80Data(a) { GPIOB_PDOR = (GPIOB_PDOR & 0xff00ffff) | ((a << 16) & 0x00ff0000); }
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#define setZ80Addr(a) { GPIOA_PDOR = (GPIOA_PDOR & 0xffff0fff) | (a & 0x00000f000); GPIOC_PDOR = (GPIOC_PDOR & 0xfffff000) | (a & 0x00000fff); }
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#define setZ80AddrLower(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xffffff00) | (a & 0x000000ff); }
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#define setZ80RefreshAddr(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xffffff80) | (a & 0x0000007f); }
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#define readZ80AddrLower() ( GPIOC_PDIR & 0x000000ff )
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#define readZ80Addr(a) ( (GPIOA_PDIR & 0x0000f0000) | (GPIOC_PDIR & 0x00000fff) )
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#define readDataBus() ( (GPIOB_PDIR >> 16) & 0x000000ff )
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#define readCtrlLatch() ( GPIOB_PDIR & 0x0000001f )
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#define readZ80Addr() ( (GPIOA_PDIR & 0x00000f000) | (GPIOC_PDIR & 0x00000fff) )
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#define readZ80DataBus() ( (GPIOB_PDIR >> 16) & 0x000000ff )
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#define readCtrlLatch() ( GPIOB_PDIR & 0x0000003f )
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#define writeCtrlLatch(a) { writeZ80IO(IO_TZ_CTRLLATCH, a); }
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#define setZ80Direction(a) { for(uint8_t idx=Z80_D0; idx <= Z80_D7; idx++) { if(a == WRITE) { pinOutput(idx); } else { pinInput(idx); } }; z80Control.busDir = a; }
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#define reqZ80BusChange(a) { if(a == MAINBOARD_ACCESS && z80Control.ctrlMode == TRANZPUTER_ACCESS) \
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{\
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pinHigh(CTL_BUSACK);\
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z80Control.ctrlMode = MAINBOARD_ACCESS;\
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z80Control.curCtrlLatch = 0b00000000;\
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z80Control.curCtrlLatch = TZMM_ORIG | TZMM_ENIOWAIT;\
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writeCtrlLatch(z80Control.curCtrlLatch);\
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} else if(a == TRANZPUTER_ACCESS && z80Control.ctrlMode == MAINBOARD_ACCESS)\
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{\
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pinLow(CTL_BUSACK);\
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z80Control.ctrlMode = TRANZPUTER_ACCESS;\
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z80Control.curCtrlLatch = 0b00011111;\
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z80Control.curCtrlLatch = TZMM_TZPU7 | TZMM_ENIOWAIT;\
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writeCtrlLatch(z80Control.curCtrlLatch);\
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} }
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// Lower level macro without pin mapping as this is called in the ResetHandler to halt the Z80 whilst the K64F starts up and is able to load up tranZPUter software.
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@@ -48,8 +48,8 @@ TARGET = main
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TEENSY = 35
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# Set to 24000000, 48000000, or 96000000 to set CPU core speed
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#TEENSY_CORE_SPEED = 168000000
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TEENSY_CORE_SPEED = 120000000
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TEENSY_CORE_SPEED = 168000000
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#TEENSY_CORE_SPEED = 120000000
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# Some libraries will require this to be defined
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# If you define this, you will break the default main.cpp
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