Files
u-boot/arch
Marek Vasut 64eeb15854 ARM: dts: socfpga: Adjust NAND register layout on Arria10
Adjust the NAND register size on Arria10 to reflect reality.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
..
2018-07-23 14:33:21 -04:00
2018-07-19 16:31:38 -04:00
2018-07-20 19:31:30 -04:00
2018-07-20 09:33:22 +08:00