clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB
Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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committed by
Stefano Babic
parent
006f0dfb1d
commit
f544dfecd2
@@ -255,8 +255,10 @@ static int imxrt1050_clk_probe(struct udevice *dev)
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imx_clk_gate2("lpuart1", "lpuart_podf", base + 0x7c, 24));
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clk_dm(IMXRT1050_CLK_SEMC,
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imx_clk_gate2("semc", "semc_podf", base + 0x74, 4));
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clk_dm(IMXRT1050_CLK_LCDIF,
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imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10));
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clk_dm(IMXRT1050_CLK_LCDIF_APB,
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imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28));
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clk_dm(IMXRT1050_CLK_LCDIF_PIX,
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imx_clk_gate2("lcdif_pix", "lcdif", base + 0x74, 10));
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struct clk *clk, *clk1;
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@@ -52,7 +52,7 @@
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#define IMXRT1050_CLK_USDHC2 43
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#define IMXRT1050_CLK_LPUART1 44
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#define IMXRT1050_CLK_SEMC 45
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#define IMXRT1050_CLK_LCDIF 46
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#define IMXRT1050_CLK_LCDIF_APB 46
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#define IMXRT1050_CLK_PLL1_ARM 47
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#define IMXRT1050_CLK_PLL2_SYS 48
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#define IMXRT1050_CLK_PLL3_USB_OTG 49
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@@ -60,6 +60,7 @@
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#define IMXRT1050_CLK_PLL5_VIDEO 51
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#define IMXRT1050_CLK_PLL6_ENET 52
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#define IMXRT1050_CLK_PLL7_USB_HOST 53
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#define IMXRT1050_CLK_END 54
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#define IMXRT1050_CLK_LCDIF_PIX 54
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#define IMXRT1050_CLK_END 55
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#endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */
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