vf500/vf610: synchronise device trees with linux
Synchronise device trees with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler
committed by
Stefano Babic
Stefano Babic
parent
fed2e400ff
commit
e8a9521e64
@@ -1,229 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*/
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/include/ "skeleton.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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spi0 = &dspi0;
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spi1 = &dspi1;
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ehci0 = &ehci0;
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ehci1 = &ehci1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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aips0: bus@40000000 {
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x00070000>;
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ranges;
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uart0: serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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status = "disabled";
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};
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uart1: serial@40028000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40028000 0x1000>;
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status = "disabled";
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};
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uart2: serial@40029000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40029000 0x1000>;
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status = "disabled";
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};
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uart3: serial@4002a000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x4002a000 0x1000>;
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status = "disabled";
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};
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dspi0: dspi0@4002c000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-dspi";
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reg = <0x4002c000 0x1000>;
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spi-num-chipselects = <5>;
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status = "disabled";
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};
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dspi1: dspi1@4002d000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-dspi";
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reg = <0x4002d000 0x1000>;
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spi-num-chipselects = <5>;
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status = "disabled";
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};
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qspi0: quadspi@40044000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-qspi";
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reg = <0x40044000 0x1000>,
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<0x20000000 0x10000000>;
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reg-names = "QuadSPI", "QuadSPI-memory";
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status = "disabled";
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};
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i2c0: i2c@40066000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-i2c";
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reg = <0x40066000 0x1000>;
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-i2c";
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reg = <0x40067000 0x1000>;
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status = "disabled";
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};
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iomuxc: iomuxc@40048000 {
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compatible = "fsl,vf610-iomuxc";
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reg = <0x40048000 0x1000>;
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fsl,mux_mask = <0x700000>;
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};
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gpio0: gpio@40049000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x400ff000 0x40>;
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#gpio-cells = <2>;
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};
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gpio1: gpio@4004a000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x400ff040 0x40>;
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#gpio-cells = <2>;
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};
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gpio2: gpio@4004b000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x400ff080 0x40>;
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#gpio-cells = <2>;
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};
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gpio3: gpio@4004c000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x400ff0c0 0x40>;
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#gpio-cells = <2>;
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};
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gpio4: gpio@4004d000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x400ff100 0x40>;
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#gpio-cells = <2>;
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};
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dcu0: dcu@40058000 {
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compatible = "fsl,vf610-dcu";
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reg = <0x40058000 0x1200>;
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status = "disabled";
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};
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ehci0: ehci@40034000 {
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compatible = "fsl,vf610-usb";
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reg = <0x40034000 0x800>;
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status = "disabled";
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};
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};
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aips1: bus@40080000 {
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40080000 0x0007f000>;
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ranges;
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uart4: serial@400a9000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x400a9000 0x1000>;
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status = "disabled";
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};
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uart5: serial@400aa000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x400aa000 0x1000>;
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status = "disabled";
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};
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ehci1: ehci@400b4000 {
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compatible = "fsl,vf610-usb";
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reg = <0x400b4000 0x800>;
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status = "disabled";
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};
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esdhc1: esdhc@400b2000 {
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compatible = "fsl,esdhc";
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reg = <0x400b2000 0x1000>;
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status = "disabled";
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};
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fec0: fec@400d0000 {
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compatible = "fsl,mvf600-fec";
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reg = <0x400d0000 0x1000>;
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status = "disabled";
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};
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fec1: fec@400d1000 {
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compatible = "fsl,mvf600-fec";
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reg = <0x400d1000 0x1000>;
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status = "disabled";
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};
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nfc: nand@400e0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-nfc";
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reg = <0x400e0000 0x4000>;
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status = "disabled";
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};
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i2c2: i2c@400e6000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-i2c";
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reg = <0x400e6000 0x1000>;
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status = "disabled";
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};
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i2c3: i2c@400e7000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-i2c";
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reg = <0x400e7000 0x1000>;
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status = "disabled";
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};
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};
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};
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};
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64
arch/arm/dts/vf500.dtsi
Normal file
64
arch/arm/dts/vf500.dtsi
Normal file
@@ -0,0 +1,64 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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//
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// Copyright 2013 Freescale Semiconductor, Inc.
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#include "vfxxx.dtsi"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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chosen { };
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aliases { };
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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a5_cpu: cpu@0 {
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compatible = "arm,cortex-a5";
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device_type = "cpu";
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reg = <0x0>;
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};
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};
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soc {
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bus@40000000 {
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intc: interrupt-controller@40003000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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reg = <0x40003000 0x1000>,
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<0x40002100 0x100>;
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};
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global_timer: timer@40002200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x40002200 0x20>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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clocks = <&clks VF610_CLK_PLATFORM_BUS>;
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};
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};
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bus@40080000 {
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pmu@40089000 {
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compatible = "arm,cortex-a5-pmu";
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a5_cpu>;
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reg = <0x40089000 0x1000>;
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};
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};
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};
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};
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&mscm_ir {
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interrupt-parent = <&intc>;
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};
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&wdoga5 {
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status = "okay";
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};
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@@ -1,10 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __DTS_VF610_PINFUNC_H
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@@ -1,21 +1,373 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Copyright 2016 Toradex AG
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*/
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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//
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// Copyright 2013 Freescale Semiconductor, Inc.
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/dts-v1/;
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#include "vf.dtsi"
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#include "vf610.dtsi"
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/ {
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model = "VF610 Tower Board";
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compatible = "fsl,vf610-twr", "fsl,vf610";
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chosen {
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stdout-path = &uart1;
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bootargs = "console=ttyLP1,115200";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x8000000>;
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};
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audio_ext: mclk_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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enet_ext: eth_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vcc_3v3_mcu: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "vcc_3v3_mcu";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker Ext",
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"Line", "Line In Jack";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"Microphone Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"Speaker Ext", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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frame-master;
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bitclock-master;
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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frame-master;
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bitclock-master;
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};
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};
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};
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&adc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc0_ad5>;
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vref-supply = <®_vcc_3v3_mcu>;
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status = "okay";
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};
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&clks {
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clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
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clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
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assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
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<&clks VF610_CLK_ENET_TS_SEL>;
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assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>,
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<&clks VF610_CLK_ENET_EXT>;
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};
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&dspi0 {
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bus-num = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dspi0>;
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status = "okay";
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sflash: at26df081a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at26df081a";
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spi-max-frequency = <16000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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};
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&edma0 {
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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bus-width = <4>;
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cd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&fec0 {
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec0>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&fec1 {
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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status = "okay";
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codec: sgtl5000@a {
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#sound-dai-cells = <0>;
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compatible = "fsl,sgtl5000";
|
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reg = <0x0a>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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clocks = <&clks VF610_CLK_SAI2>;
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};
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};
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&iomuxc {
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vf610-twr {
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pinctrl_adc0_ad5: adc0ad5grp {
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fsl,pins = <
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VF610_PAD_PTC30__ADC0_SE5 0xa1
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>;
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};
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pinctrl_dspi0: dspi0grp {
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fsl,pins = <
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VF610_PAD_PTB19__DSPI0_CS0 0x1182
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VF610_PAD_PTB20__DSPI0_SIN 0x1181
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VF610_PAD_PTB21__DSPI0_SOUT 0x1182
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VF610_PAD_PTB22__DSPI0_SCK 0x1182
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
|
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fsl,pins = <
|
||||
VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
|
||||
VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
|
||||
VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
|
||||
VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
|
||||
VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
|
||||
VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
|
||||
VF610_PAD_PTA7__GPIO_134 0x219d
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec0: fec0grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTA6__RMII_CLKIN 0x30d1
|
||||
VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
|
||||
VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
|
||||
VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
|
||||
VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
|
||||
VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
|
||||
VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
|
||||
VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
|
||||
VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
|
||||
VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
|
||||
VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
|
||||
VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
|
||||
VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
|
||||
VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
|
||||
VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
|
||||
VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
|
||||
VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
|
||||
VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c0: i2c0grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTB14__I2C0_SCL 0x30d3
|
||||
VF610_PAD_PTB15__I2C0_SDA 0x30d3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_nfc: nfcgrp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTD31__NF_IO15 0x28df
|
||||
VF610_PAD_PTD30__NF_IO14 0x28df
|
||||
VF610_PAD_PTD29__NF_IO13 0x28df
|
||||
VF610_PAD_PTD28__NF_IO12 0x28df
|
||||
VF610_PAD_PTD27__NF_IO11 0x28df
|
||||
VF610_PAD_PTD26__NF_IO10 0x28df
|
||||
VF610_PAD_PTD25__NF_IO9 0x28df
|
||||
VF610_PAD_PTD24__NF_IO8 0x28df
|
||||
VF610_PAD_PTD23__NF_IO7 0x28df
|
||||
VF610_PAD_PTD22__NF_IO6 0x28df
|
||||
VF610_PAD_PTD21__NF_IO5 0x28df
|
||||
VF610_PAD_PTD20__NF_IO4 0x28df
|
||||
VF610_PAD_PTD19__NF_IO3 0x28df
|
||||
VF610_PAD_PTD18__NF_IO2 0x28df
|
||||
VF610_PAD_PTD17__NF_IO1 0x28df
|
||||
VF610_PAD_PTD16__NF_IO0 0x28df
|
||||
VF610_PAD_PTB24__NF_WE_B 0x28c2
|
||||
VF610_PAD_PTB25__NF_CE0_B 0x28c2
|
||||
VF610_PAD_PTB27__NF_RE_B 0x28c2
|
||||
VF610_PAD_PTC26__NF_RB_B 0x283d
|
||||
VF610_PAD_PTC27__NF_ALE 0x28c2
|
||||
VF610_PAD_PTC28__NF_CLE 0x28c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0: pwm0grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTB0__FTM0_CH0 0x1582
|
||||
VF610_PAD_PTB1__FTM0_CH1 0x1582
|
||||
VF610_PAD_PTB2__FTM0_CH2 0x1582
|
||||
VF610_PAD_PTB3__FTM0_CH3 0x1582
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai2: sai2grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
|
||||
VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
|
||||
VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
|
||||
VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
|
||||
VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
|
||||
VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
|
||||
VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTB4__UART1_TX 0x21a2
|
||||
VF610_PAD_PTB5__UART1_RX 0x21a1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
VF610_PAD_PTB6__UART2_TX 0x21a2
|
||||
VF610_PAD_PTB7__UART2_RX 0x21a1
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&nfc {
|
||||
assigned-clocks = <&clks VF610_CLK_NFC>;
|
||||
assigned-clock-rates = <33000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nfc>;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
compatible = "fsl,vf610-nfc-nandcs";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
nand-bus-width = <16>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <24>;
|
||||
nand-ecc-step-size = <2048>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai2 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdev0 {
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbmisc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbmisc1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
20
arch/arm/dts/vf610.dtsi
Normal file
20
arch/arm/dts/vf610.dtsi
Normal file
@@ -0,0 +1,20 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
//
|
||||
// Copyright 2013 Freescale Semiconductor, Inc.
|
||||
|
||||
#include "vf500.dtsi"
|
||||
|
||||
&a5_cpu {
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
&aips0 {
|
||||
L2: cache-controller@40006000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x40006000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
arm,data-latency = <3 3 3>;
|
||||
arm,tag-latency = <2 2 2>;
|
||||
};
|
||||
};
|
||||
756
arch/arm/dts/vfxxx.dtsi
Normal file
756
arch/arm/dts/vfxxx.dtsi
Normal file
@@ -0,0 +1,756 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
//
|
||||
// Copyright 2013 Freescale Semiconductor, Inc.
|
||||
|
||||
#include "vf610-pinfunc.h"
|
||||
#include <dt-bindings/clock/vf610-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
can0 = &can0;
|
||||
can1 = &can1;
|
||||
ethernet0 = &fec0;
|
||||
ethernet1 = &fec1;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
serial3 = &uart3;
|
||||
serial4 = &uart4;
|
||||
serial5 = &uart5;
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
gpio3 = &gpio3;
|
||||
gpio4 = &gpio4;
|
||||
usbphy0 = &usbphy0;
|
||||
usbphy1 = &usbphy1;
|
||||
};
|
||||
|
||||
fxosc: fxosc {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
sxosc: sxosc {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
reboot: syscon-reboot {
|
||||
compatible = "syscon-reboot";
|
||||
regmap = <&src>;
|
||||
offset = <0x0>;
|
||||
mask = <0x1000>;
|
||||
};
|
||||
|
||||
tempsensor: iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc0 16>, <&adc1 16>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&mscm_ir>;
|
||||
ranges;
|
||||
|
||||
aips0: bus@40000000 {
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x00070000>;
|
||||
ranges;
|
||||
|
||||
mscm_cpucfg: cpucfg@40001000 {
|
||||
compatible = "fsl,vf610-mscm-cpucfg", "syscon";
|
||||
reg = <0x40001000 0x800>;
|
||||
};
|
||||
|
||||
mscm_ir: interrupt-controller@40001800 {
|
||||
compatible = "fsl,vf610-mscm-ir";
|
||||
reg = <0x40001800 0x400>;
|
||||
fsl,cpucfg = <&mscm_cpucfg>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
edma0: dma-controller@40018000 {
|
||||
#dma-cells = <2>;
|
||||
compatible = "fsl,vf610-edma";
|
||||
reg = <0x40018000 0x2000>,
|
||||
<0x40024000 0x1000>,
|
||||
<0x40025000 0x1000>;
|
||||
dma-channels = <32>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "edma-tx", "edma-err";
|
||||
clock-names = "dmamux0", "dmamux1";
|
||||
clocks = <&clks VF610_CLK_DMAMUX0>,
|
||||
<&clks VF610_CLK_DMAMUX1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can0: can@40020000 {
|
||||
compatible = "fsl,vf610-flexcan";
|
||||
reg = <0x40020000 0x4000>;
|
||||
interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_FLEXCAN0>,
|
||||
<&clks VF610_CLK_FLEXCAN0>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@40027000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x40027000 0x1000>;
|
||||
interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART0>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 2>,
|
||||
<&edma0 0 3>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@40028000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x40028000 0x1000>;
|
||||
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART1>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 4>,
|
||||
<&edma0 0 5>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@40029000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x40029000 0x1000>;
|
||||
interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART2>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 6>,
|
||||
<&edma0 0 7>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@4002a000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x4002a000 0x1000>;
|
||||
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART3>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 8>,
|
||||
<&edma0 0 9>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi0: spi@4002c000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-dspi";
|
||||
reg = <0x4002c000 0x1000>;
|
||||
interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI0>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <6>;
|
||||
dmas = <&edma1 1 12>,
|
||||
<&edma1 1 13>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi1: spi@4002d000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-dspi";
|
||||
reg = <0x4002d000 0x1000>;
|
||||
interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI1>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <4>;
|
||||
dmas = <&edma1 1 14>,
|
||||
<&edma1 1 15>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai0: sai@4002f000 {
|
||||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x4002f000 0x1000>;
|
||||
interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI0>,
|
||||
<&clks VF610_CLK_SAI0_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 0 17>,
|
||||
<&edma0 0 16>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai1: sai@40030000 {
|
||||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x40030000 0x1000>;
|
||||
interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI1>,
|
||||
<&clks VF610_CLK_SAI1_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 0 19>,
|
||||
<&edma0 0 18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai2: sai@40031000 {
|
||||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x40031000 0x1000>;
|
||||
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI2>,
|
||||
<&clks VF610_CLK_SAI2_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 0 21>,
|
||||
<&edma0 0 20>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai3: sai@40032000 {
|
||||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x40032000 0x1000>;
|
||||
interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI3>,
|
||||
<&clks VF610_CLK_SAI3_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 1 9>,
|
||||
<&edma0 1 8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pit: pit@40037000 {
|
||||
compatible = "fsl,vf610-pit";
|
||||
reg = <0x40037000 0x1000>;
|
||||
interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_PIT>;
|
||||
clock-names = "pit";
|
||||
};
|
||||
|
||||
pwm0: pwm@40038000 {
|
||||
compatible = "fsl,vf610-ftm-pwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x40038000 0x1000>;
|
||||
clock-names = "ftm_sys", "ftm_ext",
|
||||
"ftm_fix", "ftm_cnt_clk_en";
|
||||
clocks = <&clks VF610_CLK_FTM0>,
|
||||
<&clks VF610_CLK_FTM0_EXT_SEL>,
|
||||
<&clks VF610_CLK_FTM0_FIX_SEL>,
|
||||
<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm1: pwm@40039000 {
|
||||
compatible = "fsl,vf610-ftm-pwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x40039000 0x1000>;
|
||||
clock-names = "ftm_sys", "ftm_ext",
|
||||
"ftm_fix", "ftm_cnt_clk_en";
|
||||
clocks = <&clks VF610_CLK_FTM1>,
|
||||
<&clks VF610_CLK_FTM1_EXT_SEL>,
|
||||
<&clks VF610_CLK_FTM1_FIX_SEL>,
|
||||
<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@4003b000 {
|
||||
compatible = "fsl,vf610-adc";
|
||||
reg = <0x4003b000 0x1000>;
|
||||
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_ADC0>;
|
||||
clock-names = "adc";
|
||||
#io-channel-cells = <1>;
|
||||
status = "disabled";
|
||||
fsl,adck-max-frequency = <30000000>, <40000000>,
|
||||
<20000000>;
|
||||
};
|
||||
|
||||
tcon0: timing-controller@4003d000 {
|
||||
compatible = "fsl,vf610-tcon";
|
||||
reg = <0x4003d000 0x1000>;
|
||||
clocks = <&clks VF610_CLK_TCON0>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wdoga5: watchdog@4003e000 {
|
||||
compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x4003e000 0x1000>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_WDT>;
|
||||
clock-names = "wdog";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi0: spi@40044000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-qspi";
|
||||
reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
|
||||
reg-names = "QuadSPI", "QuadSPI-memory";
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_QSPI0_EN>,
|
||||
<&clks VF610_CLK_QSPI0>;
|
||||
clock-names = "qspi_en", "qspi";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
iomuxc: iomuxc@40048000 {
|
||||
compatible = "fsl,vf610-iomuxc";
|
||||
reg = <0x40048000 0x1000>;
|
||||
};
|
||||
|
||||
gpio0: gpio@40049000 {
|
||||
compatible = "fsl,vf610-gpio";
|
||||
reg = <0x40049000 0x1000 0x400ff000 0x40>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 0 32>;
|
||||
};
|
||||
|
||||
gpio1: gpio@4004a000 {
|
||||
compatible = "fsl,vf610-gpio";
|
||||
reg = <0x4004a000 0x1000 0x400ff040 0x40>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 32 32>;
|
||||
};
|
||||
|
||||
gpio2: gpio@4004b000 {
|
||||
compatible = "fsl,vf610-gpio";
|
||||
reg = <0x4004b000 0x1000 0x400ff080 0x40>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 64 32>;
|
||||
};
|
||||
|
||||
gpio3: gpio@4004c000 {
|
||||
compatible = "fsl,vf610-gpio";
|
||||
reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 96 32>;
|
||||
};
|
||||
|
||||
gpio4: gpio@4004d000 {
|
||||
compatible = "fsl,vf610-gpio";
|
||||
reg = <0x4004d000 0x1000 0x400ff100 0x40>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 128 7>;
|
||||
};
|
||||
|
||||
anatop: anatop@40050000 {
|
||||
compatible = "fsl,vf610-anatop", "syscon";
|
||||
reg = <0x40050000 0x400>;
|
||||
};
|
||||
|
||||
usbphy0: usbphy@40050800 {
|
||||
compatible = "fsl,vf610-usbphy";
|
||||
reg = <0x40050800 0x400>;
|
||||
interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_USBPHY0>;
|
||||
fsl,anatop = <&anatop>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy1: usbphy@40050c00 {
|
||||
compatible = "fsl,vf610-usbphy";
|
||||
reg = <0x40050c00 0x400>;
|
||||
interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_USBPHY1>;
|
||||
fsl,anatop = <&anatop>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcu0: dcu@40058000 {
|
||||
compatible = "fsl,vf610-dcu";
|
||||
reg = <0x40058000 0x1200>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DCU0>,
|
||||
<&clks VF610_CLK_DCU0_DIV>;
|
||||
clock-names = "dcu", "pix";
|
||||
fsl,tcon = <&tcon0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@40066000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-i2c";
|
||||
reg = <0x40066000 0x1000>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_I2C0>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 50>,
|
||||
<&edma0 0 51>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@40067000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-i2c";
|
||||
reg = <0x40067000 0x1000>;
|
||||
interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_I2C1>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 0 52>,
|
||||
<&edma0 0 53>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clks: ccm@4006b000 {
|
||||
compatible = "fsl,vf610-ccm";
|
||||
reg = <0x4006b000 0x1000>;
|
||||
clocks = <&sxosc>, <&fxosc>;
|
||||
clock-names = "sxosc", "fxosc";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
usbdev0: usb@40034000 {
|
||||
compatible = "fsl,vf610-usb", "fsl,imx27-usb";
|
||||
reg = <0x40034000 0x800>;
|
||||
interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_USBC0>;
|
||||
fsl,usbphy = <&usbphy0>;
|
||||
fsl,usbmisc = <&usbmisc0 0>;
|
||||
dr_mode = "peripheral";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbmisc0: usb@40034800 {
|
||||
#index-cells = <1>;
|
||||
compatible = "fsl,vf610-usbmisc";
|
||||
reg = <0x40034800 0x200>;
|
||||
clocks = <&clks VF610_CLK_USBC0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
src: src@4006e000 {
|
||||
compatible = "fsl,vf610-src", "syscon";
|
||||
reg = <0x4006e000 0x1000>;
|
||||
interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
aips1: bus@40080000 {
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40080000 0x0007f000>;
|
||||
ranges;
|
||||
|
||||
edma1: dma-controller@40098000 {
|
||||
#dma-cells = <2>;
|
||||
compatible = "fsl,vf610-edma";
|
||||
reg = <0x40098000 0x2000>,
|
||||
<0x400a1000 0x1000>,
|
||||
<0x400a2000 0x1000>;
|
||||
dma-channels = <32>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "edma-tx", "edma-err";
|
||||
clock-names = "dmamux0", "dmamux1";
|
||||
clocks = <&clks VF610_CLK_DMAMUX2>,
|
||||
<&clks VF610_CLK_DMAMUX3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp: ocotp@400a5000 {
|
||||
compatible = "fsl,vf610-ocotp", "syscon";
|
||||
reg = <0x400a5000 0x1000>;
|
||||
clocks = <&clks VF610_CLK_OCOTP>;
|
||||
};
|
||||
|
||||
snvs0: snvs@400a7000 {
|
||||
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
|
||||
reg = <0x400a7000 0x2000>;
|
||||
|
||||
snvsrtc: snvs-rtc-lp {
|
||||
compatible = "fsl,sec-v4.0-mon-rtc-lp";
|
||||
regmap = <&snvs0>;
|
||||
offset = <0x34>;
|
||||
interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SNVS>;
|
||||
clock-names = "snvs-rtc";
|
||||
};
|
||||
};
|
||||
|
||||
uart4: serial@400a9000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x400a9000 0x1000>;
|
||||
interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART4>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart5: serial@400aa000 {
|
||||
compatible = "fsl,vf610-lpuart";
|
||||
reg = <0x400aa000 0x1000>;
|
||||
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_UART5>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi2: spi@400ac000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-dspi";
|
||||
reg = <0x400ac000 0x1000>;
|
||||
interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI2>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <2>;
|
||||
dmas = <&edma1 0 10>,
|
||||
<&edma1 0 11>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi3: spi@400ad000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-dspi";
|
||||
reg = <0x400ad000 0x1000>;
|
||||
interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI3>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <2>;
|
||||
dmas = <&edma1 0 12>,
|
||||
<&edma1 0 13>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc1: adc@400bb000 {
|
||||
compatible = "fsl,vf610-adc";
|
||||
reg = <0x400bb000 0x1000>;
|
||||
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_ADC1>;
|
||||
clock-names = "adc";
|
||||
#io-channel-cells = <1>;
|
||||
status = "disabled";
|
||||
fsl,adck-max-frequency = <30000000>, <40000000>,
|
||||
<20000000>;
|
||||
};
|
||||
|
||||
esdhc0: esdhc@400b1000 {
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x400b1000 0x1000>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_IPG_BUS>,
|
||||
<&clks VF610_CLK_PLATFORM_BUS>,
|
||||
<&clks VF610_CLK_ESDHC0>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc1: esdhc@400b2000 {
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x400b2000 0x1000>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_IPG_BUS>,
|
||||
<&clks VF610_CLK_PLATFORM_BUS>,
|
||||
<&clks VF610_CLK_ESDHC1>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbh1: usb@400b4000 {
|
||||
compatible = "fsl,vf610-usb", "fsl,imx27-usb";
|
||||
reg = <0x400b4000 0x800>;
|
||||
interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_USBC1>;
|
||||
fsl,usbphy = <&usbphy1>;
|
||||
fsl,usbmisc = <&usbmisc1 0>;
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbmisc1: usb@400b4800 {
|
||||
#index-cells = <1>;
|
||||
compatible = "fsl,vf610-usbmisc";
|
||||
reg = <0x400b4800 0x200>;
|
||||
clocks = <&clks VF610_CLK_USBC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ftm: ftm@400b8000 {
|
||||
compatible = "fsl,ftm-timer";
|
||||
reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
|
||||
interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "ftm-evt", "ftm-src",
|
||||
"ftm-evt-counter-en", "ftm-src-counter-en";
|
||||
clocks = <&clks VF610_CLK_FTM2>,
|
||||
<&clks VF610_CLK_FTM3>,
|
||||
<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
|
||||
<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi1: spi@400c4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-qspi";
|
||||
reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
|
||||
reg-names = "QuadSPI", "QuadSPI-memory";
|
||||
interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_QSPI1_EN>,
|
||||
<&clks VF610_CLK_QSPI1>;
|
||||
clock-names = "qspi_en", "qspi";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dac0: dac@400cc000 {
|
||||
compatible = "fsl,vf610-dac";
|
||||
reg = <0x400cc000 1000>;
|
||||
interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "dac";
|
||||
clocks = <&clks VF610_CLK_DAC0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dac1: dac@400cd000 {
|
||||
compatible = "fsl,vf610-dac";
|
||||
reg = <0x400cd000 1000>;
|
||||
interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "dac";
|
||||
clocks = <&clks VF610_CLK_DAC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fec0: ethernet@400d0000 {
|
||||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d0000 0x1000>;
|
||||
interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fec1: ethernet@400d1000 {
|
||||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d1000 0x1000>;
|
||||
interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@400d4000 {
|
||||
compatible = "fsl,vf610-flexcan";
|
||||
reg = <0x400d4000 0x4000>;
|
||||
interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_FLEXCAN1>,
|
||||
<&clks VF610_CLK_FLEXCAN1>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nfc: nand@400e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-nfc";
|
||||
reg = <0x400e0000 0x4000>;
|
||||
interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_NFC>;
|
||||
clock-names = "nfc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@400e6000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-i2c";
|
||||
reg = <0x400e6000 0x1000>;
|
||||
interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_I2C2>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 1 36>,
|
||||
<&edma0 1 37>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@400e7000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-i2c";
|
||||
reg = <0x400e7000 0x1000>;
|
||||
interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_I2C3>;
|
||||
clock-names = "ipg";
|
||||
dmas = <&edma0 1 38>,
|
||||
<&edma0 1 39>;
|
||||
dma-names = "rx","tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
crypto: crypto@400f0000 {
|
||||
compatible = "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x400f0000 0x9000>;
|
||||
ranges = <0 0x400f0000 0x9000>;
|
||||
clocks = <&clks VF610_CLK_CAAM>;
|
||||
clock-names = "ipg";
|
||||
|
||||
sec_jr0: jr0@1000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
sec_jr1: jr1@2000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user