Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
This commit is contained in:
Tom Rini
2019-09-06 19:49:51 -04:00
13 changed files with 200 additions and 35 deletions

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@@ -26,6 +26,23 @@ config BCM2837_64B
select BCM2837
select ARM64
config BCM2711
bool "Broadcom BCM2711 SoC support"
depends on ARCH_BCM283X
config BCM2711_32B
bool "Broadcom BCM2711 SoC 32-bit support"
depends on ARCH_BCM283X
select BCM2711
select ARMV7_LPAE
select CPU_V7A
config BCM2711_64B
bool "Broadcom BCM2711 SoC 64-bit support"
depends on ARCH_BCM283X
select BCM2711
select ARM64
menu "Broadcom BCM283X family"
depends on ARCH_BCM283X
@@ -127,6 +144,50 @@ config TARGET_RPI_3
This option creates a build targeting the ARMv8/AArch64 ISA.
select BCM2837_64B
config TARGET_RPI_4_32B
bool "Raspberry Pi 4 32-bit build"
help
Support for all BCM2711-based Raspberry Pi variants, such as
the RPi 4 model B, in AArch32 (32-bit) mode.
This option assumes the VideoCore firmware is configured to use the
mini UART (rather than PL011) for the serial console. This is the
default on the RPi 4. To enable the UART console, the following non-
default option must be present in config.txt: enable_uart=1. This is
required for U-Boot to operate correctly, even if you only care
about the HDMI/usbkbd console.
Due to hardware incompatibilities, this can't be used with
BCM283/5/6/7.
This option creates a build targeting the ARMv7/AArch32 ISA.
select BCM2711_32B
config TARGET_RPI_4
bool "Raspberry Pi 4 64-bit build"
help
Support for all BCM2711-based Raspberry Pi variants, such as
the RPi 4 model B, in AArch64 (64-bit) mode.
This option assumes the VideoCore firmware is configured to use the
mini UART (rather than PL011) for the serial console. This is the
default on the RPi 4. To enable the UART console, the following non-
default option must be present in config.txt: enable_uart=1. This is
required for U-Boot to operate correctly, even if you only care
about the HDMI/usbkbd console.
Due to hardware incompatibilities, this can't be used with
BCM283/5/6/7.
Also, due to a bug in firmware, switching to 64bit mode doesn't
happen automatically based on the kernel's image filename. See
https://github.com/raspberrypi/firmware/issues/1193 for more details.
Until that is resolved, the configuration (config.txt) needs to
explicitly set: arm_64bit=1.
This option creates a build targeting the ARMv8/AArch64 ISA.
select BCM2711_64B
endchoice
config SYS_BOARD
@@ -141,4 +202,10 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "rpi"
config BCM283x_BASE
hex
default "0x20000000" if BCM2835
default "0x3f000000" if BCM2836 || BCM2837
default "0xfe000000" if BCM2711
endmenu

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@@ -37,18 +37,17 @@
/* Raw mailbox HW */
#ifndef CONFIG_BCM2835
#define BCM2835_MBOX_PHYSADDR 0x3f00b880
#else
#define BCM2835_MBOX_PHYSADDR 0x2000b880
#endif
#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880)
struct bcm2835_mbox_regs {
u32 read;
u32 rsvd0[5];
u32 status;
u32 config;
u32 mail0_status;
u32 mail0_config;
u32 write;
u32 rsvd1[5];
u32 mail1_status;
u32 mail1_config;
};
#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
@@ -234,6 +233,7 @@ struct bcm2835_mbox_tag_set_power_state {
#define BCM2835_MBOX_CLOCK_ID_SDRAM 8
#define BCM2835_MBOX_CLOCK_ID_PIXEL 9
#define BCM2835_MBOX_CLOCK_ID_PWM 10
#define BCM2835_MBOX_CLOCK_ID_EMMC2 12
struct bcm2835_mbox_tag_get_clock_rate {
struct bcm2835_mbox_tag_hdr tag_hdr;

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@@ -6,11 +6,7 @@
#ifndef _BCM2835_SDHCI_H_
#define _BCM2835_SDHCI_H_
#ifndef CONFIG_BCM2835
#define BCM2835_SDHCI_BASE 0x3f300000
#else
#define BCM2835_SDHCI_BASE 0x20300000
#endif
#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)
int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);

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@@ -6,11 +6,7 @@
#ifndef _BCM2835_TIMER_H
#define _BCM2835_TIMER_H
#ifndef CONFIG_BCM2835
#define BCM2835_TIMER_PHYSADDR 0x3f003000
#else
#define BCM2835_TIMER_PHYSADDR 0x20003000
#endif
#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000)
#define BCM2835_TIMER_CS_M3 (1 << 3)
#define BCM2835_TIMER_CS_M2 (1 << 2)

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@@ -6,11 +6,7 @@
#ifndef _BCM2835_WDOG_H
#define _BCM2835_WDOG_H
#ifndef CONFIG_BCM2835
#define BCM2835_WDOG_PHYSADDR 0x3f100000
#else
#define BCM2835_WDOG_PHYSADDR 0x20100000
#endif
#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000)
struct bcm2835_wdog_regs {
u32 unknown0[7];

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@@ -27,7 +27,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
/* Drain any stale responses */
for (;;) {
val = readl(&regs->status);
val = readl(&regs->mail0_status);
if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
break;
if (get_timer(0) >= endtime) {
@@ -40,7 +40,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
/* Wait for space to send */
for (;;) {
val = readl(&regs->status);
val = readl(&regs->mail1_status);
if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
break;
if (get_timer(0) >= endtime) {
@@ -58,7 +58,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
/* Wait for the response */
for (;;) {
val = readl(&regs->status);
val = readl(&regs->mail0_status);
if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
break;
if (get_timer(0) >= endtime) {

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@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = {
DTB_DIR "bcm2837-rpi-cm3.dtb",
false,
},
[0x11] = {
"4 Model B",
DTB_DIR "bcm2711-rpi-4-b.dtb",
true,
},
};
static const struct rpi_model rpi_models_old_scheme[] = {
@@ -244,7 +249,8 @@ static uint32_t rev_type;
static const struct rpi_model *model;
#ifdef CONFIG_ARM64
static struct mm_region bcm2837_mem_map[] = {
#ifndef CONFIG_BCM2711
static struct mm_region bcm283x_mem_map[] = {
{
.virt = 0x00000000UL,
.phys = 0x00000000UL,
@@ -263,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = {
0,
}
};
struct mm_region *mem_map = bcm2837_mem_map;
#else
static struct mm_region bcm283x_mem_map[] = {
{
.virt = 0x00000000UL,
.phys = 0x00000000UL,
.size = 0xfe000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xfe000000UL,
.phys = 0xfe000000UL,
.size = 0x01800000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
}
};
#endif
struct mm_region *mem_map = bcm283x_mem_map;
#endif
int dram_init(void)

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@@ -0,0 +1,33 @@
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_4_32B=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=1
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_OF_BOARD=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_FS_UUID=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_PHYS_TO_BUS=y
CONFIG_OF_LIBFDT_OVERLAY=y

33
configs/rpi_4_defconfig Normal file
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@@ -0,0 +1,33 @@
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_4=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=1
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_OF_BOARD=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_FS_UUID=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_PHYS_TO_BUS=y
CONFIG_OF_LIBFDT_OVERLAY=y

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@@ -35,6 +35,7 @@ alias mariosix Mario Six <mario.six@gdsys.cc>
alias masahiro Masahiro Yamada <yamada.masahiro@socionext.com>
alias mateusz Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
alias maxime Maxime Ripard <maxime.ripard@free-electrons.com>
alias mbrugger Matthias Brugger <mbrugger@suse.com>
alias monstr Michal Simek <monstr@monstr.eu>
alias prom Minkyu Kang <mk7.kang@samsung.com>
alias ptomsich Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
@@ -74,6 +75,9 @@ alias uniphier uboot, masahiro
alias zynq uboot, monstr
alias rockchip uboot, sjg, kevery, ptomsich
alias bcm283x uboot, mbrugger
alias rpi uboot, mbrugger
alias m68k uboot, alisonwang, angelo_ts
alias coldfire m68k

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@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
fdt_addr_t base;
int emmc_freq;
int ret;
int clock_id = (int)dev_get_driver_data(dev);
base = devfdt_get_addr(dev);
if (base == FDT_ADDR_T_NONE)
return -EINVAL;
ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC);
ret = bcm2835_get_mmc_clock(clock_id);
if (ret < 0) {
debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret);
return ret;
@@ -230,7 +231,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
}
static const struct udevice_id bcm2835_sdhci_match[] = {
{ .compatible = "brcm,bcm2835-sdhci" },
{
.compatible = "brcm,bcm2835-sdhci",
.data = BCM2835_MBOX_CLOCK_ID_EMMC
},
{
.compatible = "brcm,bcm2711-emmc2",
.data = BCM2835_MBOX_CLOCK_ID_EMMC2
},
{ /* sentinel */ }
};

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@@ -234,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host)
static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
{
int timediff = 0;
ulong tstart_ms = get_timer(0);
while (1) {
u32 edm, fsm;
@@ -254,11 +254,13 @@ static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
break;
}
/* Error out after 100000 register reads (~1s) */
if (timediff++ == 100000) {
/* Error out after ~1s */
ulong tlapse_ms = get_timer(tstart_ms);
if ( tlapse_ms > 1000 /* ms */ ) {
dev_err(host->dev,
"wait_transfer_complete - still waiting after %d retries\n",
timediff);
"wait_transfer_complete - still waiting after %lu ms\n",
tlapse_ms);
bcm2835_dumpregs(host);
return -ETIMEDOUT;
}

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@@ -55,6 +55,10 @@
#define CONFIG_SYS_MEMTEST_END 0x00200000
#define CONFIG_LOADADDR 0x00200000
#ifdef CONFIG_ARM64
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#endif
/* Devices */
/* GPIO */
#define CONFIG_BCM2835_GPIO