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arm: mvebu: turris_omnia: Fix mpp26 pin name and comment

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There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.

Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.

Signed-off-by: Marek Behún <kabel@kernel.org>
This commit is contained in:
Marek Behún
2022-07-27 15:00:27 +02:00
committed by Stefan Roese
parent 162311637d
commit b2d7619e46
1 changed files with 2 additions and 2 deletions
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4
arch/arm/dts/armada-385-turris-omnia.dts
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@@ -488,7 +488,7 @@
marvell,function = "spi0";
};
spi0cs1_pins: spi0cs1-pins {
spi0cs2_pins: spi0cs2-pins {
marvell,pins = "mpp26";
marvell,function = "spi0";
};
@@ -523,7 +523,7 @@
};
};
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
};
&uart0 {