Convert CONFIG_FSL_IFC to Kconfig

This converts the following to Kconfig:
   CONFIG_FSL_IFC

This is done via select statements to match previous logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-12-11 14:55:49 -05:00
parent 7e6a6fd821
commit 98ab831da7
14 changed files with 9 additions and 26 deletions

View File

@@ -1,5 +1,6 @@
config ARCH_LS1021A
bool
select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI
select SYS_FSL_DDR_BE if SYS_FSL_DDR
select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
select SYS_FSL_ERRATUM_A008378

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@@ -59,6 +59,7 @@ config ARCH_LS1043A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873 if !TFABOOT
select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI)
select FSL_LAYERSCAPE
select FSL_LSCH2
select GICV2
@@ -94,6 +95,7 @@ config ARCH_LS1043A
config ARCH_LS1046A
bool
select ARMV8_SET_SMPEN
select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI)
select FSL_LAYERSCAPE
select FSL_LSCH2
select GICV2
@@ -134,6 +136,7 @@ config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873 if !TFABOOT
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
@@ -182,6 +185,7 @@ config ARCH_LS2080A
select ARM_ERRATA_828024
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3

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@@ -1084,9 +1084,6 @@ config SYS_PPC64
config SYS_PPC_E500_USE_DEBUG_TLB
bool
config FSL_IFC
bool
config FSL_ELBC
bool

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@@ -500,4 +500,7 @@ config ESM_PMIC
Support ESM (Error Signal Monitor) on PMIC devices. ESM is used
typically to reboot the board in error condition.
config FSL_IFC
bool
endmenu

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@@ -134,6 +134,7 @@ config NAND_FSL_ELBC
config NAND_FSL_IFC
bool "Support Freescale Integrated Flash Controller NAND driver"
select FSL_IFC
help
Enable the Freescale Integrated Flash Controller NAND driver.

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@@ -40,7 +40,6 @@
* IFC Definitions
*/
/* NOR Flash Definitions */
#define CONFIG_FSL_IFC
#define CONFIG_SYS_FLASH_BASE 0x60000000
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE

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@@ -76,7 +76,6 @@ unsigned long get_board_sys_clk(void);
* IFC Definitions
*/
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_IFC
#define CONFIG_SYS_FLASH_BASE 0x60000000
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE

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@@ -89,7 +89,6 @@
* IFC Definitions
*/
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_IFC
#define CONFIG_SYS_FLASH_BASE 0x60000000
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE

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@@ -122,7 +122,6 @@
#ifndef SPL_NO_IFC
#if defined(CONFIG_TFABOOT) || \
(!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
#define CONFIG_FSL_IFC
/*
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)

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@@ -17,8 +17,6 @@
#define CONFIG_SYS_UBOOT_BASE 0x40100000
/* IFC */
#define CONFIG_FSL_IFC
/*
* NAND Flash Definitions
*/

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@@ -43,7 +43,6 @@ unsigned long get_board_sys_clk(void);
/* IFC */
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_IFC
/*
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)

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@@ -27,14 +27,6 @@
#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000
#endif
#ifndef SPL_NO_IFC
/* IFC */
#define CONFIG_FSL_IFC
/*
* NAND Flash Definitions
*/
#endif
#define CONFIG_SYS_NAND_BASE 0x7e800000
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE

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@@ -63,11 +63,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
/* IFC */
#define CONFIG_FSL_IFC
#endif
/*
* During booting, IFC is mapped at the region of 0x30000000.
* But this region is limited to 256MB. To accommodate NOR, promjet

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@@ -74,9 +74,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
/* IFC */
#define CONFIG_FSL_IFC
/*
* During booting, IFC is mapped at the region of 0x30000000.
* But this region is limited to 256MB. To accommodate NOR, promjet