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ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration

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There is no real need to include full DT when only some nodes are enough to
use. It will save some space.

Retested with FSBL for initial SoC setup. SPL didn't work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
2020-02-26 11:11:38 +01:00
parent 0f8defd891
commit 7c49a6d08e
1 changed files with 3 additions and 10 deletions
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13
arch/arm/dts/zynq-cse-nor.dts
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@@ -5,7 +5,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
#address-cells = <1>;
@@ -33,27 +32,21 @@
};
amba: amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
ranges;
intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xF8F01000 0x1000>,
<0xF8F00100 0x100>;
};
slcr: slcr@f8000000 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
reg = <0xF8000000 0x1000>;
ranges;
clkc: clkc@100 {
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
clock-output-names = "armpll", "ddrpll",