u-boot-imx-20211020
-------------------

First PR from u-boot-imx for 2022.01

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535

- new board: kontron-sl-mx8mm
- imx8m:
	- fix secure boot
- imx ESDHC: fixes
- i.MX53: Support thum2, bmode and fixes for Menlo board
	  usbarmory switch to Ethernet driver model
- imx6 :
	- DDR calibration for Toradex boards
- imx7:
	- Fixes
- Updated gateworks boards (ventana / venice)

# gpg verification failed.
This commit is contained in:
Tom Rini
2021-10-20 14:24:09 -04:00
123 changed files with 6594 additions and 533 deletions

View File

@@ -107,6 +107,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
"splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
"usb_pgood_delay=2000\0" \
"console=ttymxc1\0" \
"bootdevs=usb mmc sata flash\0" \

View File

@@ -18,15 +18,23 @@
* - Set the stack at the end of the free area section, at 0x00946BB8.
* - The BOOT ROM loads what they consider the firmware image
* which consists of a 4K header in front of us that contains the IVT, DCD
* and some padding thus 'our' max size is really 0x00946BB8 - 0x00911000.
* 64KB is more then enough for the SPL.
* and some padding. However, the manual also states that the ROM uses the
* OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use
* this range for stack and malloc, the SPL itself must fit below 0x920000,
* or the image will be truncated in at least some boot modes like USB SDP.
* Thus our max size is really 0x00920000 - 0x00912000. If necessary,
* CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space
* for the SPL, but 56KB should be more than enough for the SPL.
*/
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_MAX_SIZE 0xE000
#define CONFIG_SPL_STACK 0x00946BB8
/*
* Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
* SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
* boot media (given that boot media specific offset is configured properly).
* Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding)
* The extra padding could be removed, but this value was used historically
* based on an incorrect CONFIG_SPL_MAX_SIZE definition.
* This allows to write the SPL/U-Boot combination generated with
* u-boot-with-spl.imx directly to a boot media (given that boot media specific
* offset is configured properly).
*/
#define CONFIG_SPL_PAD_TO 0x11000

View File

@@ -10,7 +10,7 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M)
#define CONFIG_SPL_MAX_SIZE (148 * 1024)
#define CONFIG_SYS_MONITOR_LEN SZ_512K
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR

View File

@@ -10,7 +10,7 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M)
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)

View File

@@ -10,6 +10,8 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)

View File

@@ -0,0 +1,77 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018 Kontron Electronics GmbH
*
* Configuration settings for the Kontron i.MX6UL boards/SoMs.
*/
#ifndef __KONTRON_MX6UL_CONFIG_H
#define __KONTRON_MX6UL_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#include "mx6_common.h"
#ifdef CONFIG_SPL_BUILD
#include "imx6_spl.h"
#endif
/* RAM */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
/* Board and environment settings */
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_HOSTNAME "kontron-mx6ul"
#define CONFIG_ETHPRIME "eth0"
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
/* Boot order for distro boot */
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(UBIFS, ubifs, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
#else
#define BOOTENV
#endif
/* MMC Configs */
#ifdef CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x88080000\0" \
"pxefile_addr_r=0x80100000\0" \
"scriptaddr=0x80100000\0" \
"bootdelay=3\0" \
"ethact=" CONFIG_ETHPRIME "\0" \
"hostname=" CONFIG_HOSTNAME "\0" \
BOOTENV
#endif /* __KONTRON_MX6UL_CONFIG_H */

View File

@@ -0,0 +1,84 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2019 Kontron Electronics GmbH
*
* Configuration settings for the Kontron SL/BL i.MX8M-Mini boards and modules (N81xx).
*/
#ifndef __KONTRON_MX8MM_CONFIG_H
#define __KONTRON_MX8MM_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#ifdef CONFIG_SPL_BUILD
#include <config.h>
#endif
/* RAM */
#define PHYS_SDRAM DDR_CSD1_BASE_ADDR
#define PHYS_SDRAM_SIZE (SZ_4G)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Board and environment settings */
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
#define CONFIG_HOSTNAME "kontron-mx8mm"
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na)
#include <config_distro_bootcmd.h>
/* Do not try to probe USB net adapters for net boot */
#undef BOOTENV_RUN_NET_USB_START
#define BOOTENV_RUN_NET_USB_START
#else
#define BOOTENV
#endif
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
#define CONFIG_FSL_USDHC
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_STACK 0x91fff0
#define CONFIG_SPL_BSS_START_ADDR 0x910000
#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR 0x930000
#endif
#define FEC_QUIRK_ENET_MAC
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0x42000000\0" \
"fdt_addr_r=0x44000000\0" \
"ramdisk_addr_r=0x46400000\0" \
"pxefile_addr_r=0x46000000\0" \
"scriptaddr=0x46000000\0" \
"dfu_alt_info=sf 0:0=flash-bin raw 0x400 0x1f0000\0" \
"bootdelay=3\0" \
"hostname=" CONFIG_HOSTNAME "\0" \
BOOTENV
#endif /* __KONTRON_MX8MM_CONFIG_H */

View File

@@ -161,6 +161,13 @@
"splashfile=boot/usplash.bmp.gz\0" \
"splashimage=0x88000000\0" \
"splashpos=m,m\0" \
"altbootcmd=" \
"if test ${mmcpart} -eq 1 ; then " \
"setenv mmcpart 2 ; " \
"else " \
"setenv mmcpart 1 ; " \
"fi ; " \
"boot\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0" \
"addcons=" \
@@ -175,14 +182,14 @@
"setenv bootargs ${bootargs} ${miscargs}\0" \
"addargs=run addcons addmisc addmtd\0" \
"mmcload=" \
"mmc rescan ; load mmc ${mmcdev}:${mmcpart} " \
"${kernel_addr_r} ${bootfile}\0" \
"mmc rescan || reset ; load mmc ${mmcdev}:${mmcpart} " \
"${kernel_addr_r} ${bootfile} || reset\0" \
"miscargs=nohlt panic=1\0" \
"mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \
"rootwait\0" \
"mmc_mmc=" \
"run mmcload mmcargs addargs ; " \
"bootm ${kernel_addr_r}\0" \
"run mmcload mmcargs addargs || reset ; " \
"bootm ${kernel_addr_r} ; reset\0" \
"netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
"net_nfs=" \
"run netload nfsargs addip addargs ; " \

View File

@@ -60,11 +60,6 @@
"bootz ${loadaddr} - ${fdt_addr}; " \
"fi;\0" \
#define CONFIG_BOOTCOMMAND \
"if run loadimage; then " \
"run mmcboot; " \
"fi; " \
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K

View File

@@ -26,9 +26,8 @@
"bootm_size=0x10000000\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"root=/dev/mmcblk0p${mmcpart} rootwait rw\0" \
"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \
"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \
"mmcboot=echo Booting from mmc ...; " \

View File

@@ -194,6 +194,7 @@
#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1)
#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7
#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3
#define ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT (4 << 20)
#define ESDHC_STROBE_DLL_STATUS 0x74
#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1)

View File

@@ -304,6 +304,14 @@ ulong spl_get_image_text_base(void);
*/
bool spl_load_simple_fit_skip_processing(void);
/**
* spl_load_simple_fit_fix_load() - Hook to make fixes
* after fit image header is loaded
*
* Returns pointer to fit
*/
void *spl_load_simple_fit_fix_load(const void *fit);
/**
* spl_load_simple_fit() - Loads a fit image from a device.
* @spl_image: Image description to set up