soc: soc_ti_k3: update j721e revision numbering
There is a 4 bit VARIANT number inside the JTAGID register that TI increments any time a new variant for a chip is produced. Each family of TI's SoCs uses a different versioning scheme based off that VARIANT number. CC: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>
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@@ -16,9 +16,6 @@
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#define AM64X 0xbb38
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#define J721S2 0xbb75
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#define REV_SR1_0 0
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#define REV_SR2_0 1
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#define JTAG_ID_VARIANT_SHIFT 28
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#define JTAG_ID_VARIANT_MASK (0xf << 28)
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#define JTAG_ID_PARTNO_SHIFT 12
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@@ -59,25 +56,42 @@ static const char *get_family_string(u32 idreg)
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return family;
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}
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static char *j721e_rev_string_map[] = {
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"1.0", "1.1",
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};
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static char *am65x_rev_string_map[] = {
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"1.0", "2.0",
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};
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static const char *get_rev_string(u32 idreg)
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{
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const char *revision;
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u32 rev;
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u32 soc;
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rev = (idreg & JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
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soc = (idreg & JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
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switch (rev) {
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case REV_SR1_0:
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revision = "1.0";
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break;
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case REV_SR2_0:
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revision = "2.0";
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break;
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switch (soc) {
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case J721E:
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if (rev > ARRAY_SIZE(j721e_rev_string_map))
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goto bail;
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return j721e_rev_string_map[rev];
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case AM65X:
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if (rev > ARRAY_SIZE(am65x_rev_string_map))
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goto bail;
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return am65x_rev_string_map[rev];
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case AM64X:
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case J7200:
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default:
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revision = "Unknown Revision";
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if (!rev)
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return "1.0";
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};
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return revision;
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bail:
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return "Unknown Revision";
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}
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static int soc_ti_k3_get_family(struct udevice *dev, char *buf, int size)
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