PPC: Add crypto node in device tree
device tree imported from linux kernel. c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4 Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Gaurav Jain
committed by
Stefano Babic
Stefano Babic
parent
8976556a8a
commit
5e2ff13357
@@ -11,6 +11,7 @@
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/include/ "qoriq-clockgen1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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/include/ "qoriq-sec4.2-0.dtsi"
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/* include used FMan blocks */
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/include/ "qoriq-fman-0.dtsi"
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@@ -11,6 +11,7 @@
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/include/ "qoriq-clockgen1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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/include/ "qoriq-sec4.2-0.dtsi"
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/* include used FMan blocks */
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/include/ "qoriq-fman-0.dtsi"
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@@ -11,6 +11,7 @@
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/include/ "qoriq-clockgen1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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/include/ "qoriq-sec4.0-0.dtsi"
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/* include used FMan blocks */
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/include/ "qoriq-fman-0.dtsi"
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@@ -11,6 +11,7 @@
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/include/ "qoriq-clockgen1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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/include/ "qoriq-sec5.2-0.dtsi"
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/* include used FMan blocks */
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/include/ "qoriq-fman-0.dtsi"
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74
arch/powerpc/dts/qoriq-sec4.0-0.dtsi
Normal file
74
arch/powerpc/dts/qoriq-sec4.0-0.dtsi
Normal file
@@ -0,0 +1,74 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
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/*
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* QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*/
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crypto: crypto@300000 {
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compatible = "fsl,sec-v4.0";
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fsl,sec-era = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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ranges = <0 0x300000 0x10000>;
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interrupts = <92 2 0 0>;
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sec_jr0: jr@1000 {
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupts = <88 2 0 0>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupts = <89 2 0 0>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupts = <90 2 0 0>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupts = <91 2 0 0>;
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};
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rtic@6000 {
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compatible = "fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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ranges = <0x0 0x6100 0xe00>;
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rtic_a: rtic-a@0 {
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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};
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rtic_b: rtic-b@20 {
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x20 0x20 0x200 0x80>;
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};
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rtic_c: rtic-c@40 {
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x40 0x20 0x300 0x80>;
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};
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rtic_d: rtic-d@60 {
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x60 0x20 0x500 0x80>;
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};
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};
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};
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sec_mon: sec_mon@314000 {
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupts = <93 2 0 0>;
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};
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83
arch/powerpc/dts/qoriq-sec4.2-0.dtsi
Normal file
83
arch/powerpc/dts/qoriq-sec4.2-0.dtsi
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@@ -0,0 +1,83 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
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/*
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* QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*/
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crypto: crypto@300000 {
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compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
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fsl,sec-era = <3>;
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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ranges = <0 0x300000 0x10000>;
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interrupts = <92 2 0 0>;
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sec_jr0: jr@1000 {
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compatible = "fsl,sec-v4.2-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupts = <88 2 0 0>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,sec-v4.2-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupts = <89 2 0 0>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,sec-v4.2-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupts = <90 2 0 0>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,sec-v4.2-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupts = <91 2 0 0>;
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};
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rtic@6000 {
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compatible = "fsl,sec-v4.2-rtic",
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"fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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ranges = <0x0 0x6100 0xe00>;
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rtic_a: rtic-a@0 {
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compatible = "fsl,sec-v4.2-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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};
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rtic_b: rtic-b@20 {
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compatible = "fsl,sec-v4.2-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x20 0x20 0x200 0x80>;
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};
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rtic_c: rtic-c@40 {
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compatible = "fsl,sec-v4.2-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x40 0x20 0x300 0x80>;
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};
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rtic_d: rtic-d@60 {
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compatible = "fsl,sec-v4.2-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x60 0x20 0x500 0x80>;
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};
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};
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};
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sec_mon: sec_mon@314000 {
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compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupts = <93 2 0 0>;
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};
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92
arch/powerpc/dts/qoriq-sec5.2-0.dtsi
Normal file
92
arch/powerpc/dts/qoriq-sec5.2-0.dtsi
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@@ -0,0 +1,92 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
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/*
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* QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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*/
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crypto: crypto@300000 {
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compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
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fsl,sec-era = <5>;
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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ranges = <0 0x300000 0x10000>;
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interrupts = <92 2 0 0>;
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sec_jr0: jr@1000 {
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compatible = "fsl,sec-v5.2-job-ring",
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"fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupts = <88 2 0 0>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,sec-v5.2-job-ring",
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"fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupts = <89 2 0 0>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,sec-v5.2-job-ring",
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"fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupts = <90 2 0 0>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,sec-v5.2-job-ring",
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"fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupts = <91 2 0 0>;
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};
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rtic@6000 {
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compatible = "fsl,sec-v5.2-rtic",
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"fsl,sec-v5.0-rtic",
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"fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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ranges = <0x0 0x6100 0xe00>;
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rtic_a: rtic-a@0 {
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compatible = "fsl,sec-v5.2-rtic-memory",
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"fsl,sec-v5.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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};
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rtic_b: rtic-b@20 {
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compatible = "fsl,sec-v5.2-rtic-memory",
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"fsl,sec-v5.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x20 0x20 0x200 0x80>;
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};
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rtic_c: rtic-c@40 {
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compatible = "fsl,sec-v5.2-rtic-memory",
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"fsl,sec-v5.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x40 0x20 0x300 0x80>;
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};
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rtic_d: rtic-d@60 {
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compatible = "fsl,sec-v5.2-rtic-memory",
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"fsl,sec-v5.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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reg = <0x60 0x20 0x500 0x80>;
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};
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};
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};
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sec_mon: sec_mon@314000 {
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compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupts = <93 2 0 0>;
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};
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@@ -14,6 +14,7 @@
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/include/ "qoriq-gpio-1.dtsi"
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/include/ "qoriq-gpio-2.dtsi"
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/include/ "qoriq-gpio-3.dtsi"
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/include/ "qoriq-sec5.0-0.dtsi"
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/* include used FMan blocks */
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/include/ "qoriq-fman3l-0.dtsi"
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@@ -12,6 +12,7 @@
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/include/ "qoriq-gpio-1.dtsi"
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/include/ "qoriq-gpio-2.dtsi"
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/include/ "qoriq-gpio-3.dtsi"
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/include/ "qoriq-sec5.0-0.dtsi"
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/include/ "qoriq-fman3l-0.dtsi"
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/include/ "qoriq-fman3-0-1g-0.dtsi"
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@@ -13,6 +13,7 @@
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/include/ "qoriq-gpio-1.dtsi"
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/include/ "qoriq-gpio-2.dtsi"
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/include/ "qoriq-gpio-3.dtsi"
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/include/ "qoriq-sec5.2-0.dtsi"
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/include/ "qoriq-fman3-0.dtsi"
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/include/ "qoriq-fman3-0-10g-0-best-effort.dtsi"
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@@ -12,6 +12,7 @@
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/include/ "qoriq-gpio-1.dtsi"
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/include/ "qoriq-gpio-2.dtsi"
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/include/ "qoriq-gpio-3.dtsi"
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/include/ "qoriq-sec5.0-0.dtsi"
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/include/ "qoriq-fman3-0.dtsi"
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/include/ "qoriq-fman3-0-1g-0.dtsi"
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