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Updates and added terminal driver for MZ-2000

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This commit is contained in:
Philip Smart
2023-05-10 09:52:17 +01:00
parent b0ad5db6c6
commit 1ff4b558a5
17 changed files with 1043 additions and 578 deletions
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software/FusionX/bin/k64fcpu vendored
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software/FusionX/bin/sharpbiter vendored
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software/FusionX/modules/ttymzdrv.ko vendored
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software/FusionX/modules/z80drv.ko vendored
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software/FusionX/src/ttymz/sharpmz.c
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software/FusionX/src/ttymz/sharpmz.h vendored
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@@ -66,7 +66,7 @@
// Video display constants.
#define VC_MAX_ROWS 25 // Maximum number of rows on display.
#if defined(TARGET_HOST_MZ700)
#if (TARGET_HOST_MZ700 == 1)
#define VC_MAX_COLUMNS 40 // Maximum number of columns on display.
#else
#define VC_MAX_COLUMNS 80 // Maximum number of columns on display.
@@ -78,10 +78,20 @@
#define KEYB_AUTOREPEAT_INITIAL_TIME 800 // Time in milliseconds before starting autorepeat.
#define KEYB_AUTOREPEAT_TIME 100 // Time in milliseconds between auto repeating characters.
#define KEYB_FLASH_TIME 350 // Time in milliseconds for the cursor flash change.
#define CURSOR_THICK_BLOCK 0x43 // Thick block cursor for lower case CAPS OFF
#define CURSOR_BLOCK 0xEF // Block cursor for SHIFT Lock.
#define CURSOR_UNDERLINE 0x3E // Thick underscore for CAPS Lock.
#define MAX_KEYB_BUFFER_SIZE 32 // Maximum size of the keyboard buffer.
#if (TARGET_HOST_MZ80A == 1 || TARGET_HOST_MZ700 == 1)
#define KEY_SCAN_ROWS 10 // Number of rows on keyboard to scan.
#define CURSOR_CHR_THICK_BLOCK 0x43 // Thick block cursor for Shift Lock.
#define CURSOR_CHR_BLOCK 0xEF // Block cursor for CAPS Lock.
#define CURSOR_CHR_GRAPH 0xFF // Graphic cursor for GRAPH mode.
#define CURSOR_CHR_UNDERLINE 0x3E // Underline for lower case CAPS OFF.
#elif (TARGET_HOST_MZ2000 == 1)
#define KEY_SCAN_ROWS 12
#define CURSOR_CHR_THICK_BLOCK 0x1E // Thick block cursor for Shift Lock.
#define CURSOR_CHR_BLOCK 0x82 // Block cursor for CAPS Lock.
#define CURSOR_CHR_GRAPH 0x93 // Graphic cursor for GRAPH mode.
#define CURSOR_CHR_UNDERLINE 0x1F // Underline for lower case CAPS OFF.
#endif
// Audio constants.
#define TIMER_8253_MZ80A_FREQ 2000000 // Base input frequency of Timer 0 for square wave generation.
@@ -134,7 +144,7 @@
#define VMATTR_BG_MASKOUT 0xF8 // Mask to filter out background attribute.
#define VMATTR_BG_MASKIN 0x07 // Mask to filter out background attribute.
// Sharp MZ constants.
// Sharp MZ-80A/700 constants.
//
#define MBADDR_KEYPA 0xE000 // Mainboard 8255 Port A
#define MBADDR_KEYPB 0xE001 // Mainboard 8255 Port B
@@ -156,6 +166,31 @@
#define MBADDR_SCLBASE 0xE2 // High byte scroll base.
#define MBADDR_DSPCTL 0xDFFF // Display 40/80 select register (bit 7)
// Sharp MZ-2000 constants.
#define MBADDR_FDC 0x0D8 // MB8866 IO Region 0D8h - 0DBh
#define MBADDR_FDC_CR MBADDR_FDC + 0x00 // Command Register
#define MBADDR_FDC_STR MBADDR_FDC + 0x00 // Status Register
#define MBADDR_FDC_TR MBADDR_FDC + 0x01 // Track Register
#define MBADDR_FDC_SCR MBADDR_FDC + 0x02 // Sector Register
#define MBADDR_FDC_DR MBADDR_FDC + 0x03 // Data Register
#define MBADDR_FDC_MOTOR MBADDR_FDC + 0x04 // DS[0-3] and Motor control. 4 drives DS= BIT 0 -> Bit 2 = Drive number, 2=1,1=0,0=0 DS0, 2=1,1=0,0=1 DS1 etc
// bit 7 = 1 MOTOR ON LOW (Active)
#define MBADDR_FDC_SIDE MBADDR_FDC + 0x05 // Side select, Bit 0 when set = SIDE SELECT LOW,
#define MBADDR_FDC_DDEN MBADDR_FDC + 0x06 // Double density enable, 0 = double density, 1 = single density disks.
#define MBADDR_PPIA 0x0E0 // 8255 Port A
#define MBADDR_PPIB 0x0E1 // 8255 Port B
#define MBADDR_PPIC 0x0E2 // 8255 Port C
#define MBADDR_PPICTL 0x0E3 // 8255 Control Port
#define MBADDR_PIOA 0x0E8 // Z80 PIO Port A
#define MBADDR_PIOCTLA 0x0E9 // Z80 PIO Port A Control Port
#define MBADDR_PIOB 0x0EA // Z80 PIO Port B
#define MBADDR_PIOCTLB 0x0EB // Z80 PIO Port B Control Port
#define MBADDR_CRTBKCOLR 0x0F4 // Configure external CRT background colour.
#define MBADDR_CRTGRPHPRIO 0x0F5 // Graphics priority register, character or a graphics colour has front display priority.
#define MBADDR_CRTGRPHSEL 0x0F6 // Graphics output select on CRT or external CRT
#define MBADDR_GRAMCOLRSEL 0x0F7 // Graphics RAM colour bank select.
#define MBADDR_GRAMADDRL 0x0C000 // Graphics RAM base address.
//Common character definitions.
#define SCROLL 0x01 // Set scroll direction UP.
#define BELL 0x07
@@ -201,7 +236,7 @@
#define CTRL_Z 0x1A
#define ESC 0x1B
#define CTRL_SLASH 0x1C
#define CTRL_LB 0x1B
#define CTRL_LB 0x1
#define CTRL_RB 0x1D
#define CTRL_CAPPA 0x1E
#define CTRL_UNDSCR 0x1F
@@ -216,15 +251,16 @@
#define FUNC8 0x87
#define FUNC9 0x88
#define FUNC10 0x89
#define PAGEUP 0xE0
#define PAGEDOWN 0xE1
#define CURHOMEKEY 0xE2
#define ALPHAGRAPHKEY 0xE3
#define HOTKEY_ORIGINAL 0xE8
#define HOTKEY_RFS80 0xE9
#define HOTKEY_RFS40 0xEA
#define HOTKEY_TZFS 0xEB
#define HOTKEY_LINUX 0xEC
#define HOTKEY_ORIGINAL 0xE0
#define HOTKEY_RFS80 0xE1
#define HOTKEY_RFS40 0xE2
#define HOTKEY_TZFS 0xE3
#define HOTKEY_LINUX 0xE4
#define PAGEUP 0xE8
#define PAGEDOWN 0xE9
#define CURHOMEKEY 0xEA
#define ALPHAGRAPHKEY 0xEB
#define SHIFTLOCKKEY 0xEC
#define NOKEY 0xF0
#define CURSRIGHT 0xF1
#define CURSLEFT 0xF2
@@ -263,6 +299,58 @@
#define READ_HARDWARE() (\
z80io_PRL_Read8(1)\
)
#define WRITE_HARDWARE_IO(__force__,__addr__,__data__)\
{\
if(!ctrl.suspendIO || __force__ == 1)\
{\
SPI_SEND32((uint32_t)__addr__ << 16 | __data__ << 8 | CPLD_CMD_WRITEIO_ADDR);\
}\
}
#define READ_HARDWARE_IO_INIT(__force__,__addr__)\
{\
if(!ctrl.suspendIO || __force__ == 1)\
{\
SPI_SEND32((uint32_t)__addr__ << 16 | 0x00 << 8 | CPLD_CMD_READIO_ADDR);\
while(CPLD_READY() == 0);\
}\
}
#define READ_HARDWARE_IO() (\
z80io_PRL_Read8(1)\
)
// Video memory macros, allows for options based on host hardware - All Sharp MZ series are very similar.
#if (TARGET_HOST_MZ2000 == 1)
// A7 : H 0xD000:0xD7FF or 0xC000:0xFFFF VRAM paged in.
// A6 : H Select Character VRAM (H) or Graphics VRAM (L)
// A5 : H Select 80 char mode, 40 char mode = L
// A4 : L Select all key strobe lines active, for detection of any key press.
// A3-A0: Keyboard strobe lines
#define ENABLE_VIDEO() {\
display.hwVideoMode = (display.hwVideoMode & 0x3F) | 0xC0;\
WRITE_HARDWARE_IO(0, MBADDR_PIOA, display.hwVideoMode);\
}
#define DISABLE_VIDEO() {\
display.hwVideoMode = (display.hwVideoMode & 0x3F);\
WRITE_HARDWARE_IO(0, MBADDR_PIOA, display.hwVideoMode);\
}
#define WRITE_VRAM_CHAR(__addr__,__data__) WRITE_HARDWARE(0,__addr__,__data__)
#define WRITE_VRAM_ATTRIBUTE(__addr__,__data__) {}
#define WRITE_KEYB_STROBE(__data__)\
{\
display.hwVideoMode = (display.hwVideoMode & 0xF0) | 0x10 | (__data__ & 0x0F);\
WRITE_HARDWARE_IO(0, MBADDR_PIOA, display.hwVideoMode );\
}
#define READ_KEYB_INIT() READ_HARDWARE_IO_INIT(0, MBADDR_PIOB)
#define READ_KEYB() READ_HARDWARE_IO()
#else
#define ENABLE_VIDEO() {}
#define DISABLE_VIDEO() {}
#define WRITE_VRAM_CHAR(__addr__,__data__) WRITE_HARDWARE(0,__addr__,dispCodeMap[__data__].dispCode)
#define WRITE_VRAM_ATTRIBUTE(__addr__,__data__) WRITE_HARDWARE(0,__addr__,__data__)
#define WRITE_KEYB_STROBE(__data__) WRITE_HARDWARE(0, MBADDR_KEYPA, __data__)
#define READ_KEYB_INIT() READ_HARDWARE_INIT(0, MBADDR_KEYPB)
#define READ_KEYB() READ_HARDWARE()
#endif
// Cursor flash mechanism control states.
@@ -316,7 +404,7 @@ typedef struct {
// Mapping table from keyboard scan codes to Sharp MZ keys.
//
typedef struct {
uint8_t scanCode[80];
uint8_t scanCode[KEY_SCAN_ROWS*8];
} t_scanCodeMap;
// Mapping table of a sharp keycode to an ANSI escape sequence string.
@@ -349,16 +437,19 @@ typedef struct {
uint8_t lineWrap; // Wrap line at display edge (1) else stop printing at display edge.
uint8_t useAnsiTerm; // Enable (1) Ansi Terminal Emulator, (0) disable.
uint8_t inDebug; // Prevent recursion when outputting debug information.
// Working variables.
uint8_t hwVideoMode; // Physical configuration of the video control register.
} t_displayBuffer;
// Structure for maintaining the Sharp MZ keyboard parameters and data. Used to retrieve and map a key along with associated
// attributes such as cursor flashing.
//
typedef struct {
uint8_t scanbuf[2][10];
uint8_t keydown[10];
uint8_t keyup[10];
uint8_t keyhold[10];
uint8_t scanbuf[2][KEY_SCAN_ROWS];
uint8_t keydown[KEY_SCAN_ROWS];
uint8_t keyup[KEY_SCAN_ROWS];
uint8_t keyhold[KEY_SCAN_ROWS];
uint32_t holdTimer;
uint8_t breakKey; // Break key pressed.
uint8_t ctrlKey; // Ctrl key pressed.
@@ -398,10 +489,10 @@ typedef struct {
uint8_t setDisplayMode; // Display mode command detected.
uint8_t setExtendedMode; // Extended mode command detected.
uint8_t charbuf[80]; // Storage for the parameter characters as they are received.
uint16_t param[10]; // Parsed paraemters.
uint16_t param[10]; // Parsed parameters.
uint8_t saveRow; // Store the current row when requested.
uint8_t saveCol; // Store the current column when requested.
uint8_t saveDisplayRow; // Store the current display buffer row when requested.
uint8_t saveDisplayRow; // Store the current display buffer row when requested.
} t_AnsiTerm;
// Application execution constants.

1
software/FusionX/src/ttymz/ttymz.c
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@@ -18,6 +18,7 @@
// switching between a Linux session and a Z80 session, the idea
// being the TTY will continue to run within the mirrored framebuffer
// and when reselected, refresh the hardware screen.
// Apr 2023 - v1.1 Updated to include MZ-2000 mode.
//
// Notes: See Makefile to enable/disable conditional components
//

5
software/FusionX/src/ttymz/ttymz.h vendored
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@@ -11,6 +11,7 @@
// Copyright: (c) 2019-2023 Philip Smart <philip.smart@net2net.org>
//
// History: Feb 2023 - v1.0 Initial write of the Sharp MZ tty driver software.
// Apr 2023 - v1.1 Updated to include MZ-2000 mode.
//
// Notes: See Makefile to enable/disable conditional components
//
@@ -35,8 +36,8 @@
#define DRIVER_LICENSE "GPL"
#define DRIVER_AUTHOR "Philip D Smart"
#define DRIVER_DESCRIPTION "Sharp MZ TTY Driver"
#define DRIVER_VERSION "v1.01"
#define DRIVER_VERSION_DATE "Mar 2023"
#define DRIVER_VERSION "v1.1"
#define DRIVER_VERSION_DATE "Apr 2023"
#define DRIVER_COPYRIGHT "(C) 2018-2023"
#define DEVICE_NAME "ttymz"
#define DRIVER_NAME "SharpMZ_tty"

25
software/FusionX/src/z80drv/src/k64fcpu.c
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@@ -19,6 +19,7 @@
// History: Feb 2023 v1.0 - Source copied from zSoft and modified to run as a daemon, stripping
// out all low level control methods.
// v1.01 - Updates to make compatible with the TZFS changes.
// Apr v1.02 - Updates to add MZ-2000 servicing.
//
// Notes: See Makefile to enable/disable conditional components
//
@@ -64,7 +65,7 @@ extern "C" {
#include "z80driver.h"
#include "tzpu.h"
#define VERSION "1.01"
#define VERSION "1.02"
#define AUTHOR "P.D.Smart"
#define COPYRIGHT "(c) 2018-23"
@@ -2402,6 +2403,7 @@ void processServiceRequest(void)
// Update the service control record address according to memory mode.
//
z80Control.svcControlAddr = getServiceAddr();
printf("Service Addr:%04x\n", z80Control.svcControlAddr);
// Get the command and associated parameters.
copyFromZ80((uint8_t *)&svcControl, z80Control.svcControlAddr, TZSVC_CMD_SIZE, TRANZPUTER);
@@ -2411,7 +2413,7 @@ void processServiceRequest(void)
{
copyFromZ80((uint8_t *)&svcControl.sector, z80Control.svcControlAddr+TZSVC_CMD_SIZE, TZSVC_SECTOR_SIZE, TRANZPUTER);
}
printf("Received command:%02x\n", svcControl.cmd);
//memoryDump((uint32_t)&svcControl, sizeof(svcControl), 5, 8, 0, 0);
// Check this is a valid request.
if(svcControl.result == TZSVC_STATUS_REQUEST)
@@ -2560,7 +2562,7 @@ void processServiceRequest(void)
break;
// Load the MZ-2000 IPL ROM into memory for compatibility switch.
case TZSVC_CMD_LOAD2000IPL:
case TZSVC_CMD_LOAD2KIPL:
loadBIOS((const char *)OS_BASE_DIR TZSVC_DEFAULT_TZFS_DIR "/" MZ_ROM_MZ2000_IPL, MZ_MROM_ADDR);
// Set the frequency of the CPU if we are emulating the hardware.
@@ -2570,6 +2572,21 @@ void processServiceRequest(void)
setZ80CPUFrequency(MZ_2000_CPU_FREQ, 1);
}
break;
// Load the MZ-2000 Basic 1Z001 into memory.
case TZSVC_CMD_LOAD2KBASIC1:
loadBIOS((const char *)OS_BASE_DIR TZSVC_DEFAULT_ROM_DIR "/" MZ_ROM_MZ2000_1Z001, MZ_MROM_ADDR);
break;
// Load the MZ-2000 Basic 1Z002 into memory.
case TZSVC_CMD_LOAD2KBASIC2:
loadBIOS((const char *)OS_BASE_DIR TZSVC_DEFAULT_ROM_DIR "/" MZ_ROM_MZ2000_1Z002, MZ_MROM_ADDR);
break;
// Load the MZ-2000 1Z001M Monitor ROM into memory.
case TZSVC_CMD_LOAD2KMON:
loadBIOS((const char *)OS_BASE_DIR TZSVC_DEFAULT_ROM_DIR "/" MZ_ROM_MZ2000_1Z001M, MZ_MROM_ADDR);
break;
// Load TZFS upon request. This service is for the MZ-80B/MZ-2000 which dont have a monitor BIOS installed and TZFS isnt loaded upon reset but rather through user request.
case TZSVC_CMD_LOADTZFS:
@@ -2709,6 +2726,8 @@ void processServiceRequest(void)
printf("Error: Unsupported Raw SD Write feature.\n");
break;
// Load
// Command to exit from TZFS and return machine to original mode.
case TZSVC_CMD_EXIT:
// Disable secondary frequency.

1
software/FusionX/src/z80drv/src/sharpbiter.c
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@@ -20,6 +20,7 @@
// Copyright: (c) 2019-2023 Philip Smart <philip.smart@net2net.org>
//
// History: Feb 2023 v1.0 - Initial write.
// Apr 2023 v1.1 - Updates to include MZ-2000.
//
// Notes: See Makefile to enable/disable conditional components
//

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software/FusionX/src/z80drv/src/tzpu.h vendored
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@@ -321,7 +321,11 @@
// Service request constants.
//
#define TZSVC_CMD_STRUCT_ADDR_TZFS 0x0ED80 // Address of the command structure within TZFS - exists in 64K Block 0.
#if (TARGET_HOST_MZ2000 == 1)
#define TZSVC_CMD_STRUCT_ADDR_TZFS 0x06D80 // Address of the command structure within MZ-2000 IPL Mode
#else
#define TZSVC_CMD_STRUCT_ADDR_TZFS 0x0ED80 // Address of the command structure within TZFS - exists in 64K Block 0.
#endif
#define TZSVC_CMD_STRUCT_ADDR_CPM 0x4F560 // Address of the command structure within CP/M - exists in 64K Block 4.
#define TZSVC_CMD_STRUCT_ADDR_MZ700 0x6FD80 // Address of the command structure within MZ700 compatible programs - exists in 64K Block 6.
#define TZSVC_CMD_STRUCT_ADDR_ZOS 0x11FD80 // 0x7FD80 // Address of the command structure for zOS use, exists in shared memory rather than FPGA. Spans top of block 6 and all of block 7.
@@ -351,7 +355,10 @@
#define TZSVC_CMD_LOAD700BIOS80 0x23 // Service command requesting that the MZ700 1Z-013A 80 column patched BIOS is loaded.
#define TZSVC_CMD_LOAD80BIPL 0x24 // Service command requesting the MZ-80B IPL is loaded.
#define TZSVC_CMD_LOAD800BIOS 0x25 // Service command requesting that the MZ800 9Z-504M BIOS is loaded.
#define TZSVC_CMD_LOAD2000IPL 0x26 // Service command requesting the MZ-2000 IPL is loaded.
#define TZSVC_CMD_LOAD2KIPL 0x26 // Service command requesting the MZ-2000 IPL is loaded.
#define TZSVC_CMD_LOAD2KBASIC1 0x27 // Service command to load BASIC 1Z-001 for the MZ-2000.
#define TZSVC_CMD_LOAD2KBASIC2 0x28 // Service command to load BASIC 1Z-002 for the MZ-2000.
#define TZSVC_CMD_LOAD2KMON 0x29 // Service command to load Monitor 1Z001M for the MZ-2000 IPL.
#define TZSVC_CMD_LOADTZFS 0x2F // Service command requesting the loading of TZFS. This service is for machines which normally dont have a monitor BIOS. ie. MZ-80B/MZ-2000 and manually request TZFS.
#define TZSVC_CMD_LOADBDOS 0x30 // Service command to reload CPM BDOS+CCP.
#define TZSVC_CMD_ADDSDDRIVE 0x31 // Service command to attach a CPM disk to a drive number.
@@ -379,6 +386,7 @@
#define TZSVC_CMD_SD_WRITESECTOR 0x62 // Service command to provide raw write access to the underlying SD card.
#define TZSVC_CMD_EXIT 0x7F // Service command to terminate TZFS and restart the machine in original mode.
#define TZSVC_DEFAULT_TZFS_DIR "TZFS" // Default directory where TZFS files are stored.
#define TZSVC_DEFAULT_ROM_DIR "ROMS" // Default directory where ROM files are stored.
#define TZSVC_DEFAULT_CPM_DIR "CPM" // Default directory where CPM files are stored.
#define TZSVC_DEFAULT_MZF_DIR "MZF" // Default directory where MZF files are stored.
#define TZSVC_DEFAULT_CAS_DIR "CAS" // Default directory where BASIC CASsette files are stored.
@@ -423,6 +431,9 @@
#define MZ_ROM_MZ2000_IPL_TZPU "MZ2000_IPL_TZPU.rom" // Modified IPL ROM for the tranZPUter running on the Sharp MZ-2000.
#define MZ_ROM_MZ2000_CGROM "MZ2000_CGROM.rom" // MZ-2000 CGROM.
#define MZ_ROM_TZFS "tzfs.rom" // tranZPUter Filing System ROM.
#define MZ_ROM_MZ2000_1Z001 "mz2000_basic_1z001.rom" // MZ-2000 BASIC 1Z-001.
#define MZ_ROM_MZ2000_1Z002 "mz2000_basic_1z002.rom" // MZ-2000 BASIC 1Z-002.
#define MZ_ROM_MZ2000_1Z001M "mz2000_mon_1z001m.rom" // MZ-2000 BASIC 1Z-002.
// CP/M constants.
//

145
software/FusionX/src/z80drv/src/z80driver.c
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@@ -13,31 +13,32 @@
// Copyright: (c) 2019-2023 Philip Smart <philip.smart@net2net.org>
// (c) 1999-2023 Manuel Sainz de Baranda y Goñi
//
// History: Oct 2022 - v1.0 Initial write of the z80 kernel driver software.
// Jan 2023 - v1.1 Added MZ-2000/MZ-80A modes. There are serious limitations with the
// SSD202 I/O. The I/O Bus appears to run at 72MHz and the GPIO bits
// are split across 2x16 registers per bit. This limits 8bit read
// speed to < 2MB/s, write speed slower due to select signal. Thus it
// is not feasible to run a program in the host memory at full speed.
// Virtual (Kernel) memory is used for all programs and host is only
// accessed for specific reasons, such as the MZ-80A FDD Bios which
// changes according to state of READY signal. I/O operations have to
// use lookahead during fetch cycle to steal time in order to meet timings.
// If SigmaStar make a newer SSD or an alternative becomes available which
// has I/O bus running at 4x speed or has 32bit per cycle GPIO access then
// the design needs to be upgraded to fulfill the idea of running programs
// in host memory at full speed.
// Feb 2023 - v1.2 Added MZ-80A Rom Filing System device driver. This allows the FusionX
// hosted in an MZ-80A to run the original RFS Monitor and software.
// Feb 2023 - v1.3 Added tranZPUter SW device driver. This allows the FusionX hosted
// in any supported host to run TZFS and the updated applications
// such as CP/M, SA-5510 Basic, MS-Basic etc. Adding this device driver
// prepares the ground to add the SOM GPU as the Video emulation of
// the Sharp machines.
// Mar 2023 - v1.4 With the advent of the PCW-8XXX series, seperated distinct machine
// configurations into device driver modules, which are only built
// if same as the target machine. This then allows the z80 driver to be
// a vanilla Z80 or customisations for hosts pulled in.
// History: Oct 2022 - v1.0 Initial write of the z80 kernel driver software.
// Jan 2023 - v1.1 Added MZ-2000/MZ-80A modes. There are serious limitations with the
// SSD202 I/O. The I/O Bus appears to run at 72MHz and the GPIO bits
// are split across 2x16 registers per bit. This limits 8bit read
// speed to < 2MB/s, write speed slower due to select signal. Thus it
// is not feasible to run a program in the host memory at full speed.
// Virtual (Kernel) memory is used for all programs and host is only
// accessed for specific reasons, such as the MZ-80A FDD Bios which
// changes according to state of READY signal. I/O operations have to
// use lookahead during fetch cycle to steal time in order to meet timings.
// If SigmaStar make a newer SSD or an alternative becomes available which
// has I/O bus running at 4x speed or has 32bit per cycle GPIO access then
// the design needs to be upgraded to fulfill the idea of running programs
// in host memory at full speed.
// Feb 2023 - v1.2 Added MZ-80A Rom Filing System device driver. This allows the FusionX
// hosted in an MZ-80A to run the original RFS Monitor and software.
// Feb 2023 - v1.3 Added tranZPUter SW device driver. This allows the FusionX hosted
// in any supported host to run TZFS and the updated applications
// such as CP/M, SA-5510 Basic, MS-Basic etc. Adding this device driver
// prepares the ground to add the SOM GPU as the Video emulation of
// the Sharp machines.
// Mar 2023 - v1.4 With the advent of the PCW-8XXX series, seperated distinct machine
// configurations into device driver modules, which are only built
// if same as the target machine. This then allows the z80 driver to be
// a vanilla Z80 or customisations for hosts pulled in.
// Apr 2023 - v1.4.1 Completed MZ2000 mode to work with arbiter and ttymz.
//
//
// Notes: See Makefile to enable/disable conditional components
@@ -526,6 +527,8 @@ static zuint8 z80_read(void *context, zuint16 address)
Z80Ctrl->keyportTrigger = 0;
}
}
#elif (TARGET_HOST_MZ2000 == 1)
#endif
#if(DEBUG_ENABLED & 1)
@@ -807,6 +810,31 @@ static zuint8 z80_in(void *context, zuint16 port)
// Finally ensure the data from the port is ready and retrieve it.
while(CPLD_READY() == 0);
value = z80io_PRL_Read();
#if (TARGET_HOST_MZ2000 == 1)
// Keyport data? Store.
if((port&0xff) == 0xEA)
{
// If this is the CTRL key row, check the CTRL key.
if((Z80Ctrl->keyportStrobe & 0x1f) == 0x1b)
{
Z80Ctrl->keyportShiftCtrl = (value & 0x08) == 0 ? 0x01 : 0x00;
if(Z80Ctrl->keyportShiftCtrl == 1)
{
Z80Ctrl->keyportTrigger = 0;
}
} else
// If CTRL key is held and we scan the Function Key Row (not all keys mode), then action the pressed key.
if(Z80Ctrl->keyportShiftCtrl == 1 && (Z80Ctrl->keyportStrobe & 0x1f) == 0x10 && (value&0x0f) != 0x0f)
{
Z80Ctrl->keyportHotKey = (value & 0x01) == 0 ? HOTKEY_ORIGINAL :
// (value & 0x02) == 0 ? HOTKEY_RFS40 :
// (value & 0x04) == 0 ? HOTKEY_TZFS :
(value & 0x08) == 0 ? HOTKEY_LINUX : 0x00;
Z80Ctrl->keyportTrigger = Z80Ctrl->keyportHotKey;
}
}
#endif
} else
// Virtual I/O Port.
if(isVirtualIO(port))
@@ -854,6 +882,14 @@ static void z80_out(void *context, zuint16 port, zuint8 value)
// Decode address to action any host specific memory map changes.
decodeMemoryMapSetup(port, value, 1, false);
#endif
#if (TARGET_HOST_MZ2000 == 1)
// To detect Hotkey presses, we need to store the keyboard strobe data and on keydata read.
if((port&0xff) == 0xE8)
{
Z80Ctrl->keyportStrobe = value;
}
#endif
} else
if(isVirtualIO(port))
{
@@ -1007,39 +1043,38 @@ int thread_z80(void * thread_nr)
// Reset pressed?
if(CPLD_RESET())
{
resetZ80();
// Wait for release before restarting CPU.
while(CPLD_RESET());
} else
{
// Update state to indicate request has been actioned.
mutex_lock(&Z80RunModeMutex);
if(Z80RunMode == Z80_STOP) Z80RunMode = Z80_STOPPED;
if(Z80RunMode == Z80_PAUSE) Z80RunMode = Z80_PAUSED;
if(Z80RunMode == Z80_CONTINUE) Z80RunMode = Z80_RUNNING;
if(Z80RunMode == Z80_RUNNING) canRun=1; else canRun=0;
mutex_unlock(&Z80RunModeMutex);
#if (TARGET_HOST_MZ80A == 1 || TARGET_HOST_MZ700 == 1)
// Hotkey pressed? Bring up user menu.
if(Z80Ctrl->keyportTrigger != 0x00 && Z80Ctrl->keyportTriggerLast == 0)
{
z80menu();
// Send signal to arbiter to change run mode.
sendSignal(Z80Ctrl->arbTask, SIGUSR1);
Z80Ctrl->keyportShiftCtrl = 0;
// Suspend processing until arbiter sets up new environment.
mutex_lock(&Z80RunModeMutex);
Z80RunMode = Z80_STOPPED;
canRun = 0;
mutex_unlock(&Z80RunModeMutex);
}
Z80Ctrl->keyportTriggerLast = Z80Ctrl->keyportTrigger;
#endif
resetZ80();
}
// Update state to indicate request has been actioned.
mutex_lock(&Z80RunModeMutex);
if(Z80RunMode == Z80_STOP) Z80RunMode = Z80_STOPPED;
if(Z80RunMode == Z80_PAUSE) Z80RunMode = Z80_PAUSED;
if(Z80RunMode == Z80_CONTINUE) Z80RunMode = Z80_RUNNING;
if(Z80RunMode == Z80_RUNNING) canRun=1; else canRun=0;
mutex_unlock(&Z80RunModeMutex);
#if (TARGET_HOST_MZ80A == 1 || TARGET_HOST_MZ700 == 1 || TARGET_HOST_MZ2000 == 1)
// Hotkey pressed? Bring up user menu.
if(Z80Ctrl->keyportTrigger != 0x00 && Z80Ctrl->keyportTriggerLast == 0)
{
z80menu();
// Send signal to arbiter to change run mode.
sendSignal(Z80Ctrl->arbTask, SIGUSR1);
Z80Ctrl->keyportShiftCtrl = 0;
// Suspend processing until arbiter sets up new environment.
mutex_lock(&Z80RunModeMutex);
Z80RunMode = Z80_STOPPED;
canRun = 0;
mutex_unlock(&Z80RunModeMutex);
}
Z80Ctrl->keyportTriggerLast = Z80Ctrl->keyportTrigger;
#endif
}
// Release spinlock as we are unloading driver.
@@ -1388,7 +1423,7 @@ void setupMemory(enum Z80_MEMORY_PROFILE mode)
else
#endif
// tranZPUter operates in all supported Sharp machines.
#if(TARGET_HOST_PCW == 0)
#if(TARGET_HOST_MZ80A == 1 || TARGET_HOST_MZ700 == 1)
if(Z80Ctrl->virtualDeviceBitMap & VIRTUAL_DEVICE_TZPU)
tzpuSetupMemory(mode);
else

25
software/FusionX/src/z80drv/src/z80driver.h vendored
View File

@@ -12,9 +12,10 @@
// Copyright: (c) 2019-2023 Philip Smart <philip.smart@net2net.org>
// (c) 1999-2023 Manuel Sainz de Baranda y Goñi
//
// History: Oct 2022 - v1.0 Initial write of the z80 kernel driver software.
// Jan 2023 - v1.1 Added MZ-2000/MZ-80A modes.
// Feb 2023 - v1.2 Added RFS virtual driver.
// History: Oct 2022 - v1.0 Initial write of the z80 kernel driver software.
// Jan 2023 - v1.1 Added MZ-2000/MZ-80A modes.
// Feb 2023 - v1.2 Added RFS virtual driver.
// Apr 2023 - v1.4.1 Completed MZ2000 mode to work with arbiter and ttymz.
//
// Notes: See Makefile to enable/disable conditional components
//
@@ -67,7 +68,7 @@
#define DRIVER_LICENSE "GPL"
#define DRIVER_AUTHOR "Philip D Smart"
#define DRIVER_DESCRIPTION "Z80 CPU Emulator and Hardware Interface Driver"
#define DRIVER_VERSION "v1.4"
#define DRIVER_VERSION "v1.4.1"
#define DRIVER_VERSION_DATE "Apr 2023"
#define DRIVER_COPYRIGHT "(C) 2018-2023"
#define Z80_VIRTUAL_ROM_SIZE (65536 * 32) // Sized to maximum Kernel contiguous allocation size, 2M which is 4x512K ROMS.
@@ -99,11 +100,11 @@
#define IO_TYPE_VIRTUAL_HW 0x40000000
// Hotkeys handled.
#define HOTKEY_ORIGINAL 0xE8
#define HOTKEY_RFS40 0xE9
#define HOTKEY_RFS80 0xEA
#define HOTKEY_TZFS 0xEB
#define HOTKEY_LINUX 0xEC
#define HOTKEY_ORIGINAL 0xE0
#define HOTKEY_RFS40 0xE1
#define HOTKEY_RFS80 0xE2
#define HOTKEY_TZFS 0xE3
#define HOTKEY_LINUX 0xE4
//*********************************************************************************************
// Delay periods for the various hosts, which need adding to the primary opcode fetch in
@@ -310,7 +311,7 @@ enum Z80_INSTRUCTION_DELAY {
#define INSTRUCTION_DELAY_ROM_64MHZ 14
#define INSTRUCTION_DELAY_ROM_128MHZ 7
#define INSTRUCTION_DELAY_ROM_256MHZ 3
#define INSTRUCTION_DELAY_RAM_2MHZ 425
#define INSTRUCTION_DELAY_RAM_2MHZ 429
#define INSTRUCTION_DELAY_RAM_4MHZ 210
#define INSTRUCTION_DELAY_RAM_8MHZ 105
#define INSTRUCTION_DELAY_RAM_16MHZ 52
@@ -573,12 +574,12 @@ enum Z80_INSTRUCTION_DELAY {
}
#define resetZ80() {\
setupMemory(Z80Ctrl->defaultPageMode);\
z80_instant_reset(&Z80CPU);\
if(Z80Ctrl->virtualDeviceBitMap & VIRTUAL_DEVICE_TZPU)\
{\
Z80RunMode = Z80_STOPPED;\
sendSignal(Z80Ctrl->ioTask, SIGUSR1); \
udelay(2000);\
}\
z80_instant_reset(&Z80CPU);\
}
#define IO_ADDR_E0 0xE0

116
software/FusionX/src/z80drv/src/z80vhw_mz2000.c
View File

@@ -51,16 +51,50 @@
#include <infinity2m/gpio.h>
#include <infinity2m/registers.h>
#include "tzpu.h"
// Device constants.
#define RAM_BASE_ADDR 0x00000 // Base address of the 512K RAM.
// System ROM's, either use the host machine ROM or preload a ROM image.
#define ROM_DIR "/apps/FusionX/host/MZ-2000/ROMS/"
#define ROM_IPL_ORIG_FILENAME ROM_DIR "mz2000_ipl.orig"
#define ROM_IPL_ORIG_FILENAME ROM_DIR "mz2000_ipl_original.rom"
#define ROM_IPL_FUSIONX_FILENAME ROM_DIR "mz2000_ipl_fusionx.rom"
#define ROM_IPL_TZPU_FILENAME ROM_DIR "mz2000_ipl_tzpu.rom"
#define ROM_1Z001M_FILENAME ROM_DIR "1Z001M.rom"
// Boot ROM rom load and size definitions.
#define ROM_BOOT_LOAD_ADDR 0x000000
#define ROM_BOOT_SIZE 0x800
#define ROM_1Z001M_LOAD_ADDR 0x000000
#define ROM_ORIG_BOOT_SIZE 0x800
#define ROM_TZPU_BOOT_SIZE 0x1000
#define ROM_FUSIONX_BOOT_SIZE 0x1000
#define ROM_1Z001M_BOOT_SIZE 0x10FB
// Sharp MZ-2000 constants.
#define MBADDR_FDC 0x0D8 // MB8866 IO Region 0D8h - 0DBh
#define MBADDR_FDC_CR MBADDR_FDC + 0x00 // Command Register
#define MBADDR_FDC_STR MBADDR_FDC + 0x00 // Status Register
#define MBADDR_FDC_TR MBADDR_FDC + 0x01 // Track Register
#define MBADDR_FDC_SCR MBADDR_FDC + 0x02 // Sector Register
#define MBADDR_FDC_DR MBADDR_FDC + 0x03 // Data Register
#define MBADDR_FDC_MOTOR MBADDR_FDC + 0x04 // DS[0-3] and Motor control. 4 drives DS= BIT 0 -> Bit 2 = Drive number, 2=1,1=0,0=0 DS0, 2=1,1=0,0=1 DS1 etc
// bit 7 = 1 MOTOR ON LOW (Active)
#define MBADDR_FDC_SIDE MBADDR_FDC + 0x05 // Side select, Bit 0 when set = SIDE SELECT LOW,
#define MBADDR_FDC_DDEN MBADDR_FDC + 0x06 // Double density enable, 0 = double density, 1 = single density disks.
#define MBADDR_PPIA 0x0E0 // 8255 Port A
#define MBADDR_PPIB 0x0E1 // 8255 Port B
#define MBADDR_PPIC 0x0E2 // 8255 Port C
#define MBADDR_PPICTL 0x0E3 // 8255 Control Port
#define MBADDR_PIOA 0x0E8 // Z80 PIO Port A
#define MBADDR_PIOCTLA 0x0E9 // Z80 PIO Port A Control Port
#define MBADDR_PIOB 0x0EA // Z80 PIO Port B
#define MBADDR_PIOCTLB 0x0EB // Z80 PIO Port B Control Port
#define MBADDR_CRTBKCOLR 0x0F4 // Configure external CRT background colour.
#define MBADDR_CRTGRPHPRIO 0x0F5 // Graphics priority register, character or a graphics colour has front display priority.
#define MBADDR_CRTGRPHSEL 0x0F6 // Graphics output select on CRT or external CRT
#define MBADDR_GRAMCOLRSEL 0x0F7 // Graphics RAM colour bank select.
#define MBADDR_GRAMADDRL 0x0C000 // Graphics RAM base address.
// PCW control.
typedef struct {
@@ -84,9 +118,6 @@ void mz2000SetupMemory(enum Z80_MEMORY_PROFILE mode)
// Locals.
uint32_t idx;
// The PCW contains upto 512KB of standard RAM which can be expnded to a physical max of 2MB. The kernel malloc limit is 2MB so the whole virtual
// memory can be mapped into the PCW memory address range.
// Setup defaults.
MZ2000Ctrl.lowMemorySwap = 0x01; // Set memory swap flag to swapped, ie. IPL mode sees DRAM 0x0000:0x7FFF swapped to 0x8000:0xFFFF and ROM pages into 0x0000.
MZ2000Ctrl.highMemoryVRAM = 0x00;
@@ -148,12 +179,22 @@ void mz2000SetupMemory(enum Z80_MEMORY_PROFILE mode)
Z80Ctrl->refreshDRAM = 2;
}
// tranZPUter I/O Ports need to be declared virtual to process locally.
for(idx=0x0000; idx < IO_PAGE_SIZE; idx+=0x0100)
{
Z80Ctrl->iopage[idx+IO_TZ_SVCREQ] = IO_TZ_SVCREQ | IO_TYPE_VIRTUAL_HW;
Z80Ctrl->iopage[idx+IO_TZ_SYSREQ] = IO_TZ_SYSREQ | IO_TYPE_VIRTUAL_HW;
}
// Ensure 40 char mode is enabled.
// SPI_SEND_32(MBADDR_PIOA, 0x13);
pr_info("MZ-2000 Memory Setup complete.\n");
}
// Method to load a ROM image into the RAM memory.
//
uint8_t mz2000LoadROM(const char* romFileName, uint32_t loadAddr, uint32_t loadSize)
uint8_t mz2000LoadROM(const char* romFileName, uint8_t useROM, uint32_t loadAddr, uint32_t loadSize)
{
// Locals.
uint8_t result = 0;
@@ -168,10 +209,10 @@ uint8_t mz2000LoadROM(const char* romFileName, uint32_t loadAddr, uint32_t loadS
} else
{
vfs_llseek(fp, 0, SEEK_SET);
noBytes = kernel_read(fp, fp->f_pos, &Z80Ctrl->ram[loadAddr], loadSize);
noBytes = kernel_read(fp, fp->f_pos, useROM == 1 ? &Z80Ctrl->rom[loadAddr] : &Z80Ctrl->ram[loadAddr], loadSize);
if(noBytes < loadSize)
{
pr_info("Short load, ROM Image:%s, bytes loaded:%08x\n:", romFileName, loadSize);
pr_info("Short load, Image:%s, bytes loaded:%08x\n:", romFileName, loadSize);
}
filp_close(fp,NULL);
}
@@ -185,6 +226,35 @@ void mz2000Init(uint8_t mode)
// Locals.
uint32_t idx;
// // Initialise the Z80 PIO/8255 controllers.
// //
// SPI_SEND_32(MBADDR_PPICTL, 0x82); // 8255 A=OUT B=IN C=OUT
// SPI_SEND_32(MBADDR_PPIC, 0x58); // BST=1 NST=0 OPEN=1 WRITE=1
// SPI_SEND_32(MBADDR_PPIA, 0xF7); // All signals inactive, stop cassette.
// SPI_SEND_32(MBADDR_PIOCTLA, 0x0F); // Setup PIO A
// SPI_SEND_32(MBADDR_PIOCTLB, 0xCF); // Setup PIO B
// SPI_SEND_32(MBADDR_PIOCTLB, 0xFF);
//
// // Initialise video hardware.
// //
// SPI_SEND_32(MBADDR_CRTGRPHSEL, 0x00); // Set Graphics VRAM to default, no access to GRAM.
// SPI_SEND_32(MBADDR_CRTBKCOLR, 0x00); // Set background colour on external output to black.
// SPI_SEND_32(MBADDR_GRAMCOLRSEL, 0x01); // Activate Blue graphics RAM bank for graphics operations (this is the default installed bank, red and green are optional).
// SPI_SEND_32(MBADDR_CRTGRPHPRIO, 0x07); // Enable all colour bank graphic output with character priority.
// SPI_SEND_32(MBADDR_PIOA, 0x13); // A7 : H 0xD000:0xD7FF or 0xC000:0xFFFF VRAN paged in.
// // A6 : H Select Character VRAM (H) or Graphics VRAM (L)
// // A5 : H Select 80 char mode, 40 char mode = L
// // A4 : L Select all key strobe lines active, for detection of any key press.
// // A3-A0: Keyboard strobe lines
// SPI_SEND_32(MBADDR_PPIA, 0xFF); // A7 : L APSS Search for next program
// // A6 : L Automatic playback at end of rewind
// // A5 : L Automatic rewind during playback(recording)
// // A4 : L Invert Video
// // A3 : L Stop Cassette
// // A2 : L Play Cassette
// // A1 : L Fast Forward
// // A0 : L Rewind
// Initialise the virtual RAM from the HOST DRAM. This is to maintain compatibility as some applications (in my experience) have
// bugs, which Im putting down to not initialising variables. The host DRAM is in a pattern of 0x00..0x00, 0xFF..0xFF repeating
// when first powered on.
@@ -226,8 +296,11 @@ void mz2000Init(uint8_t mode)
// Initial memory config.
mz2000SetupMemory(Z80Ctrl->defaultPageMode);
// mz2000LoadROM(ROM_IPL_ORIG_FILENAME, ROM_BOOT_LOAD_ADDR, ROM_BOOT_SIZE);
// Overwrite the ROM with a modified version (comment out) if needed.
//mz2000LoadROM(ROM_IPL_ORIG_FILENAME, ROM_BOOT_LOAD_ADDR, ROM_ORIG_BOOT_SIZE);
//mz2000LoadROM(ROM_IPL_TZPU_FILENAME, ROM_BOOT_LOAD_ADDR, ROM_TZPU_BOOT_SIZE);
mz2000LoadROM(ROM_IPL_FUSIONX_FILENAME, 1, ROM_BOOT_LOAD_ADDR, ROM_FUSIONX_BOOT_SIZE);
pr_info("Enabling MZ-2000 driver.\n");
return;
@@ -299,6 +372,7 @@ static inline void mz2000DecodeMemoryMapSetup(zuint16 address, zuint8 data, uint
// NST pages in all RAM and resets cpu.
if(data & 0x01)
{
pr_info("NST Reset\n");
MZ2000Ctrl.lowMemorySwap = 0;
for(idx=0x0000; idx < 0x10000; idx+=MEMORY_BLOCK_GRANULARITY)
{
@@ -320,6 +394,7 @@ static inline void mz2000DecodeMemoryMapSetup(zuint16 address, zuint8 data, uint
// If IPL is active (L), reconfigure memory for power on state.
if((data & 0x01) == 0)
{
pr_info("IPL Reset\n");
mz2000SetupMemory(Z80Ctrl->defaultPageMode);
}
break;
@@ -415,9 +490,28 @@ static inline void mz2000Write(zuint16 address, zuint8 data, uint8_t ioFlag)
// I/O Operation?
if(ioFlag)
{
switch(address)
// Only the lower 8 bits of the I/O address are processed as the upper byte is not used in the Sharp models.
//
switch(address & 0x00FF)
{
case IO_TZ_SVCREQ:
#if(DEBUG_ENABLED & 0x01)
if(Z80Ctrl->debug >= 3) pr_info("SVCREQ:%02x\n", data);
#endif
// If a k64f process has registered, send it a service request signal.
pr_info("Sending signal,%02x\n", data);
sendSignal(Z80Ctrl->ioTask, SIGIO);
break;
case IO_TZ_SYSREQ:
#if(DEBUG_ENABLED & 0x01)
if(Z80Ctrl->debug >= 3) pr_info("SYSREQ:%02x\n", data);
#endif
break;
default:
pr_info("PORT:%02x\n", data);
break;
}
} else

48
software/FusionX/src/z80drv/src/z80vhw_mz700.c
View File

@@ -74,9 +74,6 @@ void mz700SetupMemory(enum Z80_MEMORY_PROFILE mode)
// Locals.
uint32_t idx;
// The PCW contains upto 512KB of standard RAM which can be expnded to a physical max of 2MB. The kernel malloc limit is 2MB so the whole virtual
// memory can be mapped into the PCW memory address range.
// Setup defaults.
MZ700Ctrl.regCtrl = 0x00;
@@ -196,6 +193,9 @@ void mz700Init(uint8_t mode)
// Locals.
uint32_t idx;
// Reset memory paging to default.
SPI_SEND_32(0x00e4, 0x00 << 8 | CPLD_CMD_WRITEIO_ADDR);
// Initialise the virtual RAM from the HOST DRAM. This is to maintain compatibility as some applications (in my experience) have
// bugs, which Im putting down to not initialising variables. The host DRAM is in a pattern of 0x00..0x00, 0xFF..0xFF repeating
// when first powered on.
@@ -230,29 +230,27 @@ void mz700Init(uint8_t mode)
}
}
// Add in a test program to guage execution speed.
#if(TARGET_HOST_MZ700 == 1)
Z80Ctrl->ram[0x1200] = 0x01;
Z80Ctrl->ram[0x1201] = 0x86;
Z80Ctrl->ram[0x1202] = 0xf2;
Z80Ctrl->ram[0x1203] = 0x3e;
Z80Ctrl->ram[0x1204] = 0x15;
Z80Ctrl->ram[0x1205] = 0x3d;
Z80Ctrl->ram[0x1206] = 0x20;
Z80Ctrl->ram[0x1207] = 0xfd;
Z80Ctrl->ram[0x1208] = 0x0b;
Z80Ctrl->ram[0x1209] = 0x78;
Z80Ctrl->ram[0x120a] = 0xb1;
Z80Ctrl->ram[0x120b] = 0x20;
Z80Ctrl->ram[0x120c] = 0xf6;
Z80Ctrl->ram[0x120d] = 0xc3;
Z80Ctrl->ram[0x120e] = 0x00;
Z80Ctrl->ram[0x120f] = 0x00;
#endif
// Reset memory paging to default.
SPI_SEND_32(0x00e4, 0x00 << 8 | CPLD_CMD_WRITEIO_ADDR);
// Initial memory config.
mz700SetupMemory(Z80Ctrl->defaultPageMode);
// Add in a test program to guage execution speed.
Z80Ctrl->ram[0x1200] = 0x01;
Z80Ctrl->ram[0x1201] = 0x86;
Z80Ctrl->ram[0x1202] = 0xf2;
Z80Ctrl->ram[0x1203] = 0x3e;
Z80Ctrl->ram[0x1204] = 0x15;
Z80Ctrl->ram[0x1205] = 0x3d;
Z80Ctrl->ram[0x1206] = 0x20;
Z80Ctrl->ram[0x1207] = 0xfd;
Z80Ctrl->ram[0x1208] = 0x0b;
Z80Ctrl->ram[0x1209] = 0x78;
Z80Ctrl->ram[0x120a] = 0xb1;
Z80Ctrl->ram[0x120b] = 0x20;
Z80Ctrl->ram[0x120c] = 0xf6;
Z80Ctrl->ram[0x120d] = 0xc3;
Z80Ctrl->ram[0x120e] = 0x00;
Z80Ctrl->ram[0x120f] = 0x00;
pr_info("Enabling MZ-700 driver.\n");
return;
}

5
software/FusionX/src/z80drv/src/z80vhw_pcw.c
View File

@@ -194,6 +194,9 @@ void pcwInit(uint8_t mode)
Z80Ctrl->ram[0] = 0x00;
Z80Ctrl->ram[1] = 0x00;
// Initial memory config.
pcwSetupMemory(Z80Ctrl->defaultPageMode);
pr_info("Enabling PCW-%s driver.\n", mode == 0 ? "8256" : "9256");
return;
}
@@ -297,7 +300,7 @@ pr_info("VORIGIN:%02x\n", data);
pr_info("SCREENATTR:%02x\n", data);
break;
case IO_GACMD:
pr_info("GACMD:%02x\n", data);
//pr_info("GACMD:%02x\n", data);
break;
default:

2
software/FusionX/src/z80drv/src/z80vhw_tzpu.c
View File

@@ -150,7 +150,7 @@ void tzpuSetupMemory(enum Z80_MEMORY_PROFILE mode)
TZPUCtrl.regCpldCfg = 0x00; // Not used, as no CPLD available, but need to store/return value if addressed.
// Default memory mode, TZFS.
Z80Ctrl->memoryMode = TZMM_ORIG;
Z80Ctrl->memoryMode = TZMM_TZFS;
// Reset IO mapping.
for(idx=0x0000; idx < IO_PAGE_SIZE; idx++)