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eaw:v1.1-L1-SDRAM-sync-issue eaw:master eaw:v1.0-initial-design
eaw:v1.18 eaw:v1.17 eaw:v1.16 eaw:v1.15 eaw:v1.14 eaw:v1.13 eaw:v1.12 eaw:v1.11 eaw:v1.10 eaw:v1.0
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compare: eaw:v1.15
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eaw:v1.1-L1-SDRAM-sync-issue eaw:master eaw:v1.0-initial-design
eaw:v1.18 eaw:v1.17 eaw:v1.16 eaw:v1.15 eaw:v1.14 eaw:v1.13 eaw:v1.12 eaw:v1.11 eaw:v1.10 eaw:v1.0

4 Commits
v1.10 ... v1.15

Author SHA1 Message Date
Philip Smart
e3332bd022 Fix FPGA build failures for CYC1000 and DE0_nano, add STcache to all boards 
- Add zpu_core_evo_STcache.vhd to QSF files for DE10_nano, QMV, CYC1000,
  and DE0_nano (was only in E115). Required by the stack cache feature
  in zpu_core_evo.vhd.
- Enable WishBone SDRAM QIP (W9864G6) for CYC1000 - fixes missing
  WBSDRAM entity error.
- Enable sysbus SDRAM QIP (W9864G6) for DE0_nano - fixes missing
  SDRAM entity error.

Quartus needs all referenced entities in the library even when inside
inactive generate blocks (BOARD_E115=true for all pipeline builds).

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-03-17 15:07:33 +00:00
Philip Smart
3d91ee7d6d Complete stack cache implementation in zpu_core_evo 
Bring in the completed stack cache feature (from .vhd.new) that was
started but not committed. Adds MAX_STCACHE_BITS generic, stack cache
signals, CACHEST instantiation, and associated logic. Fixes EVO and
EVO_MINIMAL FPGA build failures caused by zpu_soc.vhd referencing
the missing MAX_STCACHE_BITS parameter.

Previous version saved as zpu_core_evo.vhd.pre_stcache.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-03-17 14:42:20 +00:00
Philip Smart
4958b2d4cf Add zOS_DualPort3264BootBRAM.vhd to all board QSF files 
The EVO/EVO_MINIMAL CPU models require the DualPort3264BootBRAM entity
for dual-port instruction BRAM support. Previously only E115 had this
file in its QSF, causing compilation failures on other boards.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-03-16 14:47:14 +00:00
Philip Smart
ee7ce3114e Update zpu_soc_pkg.tmpl.vhd to match current zpu_soc_pkg.vhd 
The template was outdated and missing SOC_INTR_MAX, board declarations,
function prototypes, and other constants added during development.
Regenerated from current working package with all CPU model flags at 0.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-03-16 14:34:37 +00:00
7 changed files with 4831 additions and 635 deletions
Expand all files Collapse all files

82
build/CYC1000_zpu.qsf
View File

@@ -1,41 +1,41 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
# Date created = 11:51:50 November 03, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# cyc1000_nios_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
# Date created = 11:51:50 November 03, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# cyc1000_nios_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
# Project-Wide Assignments
# ========================
@@ -48,7 +48,7 @@ set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone 10 LP"
set_global_assignment -name TOP_LEVEL_ENTITY CYC1000_zpu
set_global_assignment -name TOP_LEVEL_ENTITY CYC1000_zpu
# Fitter Assignments
# ==================
@@ -386,6 +386,7 @@ set_global_assignment -name VHDL_FILE ../cpu/zpu_core_small.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_medium.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_L2.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_STcache.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_uart_debug.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc_pkg.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc.vhd
@@ -398,6 +399,7 @@ set_global_assignment -name VHDL_FILE ../devices/sysbus/ps2/io_ps2_com.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/timer/timer_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/BootROM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/DualPortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPort3264BootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd
@@ -411,7 +413,7 @@ set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_byte_ct
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_bit_ctrl.vhd
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/48LC16M16.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/48LC16M16_cached.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/W9864G6.qip
set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/W9864G6.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/W9864G6_cached.qip
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"

134
build/DE0_nano_zpu.qsf
View File

@@ -1,19 +1,19 @@
#============================================================
# Build by Terasic System Builder
#============================================================
#============================================================
# Build by Terasic System Builder
#============================================================
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEMA4U23C6
set_global_assignment -name TOP_LEVEL_ENTITY "DE0_nano_zpu"
set_global_assignment -name TOP_LEVEL_ENTITY "DE0_nano_zpu"
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.1 Standard Edition"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:58:03 DECEMBER 18,2014"
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
#============================================================
# ADC
#============================================================
#============================================================
# ADC
#============================================================
set_location_assignment PIN_U9 -to ADC_CONVST
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
set_location_assignment PIN_V10 -to ADC_SCK
@@ -22,10 +22,10 @@ set_location_assignment PIN_AC4 -to ADC_SDI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
set_location_assignment PIN_AD4 -to ADC_SDO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
#============================================================
# ARDUINO
#============================================================
#============================================================
# ARDUINO
#============================================================
set_location_assignment PIN_AG13 -to ARDUINO_IO[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[0]
set_location_assignment PIN_AF13 -to ARDUINO_IO[1]
@@ -60,24 +60,24 @@ set_location_assignment PIN_AG11 -to ARDUINO_IO[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[15]
set_location_assignment PIN_AH7 -to ARDUINO_RESET_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_RESET_N
#============================================================
# CLOCK
#============================================================
#set_location_assignment PIN_V11 -to FPGA_CLK1_50
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
#============================================================
# CLOCK
#============================================================
#set_location_assignment PIN_V11 -to FPGA_CLK1_50
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
set_location_assignment PIN_E11 -to FPGA_CLK3_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
#set_location_assignment PIN_R8 -to CLOCK_50
#set_location_assignment PIN_R8 -to CLOCK_50
set_location_assignment PIN_V11 -to CLOCK_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
#============================================================
# HPS
#============================================================
# HPS
#============================================================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_CONV_USB_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[0]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[1]
@@ -198,18 +198,18 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DIR
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_NXT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_STP
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_STP
#============================================================
# KEY
#============================================================
# KEY
#============================================================
set_location_assignment PIN_AH17 -to KEY[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
set_location_assignment PIN_AH16 -to KEY[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
#============================================================
# LED
#============================================================
# LED
#============================================================
set_location_assignment PIN_W15 -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_location_assignment PIN_AA24 -to LED[1]
@@ -226,10 +226,10 @@ set_location_assignment PIN_Y16 -to LED[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
set_location_assignment PIN_AA23 -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
#============================================================
# SW
#============================================================
# SW
#============================================================
set_location_assignment PIN_L10 -to SW[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
set_location_assignment PIN_L9 -to SW[1]
@@ -238,10 +238,10 @@ set_location_assignment PIN_H6 -to SW[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
set_location_assignment PIN_H5 -to SW[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
#============================================================
# GPIO_0, GPIO connect to GPIO Default
#============================================================
# GPIO_0, GPIO connect to GPIO Default
#============================================================
set_location_assignment PIN_V12 -to GPIO_0[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
set_location_assignment PIN_AF7 -to GPIO_0[1]
@@ -306,18 +306,18 @@ set_location_assignment PIN_AD11 -to GPIO_0[30]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
set_location_assignment PIN_AF10 -to GPIO_0[31]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
#set_location_assignment PIN_AD12 -to GPIO_0[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
#set_location_assignment PIN_AE11 -to GPIO_0[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
#set_location_assignment PIN_AF11 -to GPIO_0[34]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[34]
#set_location_assignment PIN_AE12 -to GPIO_0[35]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[35]
#============================================================
# GPIO_1, GPIO connect to GPIO Default
#set_location_assignment PIN_AD12 -to GPIO_0[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
#set_location_assignment PIN_AE11 -to GPIO_0[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
#set_location_assignment PIN_AF11 -to GPIO_0[34]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[34]
#set_location_assignment PIN_AE12 -to GPIO_0[35]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[35]
#============================================================
# GPIO_1, GPIO connect to GPIO Default
#============================================================
set_location_assignment PIN_Y15 -to GPIO_1[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
set_location_assignment PIN_AG28 -to GPIO_1[1]
@@ -390,8 +390,8 @@ set_location_assignment PIN_AA18 -to GPIO_1[34]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[34]
set_location_assignment PIN_AC22 -to GPIO_1[35]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[35]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[35]
set_location_assignment PIN_AE12 -to UART_TX_0
set_location_assignment PIN_AE11 -to UART_RX_0
set_location_assignment PIN_AF11 -to UART_TX_1
@@ -402,13 +402,13 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TX_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RX_1
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to UART_TX_0
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to UART_TX_1
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to UART_TX_1
#============================================================
# End of pin assignments by Terasic System Builder
#============================================================
#============================================================
# End of pin assignments by Terasic System Builder
#============================================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
@@ -423,9 +423,9 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_instance_assignment -name SLEW_RATE 2 -to DRAM_DQ*
set_instance_assignment -name SLEW_RATE 2 -to DRAM_DQ*
set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON
set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
@@ -439,6 +439,7 @@ set_global_assignment -name VHDL_FILE ../cpu/zpu_core_small.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_medium.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_L2.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_STcache.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_uart_debug.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc_pkg.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc.vhd
@@ -451,6 +452,7 @@ set_global_assignment -name VHDL_FILE ../devices/sysbus/ps2/io_ps2_com.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/timer/timer_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/BootROM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/DualPortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPort3264BootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd
@@ -458,7 +460,7 @@ set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd
#set_global_assignment -name VHDL_FILE ../devices/sysbus/TCPU/tcpu.vhd
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/48LC16M16.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/48LC16M16_cached.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/48LC16M16_cached.qip
set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/W9864G6.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/W9864G6_cached.qip
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_top.vhd
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_byte_ctrl.vhd

544
build/DE10_nano_zpu.qsf
View File

@@ -1,10 +1,10 @@
#============================================================
# Build by Terasic System Builder
#============================================================
#============================================================
# Build by Terasic System Builder
#============================================================
set_global_assignment -name DEVICE 5CSEBA6U23I7
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name TOP_LEVEL_ENTITY DE10_nano_zpu
set_global_assignment -name TOP_LEVEL_ENTITY DE10_nano_zpu
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 10.1
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.1 Standard Edition"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:22:00 FEBRUARY 21,2011"
@@ -16,15 +16,15 @@ set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name GENERATE_RBF_FILE ON
#============================================================
# UART
#============================================================
#set_location_assignment PIN_AA13 -to UART_TX_0
#set_location_assignment PIN_AA11 -to UART_RX_0
#set_location_assignment PIN_Y11 -to UART_TX_1
#set_location_assignment PIN_AA26 -to UART_RX_1
#set_location_assignment PIN_AA13 -to UART_TX_0
#set_location_assignment PIN_AA11 -to UART_RX_0
#set_location_assignment PIN_Y11 -to UART_TX_1
#set_location_assignment PIN_AA26 -to UART_RX_1
set_location_assignment PIN_Y15 -to UART_TX_0
set_location_assignment PIN_AA15 -to UART_RX_0
set_location_assignment PIN_AG28 -to UART_TX_1
@@ -50,17 +50,17 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCARD_CS[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_MOSI[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_CLK[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_CS[0]
#============================================================
# CLOCK
#============================================================
#set_location_assignment PIN_R8 -to CLOCK_50
#============================================================
# CLOCK
#============================================================
#set_location_assignment PIN_R8 -to CLOCK_50
set_location_assignment PIN_V11 -to CLOCK_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
#============================================================
# LED
#============================================================
#============================================================
# LED
#============================================================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
@@ -77,18 +77,18 @@ set_location_assignment PIN_AF26 -to LED[4]
set_location_assignment PIN_AE26 -to LED[5]
set_location_assignment PIN_Y16 -to LED[6]
set_location_assignment PIN_AA23 -to LED[7]
#============================================================
# KEY
#============================================================
#============================================================
# KEY
#============================================================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
set_location_assignment PIN_AH17 -to KEY[0]
set_location_assignment PIN_AH16 -to KEY[1]
#============================================================
# SW
#============================================================
#============================================================
# SW
#============================================================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
@@ -97,10 +97,10 @@ set_location_assignment PIN_Y24 -to SW[0]
set_location_assignment PIN_W24 -to SW[1]
set_location_assignment PIN_W21 -to SW[2]
set_location_assignment PIN_W20 -to SW[3]
#============================================================
# SDIO
#============================================================
#============================================================
# SDIO
#============================================================
#set_location_assignment PIN_AF25 -to SDIO_DAT[0]
#set_location_assignment PIN_AF23 -to SDIO_DAT[1]
#set_location_assignment PIN_AD26 -to SDIO_DAT[2]
@@ -112,9 +112,9 @@ set_location_assignment PIN_W20 -to SW[3]
#set_location_assignment PIN_AF28 -to TCS
#set_location_assignment PIN_AF27 -to TDI
#set_location_assignment PIN_AH26 -to TCK
#set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_*
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TDO
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TDI
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TCK
@@ -123,9 +123,9 @@ set_location_assignment PIN_W20 -to SW[3]
#set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TCS
#set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TDI
#============================================================
# SDRAM
#============================================================
#============================================================
# SDRAM
#============================================================
#set_location_assignment PIN_M7 -to SDRAM_BA[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_BA[0]
#set_location_assignment PIN_M6 -to SDRAM_BA[1]
@@ -204,236 +204,236 @@ set_location_assignment PIN_W20 -to SW[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_ADDR[11]
#set_location_assignment PIN_L4 -to SDRAM_ADDR[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM_ADDR[12]
#============================================================
# EPCS
#============================================================
#set_location_assignment PIN_H2 -to EPCS_DATA0
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_DATA0
#set_location_assignment PIN_H1 -to EPCS_DCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_DCLK
#set_location_assignment PIN_D2 -to EPCS_NCSO
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_NCSO
#set_location_assignment PIN_C1 -to EPCS_ASDO
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_ASDO
#============================================================
# Accelerometer and EEPROM
#============================================================
#set_location_assignment PIN_F2 -to I2C_SCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SCLK
#set_location_assignment PIN_F1 -to I2C_SDAT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SDAT
#set_location_assignment PIN_G5 -to G_SENSOR_CS_N
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_CS_N
#set_location_assignment PIN_M2 -to G_SENSOR_INT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_INT
#============================================================
# ADC
#============================================================
#set_location_assignment PIN_A10 -to ADC_CS_N
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CS_N
#set_location_assignment PIN_B10 -to ADC_SADDR
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SADDR
#set_location_assignment PIN_B14 -to ADC_SCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCLK
#set_location_assignment PIN_A9 -to ADC_SDAT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDAT
#============================================================
# 2x13 GPIO Header
#============================================================
#set_location_assignment PIN_A14 -to GPIO_2[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[0]
#set_location_assignment PIN_B16 -to GPIO_2[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[1]
#set_location_assignment PIN_C14 -to GPIO_2[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[2]
#set_location_assignment PIN_C16 -to GPIO_2[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[3]
#set_location_assignment PIN_C15 -to GPIO_2[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[4]
#set_location_assignment PIN_D16 -to GPIO_2[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[5]
#set_location_assignment PIN_D15 -to GPIO_2[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[6]
#set_location_assignment PIN_D14 -to GPIO_2[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[7]
#set_location_assignment PIN_F15 -to GPIO_2[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[8]
#set_location_assignment PIN_F16 -to GPIO_2[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[9]
#set_location_assignment PIN_F14 -to GPIO_2[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[10]
#set_location_assignment PIN_G16 -to GPIO_2[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[11]
#set_location_assignment PIN_G15 -to GPIO_2[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[12]
#set_location_assignment PIN_E15 -to GPIO_2_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[0]
#set_location_assignment PIN_E16 -to GPIO_2_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[1]
#set_location_assignment PIN_M16 -to GPIO_2_IN[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[2]
#============================================================
# GPIO_0, GPIO_0 connect to GPIO Default
#============================================================
#set_location_assignment PIN_A8 -to GPIO_0_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0_IN[0]
#set_location_assignment PIN_D3 -to GPIO_0[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
#set_location_assignment PIN_B8 -to GPIO_0_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0_IN[1]
#set_location_assignment PIN_C3 -to GPIO_0[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[1]
#set_location_assignment PIN_A2 -to GPIO_0[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[2]
#set_location_assignment PIN_A3 -to GPIO_0[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[3]
#set_location_assignment PIN_B3 -to GPIO_0[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[4]
#set_location_assignment PIN_B4 -to GPIO_0[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[5]
#set_location_assignment PIN_A4 -to GPIO_0[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[6]
#set_location_assignment PIN_B5 -to GPIO_0[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[7]
#set_location_assignment PIN_A5 -to GPIO_0[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[8]
#set_location_assignment PIN_D5 -to GPIO_0[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[9]
#set_location_assignment PIN_B6 -to GPIO_0[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[10]
#set_location_assignment PIN_A6 -to GPIO_0[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[11]
#set_location_assignment PIN_B7 -to GPIO_0[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[12]
#set_location_assignment PIN_D6 -to GPIO_0[13]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[13]
#set_location_assignment PIN_A7 -to GPIO_0[14]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[14]
#set_location_assignment PIN_C6 -to GPIO_0[15]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[15]
#set_location_assignment PIN_C8 -to GPIO_0[16]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[16]
#set_location_assignment PIN_E6 -to GPIO_0[17]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[17]
#set_location_assignment PIN_E7 -to GPIO_0[18]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[18]
#set_location_assignment PIN_D8 -to GPIO_0[19]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[19]
#set_location_assignment PIN_E8 -to GPIO_0[20]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[20]
#set_location_assignment PIN_F8 -to GPIO_0[21]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[21]
#set_location_assignment PIN_F9 -to GPIO_0[22]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[22]
#set_location_assignment PIN_E9 -to GPIO_0[23]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[23]
#set_location_assignment PIN_C9 -to GPIO_0[24]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[24]
#set_location_assignment PIN_D9 -to GPIO_0[25]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[25]
#set_location_assignment PIN_E11 -to GPIO_0[26]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[26]
#set_location_assignment PIN_E10 -to GPIO_0[27]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[27]
#set_location_assignment PIN_C11 -to GPIO_0[28]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[28]
#set_location_assignment PIN_B11 -to GPIO_0[29]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[29]
#set_location_assignment PIN_A12 -to GPIO_0[30]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
#set_location_assignment PIN_D11 -to GPIO_0[31]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
#set_location_assignment PIN_D12 -to GPIO_0[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
#set_location_assignment PIN_B12 -to GPIO_0[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
#============================================================
# GPIO_1, GPIO_1 connect to GPIO Default
#============================================================
#set_location_assignment PIN_T9 -to GPIO_1_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1_IN[0]
#set_location_assignment PIN_F13 -to GPIO_1[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
#set_location_assignment PIN_R9 -to GPIO_1_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1_IN[1]
#set_location_assignment PIN_T15 -to GPIO_1[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
#set_location_assignment PIN_T14 -to GPIO_1[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
#set_location_assignment PIN_T13 -to GPIO_1[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
#set_location_assignment PIN_R13 -to GPIO_1[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
#set_location_assignment PIN_T12 -to GPIO_1[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
#set_location_assignment PIN_R12 -to GPIO_1[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[6]
#set_location_assignment PIN_T11 -to GPIO_1[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[7]
#set_location_assignment PIN_T10 -to GPIO_1[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[8]
#set_location_assignment PIN_R11 -to GPIO_1[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[9]
#set_location_assignment PIN_P11 -to GPIO_1[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[10]
#set_location_assignment PIN_R10 -to GPIO_1[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[11]
#set_location_assignment PIN_N12 -to GPIO_1[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[12]
#set_location_assignment PIN_P9 -to GPIO_1[13]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[13]
#set_location_assignment PIN_N9 -to GPIO_1[14]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[14]
#set_location_assignment PIN_N11 -to GPIO_1[15]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[15]
#set_location_assignment PIN_L16 -to GPIO_1[16]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[16]
#set_location_assignment PIN_K16 -to GPIO_1[17]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[17]
#set_location_assignment PIN_R16 -to GPIO_1[18]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[18]
#set_location_assignment PIN_L15 -to GPIO_1[19]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[19]
#set_location_assignment PIN_P15 -to GPIO_1[20]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[20]
#set_location_assignment PIN_P16 -to GPIO_1[21]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[21]
#set_location_assignment PIN_R14 -to GPIO_1[22]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[22]
#set_location_assignment PIN_N16 -to GPIO_1[23]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[23]
#set_location_assignment PIN_N15 -to GPIO_1[24]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[24]
#set_location_assignment PIN_P14 -to GPIO_1[25]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[25]
#set_location_assignment PIN_L14 -to GPIO_1[26]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[26]
#set_location_assignment PIN_N14 -to GPIO_1[27]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[27]
#set_location_assignment PIN_M10 -to GPIO_1[28]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[28]
#set_location_assignment PIN_L13 -to GPIO_1[29]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[29]
#set_location_assignment PIN_J16 -to GPIO_1[30]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[30]
#set_location_assignment PIN_K15 -to GPIO_1[31]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[31]
#set_location_assignment PIN_J13 -to GPIO_1[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[32]
#set_location_assignment PIN_J14 -to GPIO_1[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[33]
#============================================================
# End of pin assignments by Terasic System Builder
#============================================================
#============================================================
# EPCS
#============================================================
#set_location_assignment PIN_H2 -to EPCS_DATA0
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_DATA0
#set_location_assignment PIN_H1 -to EPCS_DCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_DCLK
#set_location_assignment PIN_D2 -to EPCS_NCSO
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_NCSO
#set_location_assignment PIN_C1 -to EPCS_ASDO
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EPCS_ASDO
#============================================================
# Accelerometer and EEPROM
#============================================================
#set_location_assignment PIN_F2 -to I2C_SCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SCLK
#set_location_assignment PIN_F1 -to I2C_SDAT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SDAT
#set_location_assignment PIN_G5 -to G_SENSOR_CS_N
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_CS_N
#set_location_assignment PIN_M2 -to G_SENSOR_INT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_INT
#============================================================
# ADC
#============================================================
#set_location_assignment PIN_A10 -to ADC_CS_N
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CS_N
#set_location_assignment PIN_B10 -to ADC_SADDR
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SADDR
#set_location_assignment PIN_B14 -to ADC_SCLK
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCLK
#set_location_assignment PIN_A9 -to ADC_SDAT
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDAT
#============================================================
# 2x13 GPIO Header
#============================================================
#set_location_assignment PIN_A14 -to GPIO_2[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[0]
#set_location_assignment PIN_B16 -to GPIO_2[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[1]
#set_location_assignment PIN_C14 -to GPIO_2[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[2]
#set_location_assignment PIN_C16 -to GPIO_2[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[3]
#set_location_assignment PIN_C15 -to GPIO_2[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[4]
#set_location_assignment PIN_D16 -to GPIO_2[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[5]
#set_location_assignment PIN_D15 -to GPIO_2[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[6]
#set_location_assignment PIN_D14 -to GPIO_2[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[7]
#set_location_assignment PIN_F15 -to GPIO_2[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[8]
#set_location_assignment PIN_F16 -to GPIO_2[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[9]
#set_location_assignment PIN_F14 -to GPIO_2[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[10]
#set_location_assignment PIN_G16 -to GPIO_2[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[11]
#set_location_assignment PIN_G15 -to GPIO_2[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[12]
#set_location_assignment PIN_E15 -to GPIO_2_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[0]
#set_location_assignment PIN_E16 -to GPIO_2_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[1]
#set_location_assignment PIN_M16 -to GPIO_2_IN[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[2]
#============================================================
# GPIO_0, GPIO_0 connect to GPIO Default
#============================================================
#set_location_assignment PIN_A8 -to GPIO_0_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0_IN[0]
#set_location_assignment PIN_D3 -to GPIO_0[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
#set_location_assignment PIN_B8 -to GPIO_0_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0_IN[1]
#set_location_assignment PIN_C3 -to GPIO_0[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[1]
#set_location_assignment PIN_A2 -to GPIO_0[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[2]
#set_location_assignment PIN_A3 -to GPIO_0[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[3]
#set_location_assignment PIN_B3 -to GPIO_0[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[4]
#set_location_assignment PIN_B4 -to GPIO_0[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[5]
#set_location_assignment PIN_A4 -to GPIO_0[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[6]
#set_location_assignment PIN_B5 -to GPIO_0[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[7]
#set_location_assignment PIN_A5 -to GPIO_0[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[8]
#set_location_assignment PIN_D5 -to GPIO_0[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[9]
#set_location_assignment PIN_B6 -to GPIO_0[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[10]
#set_location_assignment PIN_A6 -to GPIO_0[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[11]
#set_location_assignment PIN_B7 -to GPIO_0[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[12]
#set_location_assignment PIN_D6 -to GPIO_0[13]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[13]
#set_location_assignment PIN_A7 -to GPIO_0[14]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[14]
#set_location_assignment PIN_C6 -to GPIO_0[15]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[15]
#set_location_assignment PIN_C8 -to GPIO_0[16]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[16]
#set_location_assignment PIN_E6 -to GPIO_0[17]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[17]
#set_location_assignment PIN_E7 -to GPIO_0[18]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[18]
#set_location_assignment PIN_D8 -to GPIO_0[19]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[19]
#set_location_assignment PIN_E8 -to GPIO_0[20]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[20]
#set_location_assignment PIN_F8 -to GPIO_0[21]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[21]
#set_location_assignment PIN_F9 -to GPIO_0[22]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[22]
#set_location_assignment PIN_E9 -to GPIO_0[23]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[23]
#set_location_assignment PIN_C9 -to GPIO_0[24]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[24]
#set_location_assignment PIN_D9 -to GPIO_0[25]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[25]
#set_location_assignment PIN_E11 -to GPIO_0[26]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[26]
#set_location_assignment PIN_E10 -to GPIO_0[27]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[27]
#set_location_assignment PIN_C11 -to GPIO_0[28]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[28]
#set_location_assignment PIN_B11 -to GPIO_0[29]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[29]
#set_location_assignment PIN_A12 -to GPIO_0[30]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
#set_location_assignment PIN_D11 -to GPIO_0[31]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
#set_location_assignment PIN_D12 -to GPIO_0[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
#set_location_assignment PIN_B12 -to GPIO_0[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
#============================================================
# GPIO_1, GPIO_1 connect to GPIO Default
#============================================================
#set_location_assignment PIN_T9 -to GPIO_1_IN[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1_IN[0]
#set_location_assignment PIN_F13 -to GPIO_1[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
#set_location_assignment PIN_R9 -to GPIO_1_IN[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1_IN[1]
#set_location_assignment PIN_T15 -to GPIO_1[1]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
#set_location_assignment PIN_T14 -to GPIO_1[2]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
#set_location_assignment PIN_T13 -to GPIO_1[3]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
#set_location_assignment PIN_R13 -to GPIO_1[4]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
#set_location_assignment PIN_T12 -to GPIO_1[5]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
#set_location_assignment PIN_R12 -to GPIO_1[6]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[6]
#set_location_assignment PIN_T11 -to GPIO_1[7]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[7]
#set_location_assignment PIN_T10 -to GPIO_1[8]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[8]
#set_location_assignment PIN_R11 -to GPIO_1[9]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[9]
#set_location_assignment PIN_P11 -to GPIO_1[10]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[10]
#set_location_assignment PIN_R10 -to GPIO_1[11]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[11]
#set_location_assignment PIN_N12 -to GPIO_1[12]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[12]
#set_location_assignment PIN_P9 -to GPIO_1[13]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[13]
#set_location_assignment PIN_N9 -to GPIO_1[14]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[14]
#set_location_assignment PIN_N11 -to GPIO_1[15]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[15]
#set_location_assignment PIN_L16 -to GPIO_1[16]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[16]
#set_location_assignment PIN_K16 -to GPIO_1[17]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[17]
#set_location_assignment PIN_R16 -to GPIO_1[18]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[18]
#set_location_assignment PIN_L15 -to GPIO_1[19]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[19]
#set_location_assignment PIN_P15 -to GPIO_1[20]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[20]
#set_location_assignment PIN_P16 -to GPIO_1[21]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[21]
#set_location_assignment PIN_R14 -to GPIO_1[22]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[22]
#set_location_assignment PIN_N16 -to GPIO_1[23]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[23]
#set_location_assignment PIN_N15 -to GPIO_1[24]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[24]
#set_location_assignment PIN_P14 -to GPIO_1[25]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[25]
#set_location_assignment PIN_L14 -to GPIO_1[26]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[26]
#set_location_assignment PIN_N14 -to GPIO_1[27]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[27]
#set_location_assignment PIN_M10 -to GPIO_1[28]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[28]
#set_location_assignment PIN_L13 -to GPIO_1[29]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[29]
#set_location_assignment PIN_J16 -to GPIO_1[30]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[30]
#set_location_assignment PIN_K15 -to GPIO_1[31]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[31]
#set_location_assignment PIN_J13 -to GPIO_1[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[32]
#set_location_assignment PIN_J14 -to GPIO_1[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[33]
#============================================================
# End of pin assignments by Terasic System Builder
#============================================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
@@ -449,13 +449,13 @@ set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_CAS_N
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_RAS_N
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_WE_N
set_instance_assignment -name SLEW_RATE 2 -to DRAM_DQ*
set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON
set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
set_global_assignment -name VHDL_FILE ../DE10_nano_zpu_Toplevel.vhd
set_global_assignment -name QIP_FILE Clock_50to100.qip
set_global_assignment -name SDC_FILE DE10_nano_zpu_constraints.sdc
@@ -465,6 +465,7 @@ set_global_assignment -name VHDL_FILE ../cpu/zpu_core_small.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_medium.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_L2.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_STcache.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_uart_debug.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc_pkg.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc.vhd
@@ -477,6 +478,7 @@ set_global_assignment -name VHDL_FILE ../devices/sysbus/ps2/io_ps2_com.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/timer/timer_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/BootROM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/DualPortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPort3264BootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/SinglePortBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd

2
build/QMV_zpu.qsf
View File

@@ -425,6 +425,7 @@ set_global_assignment -name VHDL_FILE ../cpu/zpu_core_small.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_medium.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_L2.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_STcache.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_uart_debug.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc_pkg.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc.vhd
@@ -437,6 +438,7 @@ set_global_assignment -name VHDL_FILE ../devices/sysbus/ps2/io_ps2_com.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/timer/timer_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_BootROM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPort3264BootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_SinglePortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_SinglePortBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd

753
cpu/zpu_core_evo.vhd
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File diff suppressed because it is too large Load Diff

3688
cpu/zpu_core_evo.vhd.pre_stcache Executable file
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File diff suppressed because it is too large Load Diff

263
zpu_soc_pkg.tmpl.vhd
View File

@@ -31,9 +31,25 @@ library ieee;
library pkgs;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
use work.zpu_pkg.all;
package zpu_soc_pkg is
------------------------------------------------------------
-- Function prototypes
------------------------------------------------------------
-- Find the maximum of two integers.
function IntMax(a : in integer; b : in integer) return integer;
-- Find the number of bits required to represent an integer.
function log2ceil(arg : positive) return natural;
-- Function to calculate the number of whole 'clock' cycles in a given time period, the period being in ns.
function clockTicks(period : in integer; clock : in integer) return integer;
------------------------------------------------------------
-- Constants
------------------------------------------------------------
-- Choose which CPU to instantiate depending on requirements. Warning, keep the below 5 lines exactly the same
-- or ensure you update the Makefile as they are set by the Makefile to generate zpu_soc_pkg.vhd
@@ -44,10 +60,18 @@ package zpu_soc_pkg is
constant ZPU_EVO : integer := 0; -- Use the EVOLUTION CPU.
constant ZPU_EVO_MINIMAL : integer := 0; -- Use the Minimalist EVOLUTION CPU.
-- Target board declaration.
--
constant BOARD_E115 : boolean := true; -- E115 FPGA Board
constant BOARD_QMV : boolean := false; -- QMTECH Cyclone V FPGA Board
constant BOARD_DE0 : boolean := false; -- DE0-Nano FPGA Board
constant BOARD_DE10 : boolean := false; -- DE10-Nano FPGA Board
constant BOARD_CYC1000 : boolean := false; -- Trenz CYC1000 FPGA Board
-- Frequencies for the various boards.
--
constant SYSCLK_E115_FREQ : integer := 100000000; -- E115 FPGA Board
constant SYSCLK_QMV_FREQ : integer := 100000000; -- QMTECH Cyclone V FPGA Board
constant SYSCLK_E115_FREQ : integer := 75000000; -- E115 FPGA Board
constant SYSCLK_QMV_FREQ : integer := 75000000; -- QMTECH Cyclone V FPGA Board
constant SYSCLK_DE0_FREQ : integer := 100000000; -- DE0-Nano FPGA Board
constant SYSCLK_DE10_FREQ : integer := 100000000; -- DE10-Nano FPGA Board
constant SYSCLK_CYC1000_FREQ : integer := 100000000; -- Trenz CYC1000 FPGA Board
@@ -56,15 +80,17 @@ package zpu_soc_pkg is
constant ZPU_ID_SMALL : integer := 16#0101#; -- ID for the ZPU Small in this package.
constant ZPU_ID_MEDIUM : integer := 16#0201#; -- ID for the ZPU Medium in this package.
constant ZPU_ID_FLEX : integer := 16#0301#; -- ID for the ZPU Flex in this package.
constant ZPU_ID_EVO : integer := 16#0401#; -- ID for the ZPU Evo in this package.
constant ZPU_ID_EVO_MINIMAL : integer := 16#0501#; -- ID for the ZPU Evo Minimal in this package.
constant ZPU_ID_EVO : integer := 16#0402#; -- ID for the ZPU Evo in this package.
constant ZPU_ID_EVO_MINIMAL : integer := 16#0502#; -- ID for the ZPU Evo Minimal in this package.
-- EVO CPU specific configuration.
constant MAX_EVO_L1CACHE_BITS : integer := 5; -- Maximum size in instructions of the Level 0 instruction cache governed by the number of bits, ie. 8 = 256 instruction cache.
constant MAX_EVO_L2CACHE_BITS : integer := 12; -- Maximum bit size in bytes of the Level 2 instruction cache governed by the number of bits, ie. 8 = 256 byte cache.
constant MAX_EVO_STCACHE_BITS : integer := 8; -- Maximum size in 32bit words of the stack cache, governed by the number of bits, ie. 8 - 256 x 32bit cache.
constant MAX_EVO_MXCACHE_BITS : integer := 3; -- Maximum size of the memory transaction cache governed by the number of bits.
constant MAX_EVO_MIN_L1CACHE_BITS : integer := 4; -- Maximum size in instructions of the Level 0 instruction cache governed by the number of bits, ie. 8 = 256 instruction cache.
constant MAX_EVO_MIN_L2CACHE_BITS : integer := 12; -- Maximum bit size in bytes of the Level 2 instruction cache governed by the number of bits, ie. 8 = 256 byte cache.
constant MAX_EVO_MIN_STCACHE_BITS : integer := 8; -- Maximum size in 32bit words of the stack cache, governed by the number of bits, ie. 8 - 256 x 32bit cache.
constant MAX_EVO_MIN_MXCACHE_BITS : integer := 3; -- Maximum size of the memory transaction cache governed by the number of bits.
-- Settings for various IO devices.
@@ -72,39 +98,68 @@ package zpu_soc_pkg is
constant MAX_RX_FIFO_BITS : integer := 8; -- Size of UART RX Fifo.
constant MAX_TX_FIFO_BITS : integer := 8; -- Size of UART TX Fifo.
constant MAX_UART_DIVISOR_BITS : integer := 16; -- Maximum number of bits for the UART clock rate generator divisor.
constant INTR_MAX : integer := 16; -- Maximum number of interrupt inputs.
constant SYSTEM_FREQUENCY : integer := 100000000; -- Default system clock frequency if not overriden by top level.
-- constant SYSCLK_FREQUENCY : integer := 1000; -- System clock in MHz x 10
-- constant SYSCLK_HZ : integer := SYSCLK_FREQUENCY*100000; -- System clock in Hertz
-- constant UART_RESET_COUNT : integer := ((SYSCLK_FREQUENCY*100000)/300)*8; -- Count of system clock ticks for a UART break to be recognised as a system reset.
constant SYSTEM_FREQUENCY : integer := 75000000; -- Default system clock frequency if not overriden in top level.
-- SoC specific options.
--
constant SOC_IMPL_WB : boolean := EVO_USE_WB_BUS; -- Implement the Wishbone bus and all enabled devices.
constant SOC_IMPL_WB_I2C : boolean := true; -- Implement I2C over wishbone interface.
constant SOC_IMPL_WB_SDRAM : boolean := true; -- Implement SDRAM over wishbone interface.
constant SOC_IMPL_WB_I2C : boolean := false; -- Implement I2C over wishbone interface.
constant SOC_IMPL_TIMER1 : boolean := true; -- Implement Timer 1, an array of prescaled downcounter with enable.
constant SOC_TIMER1_COUNTERS : integer := 0; -- Number of downcounters in Timer 1. Value is a 2^ array of counters, so 0 = 1 counter.
constant SOC_IMPL_PS2 : boolean := true; -- Implement PS2 keyboard and mouse hardware.
constant SOC_IMPL_SPI : boolean := true; -- Implement Serial Peripheral Inteface(s).
constant SOC_IMPL_PS2 : boolean := false; -- Implement PS2 keyboard and mouse hardware.
constant SOC_IMPL_SPI : boolean := false; -- Implement Serial Peripheral Inteface(s).
constant SOC_IMPL_SD : boolean := true; -- Implement SD Card interface.
constant SOC_SD_DEVICES : integer := 1; -- Number of SD card channels implemented.
constant SOC_IMPL_INTRCTL : boolean := true; -- Implement the prioritised interrupt controller.
constant SOC_INTR_MAX : integer := 16; -- Maximum number of interrupt inputs.
constant SOC_IMPL_IOCTL : boolean := false; -- Implement the IOCTL controller (specific to the MiSTer project).
constant SOC_IMPL_SOCCFG : boolean := true; -- Implement the SoC Configuration information registers.
-- Main Boot BRAM on sysbus, contains startup firmware.
constant SOC_IMPL_BRAM : boolean := true; -- Implement BRAM for the BIOS and initial Stack.
constant SOC_IMPL_RAM : boolean := false; -- Implement RAM using BRAM, typically for Application programs seperate to BIOS.
constant SOC_IMPL_DRAM : boolean := false; -- Implement Dynamic RAM and controller.
constant SOC_IMPL_INSN_BRAM : boolean := true; -- Implement dedicated instruction BRAM for the EVO CPU. Any addr access beyond the BRAM size goes to normal memory.
constant SOC_MAX_ADDR_BRAM_BIT : integer := 16; -- Max address bit of the System BRAM ROM/Stack in bytes, ie. 15 = 32KB or 8K 32bit words. NB. For non evo CPUS you must adjust the maxMemBit parameter in zpu_pkg.vhd to be the same.
constant SOC_IMPL_INSN_BRAM : boolean := EVO_USE_INSN_BUS; -- Implement dedicated instruction BRAM for the EVO CPU. Any addr access beyond the BRAM size goes to normal memory.
constant SOC_MAX_ADDR_BRAM_BIT : integer := 17; -- Max address bit of the System BRAM ROM/Stack in bytes, ie. 15 = 32KB or 8K 32bit words. NB. For non evo CPUS you must adjust the maxMemBit parameter in zpu_pkg.vhd to be the same.
constant SOC_ADDR_BRAM_START : integer := 0; -- Start address of BRAM.
constant SOC_ADDR_BRAM_END : integer := SOC_ADDR_BRAM_START+(2**SOC_MAX_ADDR_BRAM_BIT); -- End address of BRAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
constant SOC_MAX_ADDR_RAM_BIT : integer := 23; -- Max address bit of the System RAM.
constant SOC_ADDR_RAM_START : integer := 16777216; -- Start address of RAM.
-- Secondary block of sysbus RAM, typically implemented in BRAM.
constant SOC_IMPL_RAM : boolean := false; -- Implement RAM using BRAM, typically for Application programs seperate to BIOS.
constant SOC_MAX_ADDR_RAM_BIT : integer := 16; -- Max address bit of the System RAM.
constant SOC_ADDR_RAM_START : integer := 65536; -- Start address of RAM.
constant SOC_ADDR_RAM_END : integer := SOC_ADDR_RAM_START+(2**SOC_MAX_ADDR_RAM_BIT); -- End address of RAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
-- SDRAM on sysbus.
constant SOC_IMPL_SDRAM : boolean := false; -- Implement Dynamic RAM and controller.
constant SOC_SDRAM_ROWS : integer := 4096; -- Number of Rows within the SDRAM.
constant SOC_SDRAM_COLUMNS : integer := 256; -- Number of Columns within the SDRAM.
constant SOC_SDRAM_BANKS : integer := 4; -- Number of Banks within the SDRAM.
constant SOC_SDRAM_DATAWIDTH : integer := 16; -- Data width of SDRAM (ie. 16, 32bit).
constant SOC_SDRAM_CLK_FREQ : integer := 100000000; -- Frequency of the SDRAM clock.
constant SOC_SDRAM_tRCD : integer := 20; -- tRCD - RAS to CAS minimum period (in ns).
constant SOC_SDRAM_tRP : integer := 20; -- tRP - Precharge delay, min time for a precharge command to complete (in ns).
constant SOC_SDRAM_tRFC : integer := 70; -- tRFC - Auto-refresh minimum time to complete (in ns), ie. 66ns
constant SOC_SDRAM_tREF : integer := 64; -- tREF - period of time a complete refresh of all rows is made within (in ms).
constant SOC_MAX_ADDR_SDRAM_BIT : integer := log2ceil(SOC_SDRAM_ROWS * SOC_SDRAM_COLUMNS * SOC_SDRAM_BANKS)+1; -- Max address bit of the System SDRAM.
constant SOC_ADDR_SDRAM_START : integer := 65536; -- Start address of RAM.
constant SOC_ADDR_SDRAM_END : integer := SOC_ADDR_SDRAM_START+(2**SOC_MAX_ADDR_SDRAM_BIT); -- End address of RAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
-- SDRAM on Wishbone bus.
constant SOC_IMPL_WB_SDRAM : boolean := false; -- Implement SDRAM over wishbone interface.
constant SOC_WB_SDRAM_ROWS : integer := 4096; -- Number of Rows within the SDRAM.
constant SOC_WB_SDRAM_COLUMNS : integer := 256; -- Number of Columns within the SDRAM.
constant SOC_WB_SDRAM_BANKS : integer := 4; -- Number of Banks within the SDRAM.
constant SOC_WB_SDRAM_DATAWIDTH : integer := 16; -- Data width of SDRAM (ie. 16, 32bit).
constant SOC_WB_SDRAM_CLK_FREQ : integer := 100000000; -- Frequency of the SDRAM clock.
constant SOC_WB_SDRAM_tRCD : integer := 20; -- tRCD - RAS to CAS minimum period (in ns).
constant SOC_WB_SDRAM_tRP : integer := 20; -- tRP - Precharge delay, min time for a precharge command to complete (in ns).
constant SOC_WB_SDRAM_tRFC : integer := 70; -- tRFC - Auto-refresh minimum time to complete (in ns), ie. 66ns
constant SOC_WB_SDRAM_tREF : integer := 64; -- tREF - period of time a complete refresh of all rows is made within (in ms).
constant SOC_MAX_ADDR_WB_SDRAM_BIT: integer := log2ceil(SOC_WB_SDRAM_ROWS * SOC_WB_SDRAM_COLUMNS * SOC_WB_SDRAM_BANKS)+1; -- Max address bit of the System SDRAM.
constant SOC_ADDR_WB_SDRAM_START : integer := 16777216; -- Start address of RAM.
constant SOC_ADDR_WB_SDRAM_END : integer := SOC_ADDR_WB_SDRAM_START+(2**SOC_MAX_ADDR_WB_SDRAM_BIT); -- End address of RAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
-- Instruction BRAM on sysbus, typically as a 2nd port on the main Boot BRAM (ie. dualport).
constant SOC_MAX_ADDR_INSN_BRAM_BIT: integer := SOC_MAX_ADDR_BRAM_BIT; -- Max address bit of the dedicated instruction BRAM in bytes, ie. 15 = 32KB or 8K 32bit words.
constant SOC_ADDR_INSN_BRAM_START : integer := 0; -- Start address of dedicated instrution BRAM.
constant SOC_ADDR_INSN_BRAM_END : integer := SOC_ADDR_BRAM_START+(2**SOC_MAX_ADDR_INSN_BRAM_BIT); -- End address of dedicated instruction BRAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
-- CPU specific settings.
-- Define the address which is first executed upon reset, stack address, Sysbus I/O Region, Wishbone I/O Region.
constant SOC_RESET_ADDR_CPU : integer := SOC_ADDR_BRAM_START; -- Initial address to start execution from after reset.
constant SOC_START_ADDR_MEM : integer := SOC_ADDR_BRAM_START; -- Start location of program memory (BRAM/ROM/RAM).
constant SOC_STACK_ADDR : integer := SOC_ADDR_BRAM_END - 8; -- Stack start address (BRAM/RAM).
@@ -113,39 +168,95 @@ package zpu_soc_pkg is
constant SOC_WB_IO_START : integer := 32505856; -- Start address of IO range.
constant SOC_WB_IO_END : integer := 33554431; -- End address of IO range.
-- ZPU Evo configuration
--
-- Optional Evo CPU hardware features to be implemented.
constant IMPL_EVO_OPTIMIZE_IM : boolean := true; -- If the instruction cache is enabled, optimise Im instructions to gain speed.
-- Optional Evo CPU instructions to be implemented in hardware:
constant IMPL_EVO_ASHIFTLEFT : boolean := true; -- Arithmetic Shift Left (uses same logic so normally combined with ASHIFTRIGHT and LSHIFTRIGHT).
constant IMPL_EVO_ASHIFTRIGHT : boolean := true; -- Arithmetic Shift Right.
constant IMPL_EVO_CALL : boolean := true; -- Call to direct address.
constant IMPL_EVO_CALLPCREL : boolean := true; -- Call to indirect address (add offset to program counter).
constant IMPL_EVO_DIV : boolean := true; -- 32bit signed division.
constant IMPL_EVO_EQ : boolean := true; -- Equality test.
constant IMPL_EVO_EXTENDED_INSN : boolean := true; -- Extended multibyte instruction set.
constant IMPL_EVO_FIADD32 : boolean := false; -- Fixed point Q17.15 addition.
constant IMPL_EVO_FIDIV32 : boolean := false; -- Fixed point Q17.15 division.
constant IMPL_EVO_FIMULT32 : boolean := false; -- Fixed point Q17.15 multiplication.
constant IMPL_EVO_LOADB : boolean := true; -- Load single byte from memory.
constant IMPL_EVO_LOADH : boolean := true; -- Load half word (16bit) from memory.
constant IMPL_EVO_LSHIFTRIGHT : boolean := true; -- Logical shift right.
constant IMPL_EVO_MOD : boolean := true; -- 32bit modulo (remainder after division).
constant IMPL_EVO_MULT : boolean := true; -- 32bit signed multiplication.
constant IMPL_EVO_NEG : boolean := true; -- Negate value in TOS.
constant IMPL_EVO_NEQ : boolean := true; -- Not equal test.
constant IMPL_EVO_POPPCREL : boolean := true; -- Pop a value into the Program Counter from a location relative to the Stack Pointer.
constant IMPL_EVO_PUSHSPADD : boolean := true; -- Add a value to the Stack pointer and push it onto the stack.
constant IMPL_EVO_STOREB : boolean := true; -- Store/Write a single byte to memory/IO.
constant IMPL_EVO_STOREH : boolean := true; -- Store/Write a half word (16bit) to memory/IO.
constant IMPL_EVO_SUB : boolean := true; -- 32bit signed subtract.
constant IMPL_EVO_XOR : boolean := true; -- Exclusive or of value in TOS.
-- ZPU Evo Minimal configuration
--
-- Optional Evo Minimal CPU hardware features to be implemented.
constant IMPL_EVOM_OPTIMIZE_IM : boolean := true; -- If the instruction cache is enabled, optimise Im instructions to gain speed.
-- Optional Evo Minimal CPU instructions to be implemented in hardware:
constant IMPL_EVOM_ASHIFTLEFT : boolean := false; -- Arithmetic Shift Left (uses same logic so normally combined with ASHIFTRIGHT and LSHIFTRIGHT).
constant IMPL_EVOM_ASHIFTRIGHT : boolean := false; -- Arithmetic Shift Right.
constant IMPL_EVOM_CALL : boolean := false; -- Call to direct address.
constant IMPL_EVOM_CALLPCREL : boolean := false; -- Call to indirect address (add offset to program counter).
constant IMPL_EVOM_DIV : boolean := false; -- 32bit signed division.
constant IMPL_EVOM_EQ : boolean := false; -- Equality test.
constant IMPL_EVOM_EXTENDED_INSN : boolean := false; -- Extended multibyte instruction set.
constant IMPL_EVOM_FIADD32 : boolean := false; -- Fixed point Q17.15 addition.
constant IMPL_EVOM_FIDIV32 : boolean := false; -- Fixed point Q17.15 division.
constant IMPL_EVOM_FIMULT32 : boolean := false; -- Fixed point Q17.15 multiplication.
constant IMPL_EVOM_LOADB : boolean := false; -- Load single byte from memory.
constant IMPL_EVOM_LOADH : boolean := false; -- Load half word (16bit) from memory.
constant IMPL_EVOM_LSHIFTRIGHT : boolean := false; -- Logical shift right.
constant IMPL_EVOM_MOD : boolean := false; -- 32bit modulo (remainder after division).
constant IMPL_EVOM_MULT : boolean := false; -- 32bit signed multiplication.
constant IMPL_EVOM_NEG : boolean := false; -- Negate value in TOS.
constant IMPL_EVOM_NEQ : boolean := false; -- Not equal test.
constant IMPL_EVOM_POPPCREL : boolean := false; -- Pop a value into the Program Counter from a location relative to the Stack Pointer.
constant IMPL_EVOM_PUSHSPADD : boolean := false; -- Add a value to the Stack pointer and push it onto the stack.
constant IMPL_EVOM_STOREB : boolean := false; -- Store/Write a single byte to memory/IO.
constant IMPL_EVOM_STOREH : boolean := false; -- Store/Write a half word (16bit) to memory/IO.
constant IMPL_EVOM_SUB : boolean := false; -- 32bit signed subtract.
constant IMPL_EVOM_XOR : boolean := false; -- Exclusive or of value in TOS.
-- Ranges used throughout the SOC source.
subtype ADDR_BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto 0; -- Address range of the onboard B(lock)RAM - 1 byte aligned
subtype ADDR_BIT_BRAM_16BIT_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto 1; -- Address range of the onboard B(lock)RAM - 2 bytes aligned
subtype ADDR_BIT_BRAM_32BIT_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto minAddrBit; -- Address range of the onboard B(lock)RAM - 4 bytes aligned
subtype ADDR_BIT_RAM_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto 0; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 1 byte aligned
subtype ADDR_BIT_RAM_16BIT_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto 1; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 2 bytes aligned
subtype ADDR_BIT_RAM_32BIT_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto minAddrBit; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 4 bytes aligned
-- subtype ADDR_DECODE_BRAM_RANGE is natural range maxAddrBit-1 downto SOC_MAX_ADDR_BRAM_BIT;-- Decode range for selection of the BRAM within the address space.
-- subtype ADDR_DECODE_RAM_RANGE is natural range maxAddrBit-1 downto SOC_MAX_ADDR_RAM_BIT; -- Decode range for selection of the RAM within the address space.
subtype IO_DECODE_RANGE is natural range maxAddrBit-WB_ACTIVE-1 downto maxIOBit; -- Upper bits in memory defining the IO block within the address space for the EVO cpu IO. All other models use ioBit.
-- subtype WB_IO_DECODE_RANGE is natural range maxAddrBit-1 downto maxIOBit; -- Upper bits in memory defining the IO block within the address space for the EVO cpu IO. All other models use ioBit.
subtype ADDR_BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto 0; -- Address range of the onboard B(lock)RAM - 1 byte aligned
subtype ADDR_16BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto 1; -- Address range of the onboard B(lock)RAM - 2 bytes aligned
subtype ADDR_32BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto minAddrBit; -- Address range of the onboard B(lock)RAM - 4 bytes aligned
subtype ADDR_64BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto minAddrBit+1; -- Address range of the onboard B(lock)RAM - 8 bytes aligned
subtype ADDR_BIT_RAM_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto 0; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 1 byte aligned
subtype ADDR_16BIT_RAM_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto 1; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 2 bytes aligned
subtype ADDR_32BIT_RAM_RANGE is natural range SOC_MAX_ADDR_RAM_BIT-1 downto minAddrBit; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 4 bytes aligned
subtype ADDR_BIT_SDRAM_RANGE is natural range SOC_MAX_ADDR_SDRAM_BIT-1 downto 0; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 1 byte aligned
subtype ADDR_16BIT_SDRAM_RANGE is natural range SOC_MAX_ADDR_SDRAM_BIT-1 downto 1; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 2 bytes aligned
subtype ADDR_32BIT_SDRAM_RANGE is natural range SOC_MAX_ADDR_SDRAM_BIT-1 downto minAddrBit; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 4 bytes aligned
subtype ADDR_BIT_WB_SDRAM_RANGE is natural range SOC_MAX_ADDR_WB_SDRAM_BIT-1 downto 0; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 1 byte aligned
subtype ADDR_16BIT_WB_SDRAM_RANGE is natural range SOC_MAX_ADDR_WB_SDRAM_BIT-1 downto 1; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 2 bytes aligned
subtype ADDR_32BIT_WB_SDRAM_RANGE is natural range SOC_MAX_ADDR_WB_SDRAM_BIT-1 downto minAddrBit; -- Address range of external RAM (BRAM, Dynamic, Static etc) - 4 bytes aligned
-- subtype ADDR_DECODE_BRAM_RANGE is natural range maxAddrBit-1 downto SOC_MAX_ADDR_BRAM_BIT; -- Decode range for selection of the BRAM within the address space.
-- subtype ADDR_DECODE_RAM_RANGE is natural range maxAddrBit-1 downto SOC_MAX_ADDR_RAM_BIT; -- Decode range for selection of the RAM within the address space.
subtype IO_DECODE_RANGE is natural range maxAddrBit-WB_ACTIVE-1 downto maxIOBit; -- Upper bits in memory defining the IO block within the address space for the EVO cpu IO. All other models use ioBit.
-- subtype WB_IO_DECODE_RANGE is natural range maxAddrBit-1 downto maxIOBit; -- Upper bits in memory defining the IO block within the address space for the EVO cpu IO. All other models use ioBit.
-- Device options
type CardType_t is (SD_CARD_E, SDHC_CARD_E); -- Define the different types of SD cards.
type CardType_t is (SD_CARD_E, SDHC_CARD_E); -- Define the different types of SD cards.
-- Potential logic state constants.
constant YES : std_logic := '1';
constant NO : std_logic := '0';
constant HI : std_logic := '1';
constant LO : std_logic := '0';
constant ONE : std_logic := '1';
constant ZERO : std_logic := '0';
constant HIZ : std_logic := 'Z';
------------------------------------------------------------
-- Constants
------------------------------------------------------------
constant YES : std_logic := '1';
constant NO : std_logic := '0';
constant HI : std_logic := '1';
constant LO : std_logic := '0';
constant ONE : std_logic := '1';
constant ZERO : std_logic := '0';
constant HIZ : std_logic := 'Z';
------------------------------------------------------------
-- Function prototypes
------------------------------------------------------------
-- Find the maximum of two integers.
function IntMax(a : in integer; b : in integer) return integer;
------------------------------------------------------------
-- Records
@@ -156,7 +267,7 @@ package zpu_soc_pkg is
------------------------------------------------------------
component dualport_ram is
port (
clk : in std_logic;
clk : in std_logic;
memAWriteEnable : in std_logic;
memAAddr : in std_logic_vector(ADDR_32BIT_RANGE);
memAWrite : in std_logic_vector(WORD_32BIT_RANGE);
@@ -201,27 +312,27 @@ package zpu_soc_pkg is
INIT_SPI_FREQ_G : real := 0.4; -- Slow SPI clock freq. during initialization (MHz).
SPI_FREQ_G : real := 25.0; -- Operational SPI freq. to the SD card (MHz).
BLOCK_SIZE_G : natural := 512; -- Number of bytes in an SD card block or sector.
CARD_TYPE_G : CardType_t := SD_CARD_E -- Type of SD card connected to this controller.
CARD_TYPE_G : CardType_t := SD_CARD_E -- Type of SD card connected to this controller.
);
port (
-- Host-side interface signals.
clk_i : in std_logic; -- Master clock.
reset_i : in std_logic := NO; -- active-high, synchronous reset.
rd_i : in std_logic := NO; -- active-high read block request.
wr_i : in std_logic := NO; -- active-high write block request.
continue_i : in std_logic := NO; -- If true, inc address and continue R/W.
clk_i : in std_logic; -- Master clock.
reset_i : in std_logic := NO; -- active-high, synchronous reset.
rd_i : in std_logic := NO; -- active-high read block request.
wr_i : in std_logic := NO; -- active-high write block request.
continue_i : in std_logic := NO; -- If true, inc address and continue R/W.
addr_i : in std_logic_vector(31 downto 0) := x"00000000"; -- Block address.
data_i : in std_logic_vector(7 downto 0) := x"00"; -- Data to write to block.
data_o : out std_logic_vector(7 downto 0) := x"00"; -- Data read from block.
busy_o : out std_logic; -- High when controller is busy performing some operation.
hndShk_i : in std_logic; -- High when host has data to give or has taken data.
hndShk_o : out std_logic; -- High when controller has taken data or has data to give.
busy_o : out std_logic; -- High when controller is busy performing some operation.
hndShk_i : in std_logic; -- High when host has data to give or has taken data.
hndShk_o : out std_logic; -- High when controller has taken data or has data to give.
error_o : out std_logic_vector(15 downto 0) := (others => NO);
-- I/O signals to the external SD card.
cs_bo : out std_logic := HI; -- Active-low chip-select.
sclk_o : out std_logic := LO; -- Serial clock to SD card.
mosi_o : out std_logic := HI; -- Serial data output to SD card.
miso_i : in std_logic := ZERO -- Serial data input from SD card.
cs_bo : out std_logic := HI; -- Active-low chip-select.
sclk_o : out std_logic := LO; -- Serial clock to SD card.
mosi_o : out std_logic := HI; -- Serial data output to SD card.
miso_i : in std_logic := ZERO -- Serial data input from SD card.
);
end component;
@@ -243,4 +354,34 @@ package body zpu_soc_pkg is
return a;
end function IntMax;
-- Find the number of bits required to represent an integer.
function log2ceil(arg : positive) return natural is
variable tmp : positive := 1;
variable log : natural := 0;
begin
if arg = 1 then
return 0;
end if;
while arg > tmp loop
tmp := tmp * 2;
log := log + 1;
end loop;
return log;
end function;
-- Function to calculate the number of whole 'clock' cycles in a given time period, the period being in ns.
function clockTicks(period : in integer; clock : in integer) return integer is
variable ticks : real;
variable fracTicks : real;
begin
ticks := (Real(period) * Real(clock)) / 1000000000.0;
fracTicks := ticks - CEIL(ticks);
if fracTicks > 0.0001 then
return Integer(CEIL(ticks + 1.0));
else
return Integer(CEIL(ticks));
end if;
end function;
end package body;