Tidying
This commit is contained in:
Philip Smart
@@ -1,73 +0,0 @@
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#!/bin/bash
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make clean
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make ZPUTA_BASEADDR=0x00000 ZPUTA_APPADDR=0x10000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x00000_0x10000
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mv bin bin.0x00000_0x10000
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make clean
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make ZPUTA_BASEADDR=0x01000 ZPUTA_APPADDR=0x10000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x01000_0x10000
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mv bin bin.0x01000_0x10000
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make clean
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make ZPUTA_BASEADDR=0x02000 ZPUTA_APPADDR=0x10000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x02000_0x10000
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mv bin bin.0x02000_0x10000
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make clean
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make ZPUTA_BASEADDR=0x40000 ZPUTA_APPADDR=0x50000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x40000_0x50000
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mv bin bin.0x40000_0x50000
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make clean
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make ZPUTA_BASEADDR=0x01000 ZPUTA_APPADDR=0x0B000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x01000_0x0B000
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mv bin bin.0x01000_0x0B000
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make clean
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make ZPUTA_BASEADDR=0x01000 ZPUTA_APPADDR=0x0C000
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if [ $? != 0 ]; then
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echo "Aborting, failed to build!"
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exit 1
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fi
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mkdir -p bin
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rm -f bin/*
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make install
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rm -fr bin.0x01000_0x0C000
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mv bin bin.0x01000_0x0C000
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@@ -1,216 +0,0 @@
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#########################################################################################################
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##
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## Name: Makefile
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## Created: January 2019
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## Author(s): Philip Smart
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## Description: App Makefile - Build an App for the ZPU Test Application (zputa)
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## This makefile builds an app which is stored on an SD card and called by the ZPUTA
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## test application. The app generally is for testing some component where the code is
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## not built into ZPUTA or memory restrictions prohibit it being built in.
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##
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## Credits:
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## Copyright: (c) 2019 Philip Smart <philip.smart@net2net.org>
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##
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## History: August 2019 - Initial Makefile created for template use.
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##
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## Notes: Optional component enables:
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## USELOADB - The Byte write command is implemented in hw#sw so use it.
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## USE_BOOT_ROM - The target is ROM so dont use initialised data.
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## MINIMUM_FUNTIONALITY - Minimise functionality to limit code size.
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## COREMARK_TEST - Add the CoreMark test suite.
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## DHYRSTONE_TEST - Add the Dhrystone test suite.
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## USE_SDCARD - Add the SDCard logic.
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##
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#########################################################################################################
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## This source file is free software: you can redistribute it and/or modify
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||||
## it under the terms of the GNU General Public License as published
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||||
## by the Free Software Foundation, either version 3 of the License, or
|
||||
## (at your option) any later version.
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||||
##
|
||||
## This source file is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
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||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program. If not, see <http://www.gnu.org/licenses/>.
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#########################################################################################################
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BASE = zpu-elf
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CC = $(BASE)-gcc
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LD = $(BASE)-gcc
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AS = $(BASE)-as
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CP = $(BASE)-objcopy
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DUMP = $(BASE)-objdump
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APP_NAME = hello
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BASEDIR = ../../..
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SWDIR = $(BASEDIR)/software
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ROMGEN = $(SWDIR)/utils/zpugen
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IOCPDIR = $(SWDIR)/iocp
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ZPUTADIR = $(SWDIR)/zputa
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# we use mincrt0.s from here
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STARTUP_DIR = $(SWDIR)/startup
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# we fetch RAM prologue / epilogue from here
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RTL_DIR = $(BASEDIR)/devices/BRAM
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# we use printf from here
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COMMON_DIR = $(SWDIR)/common
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FATFS_DIR = $(SWDIR)/common/FatFS
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PFS_DIR = $(SWDIR)/common/PetitFS
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INCLUDE_DIR = $(SWDIR)/include
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# Linker mapping file spec file.
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LINKMAPAPP = $(STARTUP_DIR)/app_standalone.ld
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# Working directory to build object files.
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BUILD_DIR=$(APP_NAME)_obj
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# Startup code.
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MINSTARTUP_SRC = $(STARTUP_DIR)/appcrt0.s
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MINSTARTUP_OBJ = $(patsubst $(STARTUP_DIR)/%.s,$(BUILD_DIR)/%.o,$(MINSTARTUP_SRC))
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# Common modules needed for this app.
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COMMON_SRC = $(COMMON_DIR)/syscalls.c $(COMMON_DIR)/malloc.c
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COMMON_OBJ = $(patsubst $(COMMON_DIR)/%.c,$(BUILD_DIR)/%.o,$(COMMON_SRC))
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MAIN_PRJ_APP = $(APP_NAME)
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MAIN_SRC = $(APP_NAME).c
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MAIN_OBJ = $(COMMON_OBJ) $(patsubst %.c,$(BUILD_DIR)/%.o,$(MAIN_SRC))
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# Commandline options for each tool.
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#ZPUOPTS= -mno-poppcrel -mno-pushspadd -mno-callpcrel -mno-byteop -mno-shortop -mno-neg -mno-div -mno-mod # No-neg requires bugfixed toolchain
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#ZPUOPTS= -mmult -mno-neg -mno-mod # No-neg requires bugfixed toolchain
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ZPUOPTS=-mmult \
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-mdiv \
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-mmod \
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-mneg \
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-mloadsp \
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-mstoresp \
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-mpushspadd \
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-mneqbranch \
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-maddsp \
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-mashiftrt \
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-mashiftl \
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-mlshiftrt \
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-mcall \
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-mcallpcrel \
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-mshortop \
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-mbyteop \
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-meq \
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-mcompare \
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-mpoppcrel \
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-mmemreg
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#CFLAGS = -I. -I$(INCLUDE_DIR) -I$(COMMON_DIR)/. -c -Os $(ZPUOPTS) -DPRINTF_HEX_ONLY -DDISABLE_PRINTF # -DDISABLE_UART_TX -DDISABLE_UART_RX
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CFLAGS = -I. -I$(COMMON_DIR) -I$(FATFS_DIR) -I$(INCLUDE_DIR) -c -O1 -ffunction-sections -fdata-sections $(ZPUOPTS) -DZPU
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# Enable debug output.
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OFLAGS += -DDEBUG
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# Assume loadb as implemented in hardware or software (time penalty).
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OFLAGS += -DUSELOADB
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# Dont allow an initialised DATA segment so binary can be located in ROM.
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#OFLAGS += -DUSE_BOOT_ROM
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# Remove functionality to create a minimal system for limited space.
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#OFLAGS += -DMINIMUM_FUNCTIONALITY
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# Enable SD Card functionality
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OFLAGS += -DUSE_SDCARD
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FLAGS_STR = -DFLAGS_STR="$(CFLAGS)"
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LFLAGS = -nostartfiles -Wl,--gc-sections -Wl,--relax -Os
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#
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# Assembler flags.
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ASFLAGS = -I. -I$(COMMON_DIR) -I$(INCLUDE_DIR) -I$(STARTUP_DIR) --defsym ZPUTA_BASEADDR=0x2000
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#
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# Our target.
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all: $(BUILD_DIR) $(MAIN_PRJ_APP).zpu $(MAIN_PRJ_APP).srec $(MAIN_PRJ_APP).rpt $(MAIN_PRJ_APP).lss $(MAIN_PRJ_APP).dmp $(ROMGEN)
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clean:
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rm -f $(BUILD_DIR)/*.o *.hex *.lss *.elf *.map *.lst *.srec $(MAIN_PRJ_APP).zpu *~ */*.o *.bin *.srec *.dmp *.vhd *.rpt
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# Convert ELF binary to bin file.
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%.bin: %.elf
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@$(CP) -O binary $< $@
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# Convert ELF binary to app file.
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%.zpu: %.elf
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@$(CP) -O binary $< $@
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# Convert ELF to srec format for serial upload.
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%.srec: %.elf
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@$(CP) -O srec $< $@
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%.rpt: %.elf
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@echo ""
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@echo >$@ -n "Start of code:\t"
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@$(DUMP) -x $< | grep >>$@ _ramstart
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@echo >>$@ -n " BOOT start:\t"
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@$(DUMP) -x $< | grep >>$@ __boot_start__
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@echo >>$@ -n " end: \t"
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@$(DUMP) -x $< | grep >>$@ __boot_end__
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@echo >>$@ -n " TEXT start:\t"
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@$(DUMP) -x $< | grep >>$@ __text_start__
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@echo >>$@ -n " end: \t"
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@$(DUMP) -x $< | grep >>$@ __text_end__
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@echo >>$@ -n " RODATA start:\t"
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@$(DUMP) -x $< | grep >>$@ __rodata_start__
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@echo >>$@ -n " end: \t"
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@$(DUMP) -x $< | grep >>$@ __rodata_end__
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@echo >>$@ -n "End of code:\t"
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@$(DUMP) -x $< | grep >>$@ _ramend
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@echo >>$@ -n "Start of data:\t"
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@$(DUMP) -x $< | grep >>$@ _datastart
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@echo >>$@ -n " DATA start: \t"
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@$(DUMP) -x $< | grep >>$@ __data_start__
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@echo >>$@ -n " end: \t"
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@$(DUMP) -x $< | grep >>$@ __data_end__
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||||
@echo >>$@ -n " BSS start: \t"
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||||
@$(DUMP) -x $< | grep >>$@ __bss_start__
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@echo >>$@ -n " end: \t"
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||||
@$(DUMP) -x $< | grep >>$@ __bss_end__
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||||
@echo >>$@ -n "End of data:\t"
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@$(DUMP) -x $< | grep >>$@ _dataend
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@cat $@
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%.dmp: %.elf
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@$(DUMP) -x $< >>$@
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|
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# Create extended listing file from ELF output file.
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# testing: option -C
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%.lss: %.elf
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@echo
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@$(DUMP) -h -S -C $< > $@
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$(ROMGEN): $(SWDIR)/utils/zpugen.c
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gcc -o $(SWDIR)/utils/zpugen $(SWDIR)/utils/zpugen.c
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||||
|
||||
# Link - this produces an ELF binary.
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|
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$(MAIN_PRJ_APP).elf: $(MINSTARTUP_OBJ) $(MAIN_OBJ)
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$(LD) $(LFLAGS) -T $(LINKMAPAPP) -o $@ $+ $(LIBS)
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||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile
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$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
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||||
|
||||
$(BUILD_DIR)/%.o: %.cpp Makefile
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||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(COMMON_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
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||||
|
||||
$(BUILD_DIR)/%.o: $(FATFS_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(PFS_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s
|
||||
$(AS) $(ASFLAGS) -o $@ $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(STARTUP_DIR)/%.s
|
||||
$(AS) $(ASFLAGS) -o $@ $<
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $(BUILD_DIR)
|
||||
|
||||
@@ -1,216 +0,0 @@
|
||||
#########################################################################################################
|
||||
##
|
||||
## Name: Makefile
|
||||
## Created: January 2019
|
||||
## Author(s): Philip Smart
|
||||
## Description: App Makefile - Build an App for the ZPU Test Application (zputa)
|
||||
## This makefile builds an app which is stored on an SD card and called by the ZPUTA
|
||||
## test application. The app generally is for testing some component where the code is
|
||||
## not built into ZPUTA or memory restrictions prohibit it being built in.
|
||||
##
|
||||
## Credits:
|
||||
## Copyright: (c) 2019 Philip Smart <philip.smart@net2net.org>
|
||||
##
|
||||
## History: August 2019 - Initial Makefile created for template use.
|
||||
##
|
||||
## Notes: Optional component enables:
|
||||
## USELOADB - The Byte write command is implemented in hw#sw so use it.
|
||||
## USE_BOOT_ROM - The target is ROM so dont use initialised data.
|
||||
## MINIMUM_FUNTIONALITY - Minimise functionality to limit code size.
|
||||
## COREMARK_TEST - Add the CoreMark test suite.
|
||||
## DHYRSTONE_TEST - Add the Dhrystone test suite.
|
||||
## USE_SDCARD - Add the SDCard logic.
|
||||
##
|
||||
#########################################################################################################
|
||||
## This source file is free software: you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published
|
||||
## by the Free Software Foundation, either version 3 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This source file is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#########################################################################################################
|
||||
BASE = zpu-elf
|
||||
CC = $(BASE)-gcc
|
||||
LD = $(BASE)-gcc
|
||||
AS = $(BASE)-as
|
||||
CP = $(BASE)-objcopy
|
||||
DUMP = $(BASE)-objdump
|
||||
|
||||
APP_NAME = hello
|
||||
BASEDIR = ../../..
|
||||
SWDIR = $(BASEDIR)/software
|
||||
ROMGEN = $(SWDIR)/utils/zpugen
|
||||
IOCPDIR = $(SWDIR)/iocp
|
||||
ZPUTADIR = $(SWDIR)/zputa
|
||||
|
||||
# we use mincrt0.s from here
|
||||
STARTUP_DIR = $(SWDIR)/startup
|
||||
|
||||
# we fetch RAM prologue / epilogue from here
|
||||
RTL_DIR = $(BASEDIR)/devices/BRAM
|
||||
|
||||
# we use printf from here
|
||||
COMMON_DIR = $(SWDIR)/common
|
||||
FATFS_DIR = $(SWDIR)/common/FatFS
|
||||
PFS_DIR = $(SWDIR)/common/PetitFS
|
||||
INCLUDE_DIR = $(SWDIR)/include
|
||||
|
||||
# Linker mapping file spec file.
|
||||
LINKMAPAPP = $(STARTUP_DIR)/app_standalone.ld
|
||||
|
||||
# Working directory to build object files.
|
||||
BUILD_DIR=$(APP_NAME)_obj
|
||||
|
||||
# Startup code.
|
||||
MINSTARTUP_SRC = $(STARTUP_DIR)/appcrt0.s
|
||||
MINSTARTUP_OBJ = $(patsubst $(STARTUP_DIR)/%.s,$(BUILD_DIR)/%.o,$(MINSTARTUP_SRC))
|
||||
|
||||
# Common modules needed for this app.
|
||||
COMMON_SRC = $(COMMON_DIR)/syscalls.c $(COMMON_DIR)/malloc.c
|
||||
COMMON_OBJ = $(patsubst $(COMMON_DIR)/%.c,$(BUILD_DIR)/%.o,$(COMMON_SRC))
|
||||
|
||||
MAIN_PRJ_APP = $(APP_NAME)
|
||||
MAIN_SRC = $(APP_NAME).c
|
||||
MAIN_OBJ = $(COMMON_OBJ) $(patsubst %.c,$(BUILD_DIR)/%.o,$(MAIN_SRC))
|
||||
|
||||
# Commandline options for each tool.
|
||||
|
||||
#ZPUOPTS= -mno-poppcrel -mno-pushspadd -mno-callpcrel -mno-byteop -mno-shortop -mno-neg -mno-div -mno-mod # No-neg requires bugfixed toolchain
|
||||
#ZPUOPTS= -mmult -mno-neg -mno-mod # No-neg requires bugfixed toolchain
|
||||
ZPUOPTS=-mmult \
|
||||
-mdiv \
|
||||
-mmod \
|
||||
-mneg \
|
||||
-mloadsp \
|
||||
-mstoresp \
|
||||
-mpushspadd \
|
||||
-mneqbranch \
|
||||
-maddsp \
|
||||
-mashiftrt \
|
||||
-mashiftl \
|
||||
-mlshiftrt \
|
||||
-mcall \
|
||||
-mcallpcrel \
|
||||
-mshortop \
|
||||
-mbyteop \
|
||||
-meq \
|
||||
-mcompare \
|
||||
-mpoppcrel \
|
||||
-mmemreg
|
||||
#CFLAGS = -I. -I$(INCLUDE_DIR) -I$(COMMON_DIR)/. -c -Os $(ZPUOPTS) -DPRINTF_HEX_ONLY -DDISABLE_PRINTF # -DDISABLE_UART_TX -DDISABLE_UART_RX
|
||||
CFLAGS = -I. -I$(COMMON_DIR) -I$(FATFS_DIR) -I$(INCLUDE_DIR) -c -O1 -ffunction-sections -fdata-sections $(ZPUOPTS) -DZPU
|
||||
# Enable debug output.
|
||||
OFLAGS += -DDEBUG
|
||||
# Assume loadb as implemented in hardware or software (time penalty).
|
||||
OFLAGS += -DUSELOADB
|
||||
# Dont allow an initialised DATA segment so binary can be located in ROM.
|
||||
#OFLAGS += -DUSE_BOOT_ROM
|
||||
# Remove functionality to create a minimal system for limited space.
|
||||
#OFLAGS += -DMINIMUM_FUNCTIONALITY
|
||||
# Enable SD Card functionality
|
||||
OFLAGS += -DUSE_SDCARD
|
||||
FLAGS_STR = -DFLAGS_STR="$(CFLAGS)"
|
||||
LFLAGS = -nostartfiles -Wl,--gc-sections -Wl,--relax -Os
|
||||
#
|
||||
# Assembler flags.
|
||||
ASFLAGS = -I. -I$(COMMON_DIR) -I$(INCLUDE_DIR) -I$(STARTUP_DIR) --defsym ZPUTA_BASEADDR=0x2000
|
||||
#
|
||||
|
||||
# Our target.
|
||||
all: $(BUILD_DIR) $(MAIN_PRJ_APP).zpu $(MAIN_PRJ_APP).srec $(MAIN_PRJ_APP).rpt $(MAIN_PRJ_APP).lss $(MAIN_PRJ_APP).dmp $(ROMGEN)
|
||||
|
||||
clean:
|
||||
rm -f $(BUILD_DIR)/*.o *.hex *.lss *.elf *.map *.lst *.srec $(MAIN_PRJ_APP).zpu *~ */*.o *.bin *.srec *.dmp *.vhd *.rpt
|
||||
|
||||
|
||||
# Convert ELF binary to bin file.
|
||||
%.bin: %.elf
|
||||
@$(CP) -O binary $< $@
|
||||
|
||||
# Convert ELF binary to app file.
|
||||
%.zpu: %.elf
|
||||
@$(CP) -O binary $< $@
|
||||
|
||||
# Convert ELF to srec format for serial upload.
|
||||
%.srec: %.elf
|
||||
@$(CP) -O srec $< $@
|
||||
|
||||
%.rpt: %.elf
|
||||
@echo ""
|
||||
@echo >$@ -n "Start of code:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ _ramstart
|
||||
@echo >>$@ -n " BOOT start:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ __boot_start__
|
||||
@echo >>$@ -n " end: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __boot_end__
|
||||
@echo >>$@ -n " TEXT start:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ __text_start__
|
||||
@echo >>$@ -n " end: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __text_end__
|
||||
@echo >>$@ -n " RODATA start:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ __rodata_start__
|
||||
@echo >>$@ -n " end: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __rodata_end__
|
||||
@echo >>$@ -n "End of code:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ _ramend
|
||||
@echo >>$@ -n "Start of data:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ _datastart
|
||||
@echo >>$@ -n " DATA start: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __data_start__
|
||||
@echo >>$@ -n " end: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __data_end__
|
||||
@echo >>$@ -n " BSS start: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __bss_start__
|
||||
@echo >>$@ -n " end: \t"
|
||||
@$(DUMP) -x $< | grep >>$@ __bss_end__
|
||||
@echo >>$@ -n "End of data:\t"
|
||||
@$(DUMP) -x $< | grep >>$@ _dataend
|
||||
@cat $@
|
||||
|
||||
%.dmp: %.elf
|
||||
@$(DUMP) -x $< >>$@
|
||||
|
||||
# Create extended listing file from ELF output file.
|
||||
# testing: option -C
|
||||
%.lss: %.elf
|
||||
@echo
|
||||
@$(DUMP) -h -S -C $< > $@
|
||||
|
||||
$(ROMGEN): $(SWDIR)/utils/zpugen.c
|
||||
gcc -o $(SWDIR)/utils/zpugen $(SWDIR)/utils/zpugen.c
|
||||
|
||||
# Link - this produces an ELF binary.
|
||||
|
||||
$(MAIN_PRJ_APP).elf: $(MINSTARTUP_OBJ) $(MAIN_OBJ)
|
||||
$(LD) $(LFLAGS) -T $(LINKMAPAPP) -o $@ $+ $(LIBS)
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: %.cpp Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(COMMON_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(FATFS_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(PFS_DIR)/%.c Makefile
|
||||
$(CC) $(CFLAGS) $(OFLAGS) -o $@ -c $<
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s
|
||||
$(AS) $(ASFLAGS) -o $@ $<
|
||||
|
||||
$(BUILD_DIR)/%.o: $(STARTUP_DIR)/%.s
|
||||
$(AS) $(ASFLAGS) -o $@ $<
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $(BUILD_DIR)
|
||||
|
||||
@@ -1,81 +0,0 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Name: hello.c
|
||||
// Created: July 2019
|
||||
// Author(s): Philip Smart
|
||||
// Description: Standalone App for the ZPU test application.
|
||||
// This program implements a loadable appliation which can be loaded from SD card by
|
||||
// the ZPUTA application. The idea is that commands or programs can be stored on the
|
||||
// SD card and executed by ZPUTA just like an OS such as Linux. The primary purpose
|
||||
// is to be able to minimise the size of ZPUTA for applications where minimal ram is
|
||||
// available.
|
||||
//
|
||||
// Credits:
|
||||
// Copyright: (c) 2019 Philip Smart <philip.smart@net2net.org>
|
||||
//
|
||||
// History: July 2019 - Initial framework creation.
|
||||
//
|
||||
// Notes: See Makefile to enable/disable conditional components
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// This source file is free software: you can redistribute it and#or modify
|
||||
// it under the terms of the GNU General Public License as published
|
||||
// by the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This source file is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
#include <zstdio.h>
|
||||
//#include <stdlib.h>
|
||||
//#include <string.h>
|
||||
#include <zpu-types.h>
|
||||
#include "zpu_soc.h"
|
||||
//#include "uart.h"
|
||||
#include "interrupts.h"
|
||||
#include "ff.h" /* Declarations of FatFs API */
|
||||
#include "diskio.h"
|
||||
#include <zstdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <fcntl.h>
|
||||
#include <sys/stat.h>
|
||||
#include "xprintf.h"
|
||||
#include "utils.h"
|
||||
#include "zputa_app.h"
|
||||
#include "hello.h"
|
||||
|
||||
// Version info.
|
||||
#define VERSION "v1.0"
|
||||
#define VERSION_DATE "18/07/2019"
|
||||
#define PROGRAM_NAME "HELLO"
|
||||
|
||||
static int retcode = 20;
|
||||
int mytest(char *ptr)
|
||||
{
|
||||
xprintf("String received: %s\n", ptr);
|
||||
return(retcode++);
|
||||
}
|
||||
|
||||
// Main entry and start point of a ZPUTA Application. Only 2 parameters are catered for and a 32bit return code, additional parameters can be added by changing the appcrt0.s
|
||||
// startup code to add them to the stack prior to app() call.
|
||||
//
|
||||
// Return code is saved in _memreg by the C compiler, this is transferred to _memreg in ZPUTA in appcrt0.s prior to return.
|
||||
//
|
||||
uint32_t app(uint32_t param1, uint32_t param2)
|
||||
{
|
||||
// Initialisation.
|
||||
//
|
||||
|
||||
xprintf("Hello from me....\n");
|
||||
xprintf("This is memreg=%0lx, freg=%0lx\n", param1, param2);
|
||||
int ret=mytest((char *)param1);
|
||||
xprintf("This is the size of the Insn BRAM=%lx\n", cfgSoC->sizeInsnBRAM);
|
||||
|
||||
return(0xaa);
|
||||
}
|
||||
@@ -1,307 +0,0 @@
|
||||
|
||||
hello.elf: file format elf32-zpu
|
||||
hello.elf
|
||||
architecture: zpu, flags 0x00000112:
|
||||
EXEC_P, HAS_SYMS, D_PAGED
|
||||
start address 0x00058100
|
||||
|
||||
Program Header:
|
||||
LOAD off 0x00000000 vaddr 0x00057f6c paddr 0x00057f6c align 2**0
|
||||
filesz 0x0000009d memsz 0x0000009d flags r--
|
||||
LOAD off 0x0000009d vaddr 0x00058100 paddr 0x00058100 align 2**0
|
||||
filesz 0x0000011f memsz 0x0000011f flags r-x
|
||||
LOAD off 0x000001bc vaddr 0x00058220 paddr 0x00058220 align 2**0
|
||||
filesz 0x00000004 memsz 0x00000018 flags rw-
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .fixed_vectors 00000009 00058000 00058000 00000094 2**0
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
1 .text 000000ac 00058100 00058100 0000009d 2**0
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .rodata 00000073 000581ac 000581ac 00000149 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
3 .data 00000004 00058220 00058220 000001bc 2**2
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
4 .bss 00000014 00058224 00058224 000001c0 2**2
|
||||
ALLOC
|
||||
5 .debug_abbrev 00000094 00000000 00000000 000001c0 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
6 .debug_str 000000e6 00000000 00000000 00000254 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
7 .debug_info 000000ea 00000000 00000000 0000033a 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
8 .debug_line 00000175 00000000 00000000 00000424 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
9 .debug_frame 00000034 00000000 00000000 0000059c 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
10 .debug_pubnames 00000028 00000000 00000000 000005d0 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
11 .debug_aranges 00000028 00000000 00000000 000005f8 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
SYMBOL TABLE:
|
||||
00058000 l d .fixed_vectors 00000000
|
||||
00058100 l d .text 00000000
|
||||
000581ac l d .rodata 00000000
|
||||
00058220 l d .data 00000000
|
||||
00058224 l d .bss 00000000
|
||||
00000000 l d .debug_abbrev 00000000
|
||||
00000000 l d .debug_str 00000000
|
||||
00000000 l d .debug_info 00000000
|
||||
00000000 l d .debug_line 00000000
|
||||
00000000 l d .debug_frame 00000000
|
||||
00000000 l d .debug_pubnames 00000000
|
||||
00000000 l d .debug_aranges 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l df *ABS* 00000000 zpu_macros.s
|
||||
00000000 l df *ABS* 00000000 appcrt0.s
|
||||
00002000 l *ABS* 00000000 ZPUTA_BASEADDR
|
||||
00000020 l *ABS* 00000000 funcNext
|
||||
00002560 l *ABS* 00000000 funcAddr
|
||||
00058103 l .text 00000000 .clearloop
|
||||
00058117 l .text 00000000 .done
|
||||
0005813f l .text 00000000 .appret
|
||||
00000000 l df *ABS* 00000000 hello.c
|
||||
00058220 l O .data 00000004 retcode
|
||||
00000000 l df *ABS* 00000000 sbrk.c
|
||||
00000000 l .debug_abbrev 00000000 .Ldebug_abbrev0
|
||||
00000000 l .debug_line 00000000 .Ldebug_line0
|
||||
00000000 l .debug_frame 00000000 .Lframe0
|
||||
00000000 l .debug_info 00000000 .Ldebug_info0
|
||||
00002140 g *ABS* 00000000 uxatoi
|
||||
00002240 g *ABS* 00000000 rtcSet
|
||||
00058220 g .data 00000000 __data_start__
|
||||
000020c0 g *ABS* 00000000 xgets
|
||||
00002520 g *ABS* 00000000 getStrParam
|
||||
000020e0 g *ABS* 00000000 xfgets
|
||||
000581ac g *ABS* 00000000 __text_end__
|
||||
00058224 g .bss 00000000 _memreg
|
||||
0005800c g *ABS* 00000000 __text_start__
|
||||
00058143 g .text 00000000 _syscall
|
||||
00002220 g *ABS* 00000000 memoryDump
|
||||
00002400 g *ABS* 00000000 f_rename
|
||||
00002100 g *ABS* 00000000 xfputs
|
||||
00058220 g *ABS* 00000000 __rodata_end__
|
||||
00002440 g *ABS* 00000000 f_chdir
|
||||
00002320 g *ABS* 00000000 f_truncate
|
||||
00058224 g .bss 00000000 __bss_start__
|
||||
00002120 g *ABS* 00000000 xatoi
|
||||
000021c0 g *ABS* 00000000 crc32_init
|
||||
00002380 g *ABS* 00000000 f_closedir
|
||||
00000000 *UND* 00000000 _sbrk
|
||||
000023e0 g *ABS* 00000000 f_unlink
|
||||
00002160 g *ABS* 00000000 xprintf
|
||||
00058009 g *ABS* 00000000 __boot_end__
|
||||
000581ac g .text 00000000 __ctors_start__
|
||||
00058220 g *ABS* 00000000 _ramend
|
||||
00002200 g *ABS* 00000000 get_dword
|
||||
00002460 g *ABS* 00000000 f_chdrive
|
||||
00058145 g F .text 00000029 mytest
|
||||
00058224 g .data 00000000 __data_end__
|
||||
000581ac g *ABS* 00000000 __rodata_start__
|
||||
00058238 g .bss 00000000 __bss_end__
|
||||
00002540 g *ABS* 00000000 getUintParam
|
||||
000020a0 g *ABS* 00000000 xputs
|
||||
000024c0 g *ABS* 00000000 f_setlabel
|
||||
000022a0 g *ABS* 00000000 f_close
|
||||
00058000 g .fixed_vectors 00000000 _start
|
||||
000022c0 g *ABS* 00000000 f_read
|
||||
000023a0 g *ABS* 00000000 f_readdir
|
||||
00000000 *UND* 00000000 addresscheck
|
||||
00058000 g *ABS* 00000000 _ramstart
|
||||
00002080 g *ABS* 00000000 xfputc
|
||||
00000000 *UND* 00000000 getserial
|
||||
00058224 g .bss 00000000 __bss_start
|
||||
00000000 *UND* 00000000 main
|
||||
00002340 g *ABS* 00000000 f_sync
|
||||
000581ac g .text 00000000 __dtors_end__
|
||||
00002500 g *ABS* 00000000 f_mkfs
|
||||
000024e0 g *ABS* 00000000 f_mount
|
||||
00002360 g *ABS* 00000000 f_opendir
|
||||
00002040 g *ABS* 00000000 putc
|
||||
000581ac g .text 00000000 __ctors_end__
|
||||
00002060 g *ABS* 00000000 xputc
|
||||
00002300 g *ABS* 00000000 f_lseek
|
||||
00058100 w F .text 000000e3 _premain
|
||||
00058220 g *ABS* 00000000 _datastart
|
||||
00058220 g .data 00000000 _data
|
||||
00002420 g *ABS* 00000000 f_stat
|
||||
00058234 g O .bss 00000004 cfgSoC
|
||||
00000400 g *ABS* 00000000 _inthandler_fptr
|
||||
00000000 *UND* 00000000 _cpu_config
|
||||
00058238 g .bss 00000000 _end
|
||||
000022e0 g *ABS* 00000000 f_write
|
||||
0005816a g F .text 0000004d app
|
||||
00002280 g *ABS* 00000000 f_open
|
||||
00002020 g *ABS* 00000000 break
|
||||
000023c0 g *ABS* 00000000 f_mkdir
|
||||
00002180 g *ABS* 00000000 xsprintf
|
||||
000581ac g .text 00000000 __dtors_start__
|
||||
0001fff8 g *ABS* 00000000 _stack
|
||||
00058238 g *ABS* 00000000 _dataend
|
||||
000024a0 g *ABS* 00000000 f_getlabel
|
||||
00002480 g *ABS* 00000000 f_getfree
|
||||
00002560 g *ABS* 00000000 set_serial_output
|
||||
00058000 g *ABS* 00000000 __boot_start__
|
||||
000021a0 g *ABS* 00000000 xfprintf
|
||||
00002260 g *ABS* 00000000 rtcGet
|
||||
000021e0 g *ABS* 00000000 crc32_addword
|
||||
|
||||
|
||||
|
||||
hello.elf: file format elf32-zpu
|
||||
hello.elf
|
||||
architecture: zpu, flags 0x00000112:
|
||||
EXEC_P, HAS_SYMS, D_PAGED
|
||||
start address 0x00058100
|
||||
|
||||
Program Header:
|
||||
LOAD off 0x00000000 vaddr 0x00057f6c paddr 0x00057f6c align 2**0
|
||||
filesz 0x000000b4 memsz 0x000000b4 flags r--
|
||||
LOAD off 0x000000b4 vaddr 0x00058100 paddr 0x00058100 align 2**0
|
||||
filesz 0x0000011f memsz 0x0000011f flags r-x
|
||||
LOAD off 0x000001d3 vaddr 0x00058220 paddr 0x00058220 align 2**0
|
||||
filesz 0x00000004 memsz 0x0000001c flags rw-
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .fixed_vectors 00000020 00058000 00058000 00000094 2**4
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
1 .text 000000ac 00058100 00058100 000000b4 2**0
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .rodata 00000073 000581ac 000581ac 00000160 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
3 .data 00000004 00058220 00058220 000001d3 2**2
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
4 .bss 00000018 00058224 00058224 000001d7 2**2
|
||||
ALLOC
|
||||
5 .debug_abbrev 00000094 00000000 00000000 000001d7 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
6 .debug_str 000000e6 00000000 00000000 0000026b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
7 .debug_info 000000ea 00000000 00000000 00000351 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
8 .debug_line 00000175 00000000 00000000 0000043b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
9 .debug_frame 00000034 00000000 00000000 000005b0 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
10 .debug_pubnames 00000028 00000000 00000000 000005e4 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
11 .debug_aranges 00000028 00000000 00000000 0000060c 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
SYMBOL TABLE:
|
||||
00058000 l d .fixed_vectors 00000000
|
||||
00058100 l d .text 00000000
|
||||
000581ac l d .rodata 00000000
|
||||
00058220 l d .data 00000000
|
||||
00058224 l d .bss 00000000
|
||||
00000000 l d .debug_abbrev 00000000
|
||||
00000000 l d .debug_str 00000000
|
||||
00000000 l d .debug_info 00000000
|
||||
00000000 l d .debug_line 00000000
|
||||
00000000 l d .debug_frame 00000000
|
||||
00000000 l d .debug_pubnames 00000000
|
||||
00000000 l d .debug_aranges 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l d *ABS* 00000000
|
||||
00000000 l df *ABS* 00000000 zpu_macros.s
|
||||
00000000 l df *ABS* 00000000 appcrt0.s
|
||||
00002000 l *ABS* 00000000 ZPUTA_BASEADDR
|
||||
00058010 l .fixed_vectors 00000000 _callret
|
||||
00000020 l *ABS* 00000000 funcNext
|
||||
000025a0 l *ABS* 00000000 funcAddr
|
||||
00058103 l .text 00000000 .clearloop
|
||||
00058117 l .text 00000000 .done
|
||||
0005813f l .text 00000000 .appret
|
||||
00000000 l df *ABS* 00000000 hello.c
|
||||
00058220 l O .data 00000004 retcode
|
||||
00000000 l df *ABS* 00000000 sbrk.c
|
||||
00000000 l .debug_abbrev 00000000 .Ldebug_abbrev0
|
||||
00000000 l .debug_line 00000000 .Ldebug_line0
|
||||
00000000 l .debug_frame 00000000 .Lframe0
|
||||
00000000 l .debug_info 00000000 .Ldebug_info0
|
||||
00002140 g *ABS* 00000000 uxatoi
|
||||
00002240 g *ABS* 00000000 rtcSet
|
||||
00058220 g .data 00000000 __data_start__
|
||||
000020c0 g *ABS* 00000000 xgets
|
||||
000025a0 g *ABS* 00000000 printFSCode
|
||||
00002540 g *ABS* 00000000 getStrParam
|
||||
000020e0 g *ABS* 00000000 xfgets
|
||||
000581ac g *ABS* 00000000 __text_end__
|
||||
00058224 g .bss 00000000 _memreg
|
||||
00058020 g *ABS* 00000000 __text_start__
|
||||
00058143 g .text 00000000 _syscall
|
||||
00002480 g *ABS* 00000000 f_getcwd
|
||||
00002220 g *ABS* 00000000 memoryDump
|
||||
00002400 g *ABS* 00000000 f_rename
|
||||
00002100 g *ABS* 00000000 xfputs
|
||||
00058220 g *ABS* 00000000 __rodata_end__
|
||||
00002440 g *ABS* 00000000 f_chdir
|
||||
00002320 g *ABS* 00000000 f_truncate
|
||||
00058224 g .bss 00000000 __bss_start__
|
||||
00002120 g *ABS* 00000000 xatoi
|
||||
000021c0 g *ABS* 00000000 crc32_init
|
||||
00002380 g *ABS* 00000000 f_closedir
|
||||
00000000 *UND* 00000000 _sbrk
|
||||
000023e0 g *ABS* 00000000 f_unlink
|
||||
00002160 g *ABS* 00000000 xprintf
|
||||
00058020 g *ABS* 00000000 __boot_end__
|
||||
000581ac g .text 00000000 __ctors_start__
|
||||
00058220 g *ABS* 00000000 _ramend
|
||||
00002200 g *ABS* 00000000 get_dword
|
||||
00002460 g *ABS* 00000000 f_chdrive
|
||||
00058145 g F .text 00000029 mytest
|
||||
00058224 g .data 00000000 __data_end__
|
||||
000581ac g *ABS* 00000000 __rodata_start__
|
||||
0005823c g .bss 00000000 __bss_end__
|
||||
00002560 g *ABS* 00000000 getUintParam
|
||||
000020a0 g *ABS* 00000000 xputs
|
||||
000024e0 g *ABS* 00000000 f_setlabel
|
||||
000022a0 g *ABS* 00000000 f_close
|
||||
00058000 g .fixed_vectors 00000000 _start
|
||||
000022c0 g *ABS* 00000000 f_read
|
||||
000023a0 g *ABS* 00000000 f_readdir
|
||||
00000000 *UND* 00000000 addresscheck
|
||||
00058000 g *ABS* 00000000 _ramstart
|
||||
00002080 g *ABS* 00000000 xfputc
|
||||
00000000 *UND* 00000000 getserial
|
||||
00058224 g .bss 00000000 __bss_start
|
||||
00000000 *UND* 00000000 main
|
||||
00002340 g *ABS* 00000000 f_sync
|
||||
000581ac g .text 00000000 __dtors_end__
|
||||
00002520 g *ABS* 00000000 f_mkfs
|
||||
00002500 g *ABS* 00000000 f_mount
|
||||
00002360 g *ABS* 00000000 f_opendir
|
||||
00002040 g *ABS* 00000000 putc
|
||||
000581ac g .text 00000000 __ctors_end__
|
||||
00002060 g *ABS* 00000000 xputc
|
||||
00002300 g *ABS* 00000000 f_lseek
|
||||
00058100 w F .text 000000e3 _premain
|
||||
00058220 g *ABS* 00000000 _datastart
|
||||
00058220 g .data 00000000 _data
|
||||
00002420 g *ABS* 00000000 f_stat
|
||||
00058238 g O .bss 00000004 cfgSoC
|
||||
00000400 g *ABS* 00000000 _inthandler_fptr
|
||||
00000000 *UND* 00000000 _cpu_config
|
||||
0005823c g .bss 00000000 _end
|
||||
000022e0 g *ABS* 00000000 f_write
|
||||
0005816a g F .text 0000004d app
|
||||
00002280 g *ABS* 00000000 f_open
|
||||
00002020 g *ABS* 00000000 break
|
||||
000023c0 g *ABS* 00000000 f_mkdir
|
||||
00002180 g *ABS* 00000000 xsprintf
|
||||
000581ac g .text 00000000 __dtors_start__
|
||||
0001fff8 g *ABS* 00000000 _stack
|
||||
0005823c g *ABS* 00000000 _dataend
|
||||
000024c0 g *ABS* 00000000 f_getlabel
|
||||
000024a0 g *ABS* 00000000 f_getfree
|
||||
00002580 g *ABS* 00000000 set_serial_output
|
||||
00058000 g *ABS* 00000000 __boot_start__
|
||||
000021a0 g *ABS* 00000000 xfprintf
|
||||
00002260 g *ABS* 00000000 rtcGet
|
||||
000021e0 g *ABS* 00000000 crc32_addword
|
||||
|
||||
|
||||
Binary file not shown.
@@ -1,45 +0,0 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Name: hello.h
|
||||
// Created: July 2018
|
||||
// Author(s): Philip Smart
|
||||
// Description: Standalone App for the ZPU test application.
|
||||
//
|
||||
// Credits:
|
||||
// Copyright: (c) 2019 Philip Smart <philip.smart@net2net.org>
|
||||
//
|
||||
// History: July 2019 - Initial framework created.
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// This source file is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published
|
||||
// by the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This source file is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
#ifndef HELLO_H
|
||||
#define HELLO_H
|
||||
|
||||
// Constants.
|
||||
|
||||
// Application execution constants.
|
||||
//
|
||||
|
||||
// Prototypes.
|
||||
uint32_t app(uint32_t, uint32_t);
|
||||
|
||||
// Global scope variables within the ZPUTA memory space.
|
||||
GLOBALS *G;
|
||||
SOC_CONFIG *cfgSoC;
|
||||
|
||||
// Global scope variables in the app memory space.
|
||||
volatile UINT Timer; /* Performance timer (100Hz increment) */
|
||||
|
||||
#endif // HELLO_H
|
||||
@@ -1,215 +0,0 @@
|
||||
|
||||
hello.elf: file format elf32-zpu
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .fixed_vectors 00000020 00058000 00058000 00000094 2**4
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
1 .text 000000ac 00058100 00058100 000000b4 2**0
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .rodata 00000073 000581ac 000581ac 00000160 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
3 .data 00000004 00058220 00058220 000001d3 2**2
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
4 .bss 00000018 00058224 00058224 000001d7 2**2
|
||||
ALLOC
|
||||
5 .debug_abbrev 00000094 00000000 00000000 000001d7 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
6 .debug_str 000000e6 00000000 00000000 0000026b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
7 .debug_info 000000ea 00000000 00000000 00000351 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
8 .debug_line 00000175 00000000 00000000 0000043b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
9 .debug_frame 00000034 00000000 00000000 000005b0 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
10 .debug_pubnames 00000028 00000000 00000000 000005e4 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
11 .debug_aranges 00000028 00000000 00000000 0000060c 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
Disassembly of section .text:
|
||||
|
||||
00058100 <_premain>:
|
||||
58100: 96 im 22
|
||||
58101: 84 im 4
|
||||
58102: a4 im 36
|
||||
|
||||
00058103 <.clearloop>:
|
||||
58103: 70 loadsp 0
|
||||
58104: 96 im 22
|
||||
58105: 84 im 4
|
||||
58106: bc im 60
|
||||
58107: 27 ulessthanorequal
|
||||
58108: 8e im 14
|
||||
58109: 38 neqbranch
|
||||
5810a: 80 im 0
|
||||
5810b: 71 loadsp 4
|
||||
5810c: 70 loadsp 0
|
||||
5810d: 84 im 4
|
||||
5810e: 05 add
|
||||
5810f: 53 storesp 12
|
||||
58110: 0c store
|
||||
58111: 0b nop
|
||||
58112: 0b nop
|
||||
58113: 96 im 22
|
||||
58114: 82 im 2
|
||||
58115: 83 im 3
|
||||
58116: 04 poppc
|
||||
|
||||
00058117 <.done>:
|
||||
58117: 0b nop
|
||||
58118: 0b nop
|
||||
58119: 96 im 22
|
||||
5811a: 82 im 2
|
||||
5811b: bf im 63
|
||||
5811c: 51 storesp 4
|
||||
5811d: 87 im 7
|
||||
5811e: 3d pushspadd
|
||||
5811f: 08 load
|
||||
58120: 96 im 22
|
||||
58121: 84 im 4
|
||||
58122: b8 im 56
|
||||
58123: 0c store
|
||||
58124: 86 im 6
|
||||
58125: 3d pushspadd
|
||||
58126: 08 load
|
||||
58127: 96 im 22
|
||||
58128: 84 im 4
|
||||
58129: b4 im 52
|
||||
5812a: 0c store
|
||||
5812b: 85 im 5
|
||||
5812c: 3d pushspadd
|
||||
5812d: 08 load
|
||||
5812e: 0b nop
|
||||
5812f: 85 im 5
|
||||
58130: 3d pushspadd
|
||||
58131: 08 load
|
||||
58132: 96 im 22
|
||||
58133: 82 im 2
|
||||
58134: ea im -22
|
||||
58135: 2d call
|
||||
58136: 96 im 22
|
||||
58137: 84 im 4
|
||||
58138: a4 im 36
|
||||
58139: 08 load
|
||||
5813a: 96 im 22
|
||||
5813b: 84 im 4
|
||||
5813c: b4 im 52
|
||||
5813d: 08 load
|
||||
5813e: 0c store
|
||||
|
||||
0005813f <.appret>:
|
||||
5813f: 85 im 5
|
||||
58140: 3d pushspadd
|
||||
58141: 0d popsp
|
||||
58142: 04 poppc
|
||||
|
||||
00058143 <_syscall>:
|
||||
58143: 3c syscall
|
||||
58144: 04 poppc
|
||||
|
||||
00058145 <mytest>:
|
||||
58145: fe im -2
|
||||
58146: 3d pushspadd
|
||||
58147: 0d popsp
|
||||
58148: 74 loadsp 16
|
||||
58149: 52 storesp 8
|
||||
5814a: 0b nop
|
||||
5814b: 0b nop
|
||||
5814c: 96 im 22
|
||||
5814d: 83 im 3
|
||||
5814e: ac im 44
|
||||
5814f: 51 storesp 4
|
||||
58150: ea im -22
|
||||
58151: c0 im -64
|
||||
58152: 8d im 13
|
||||
58153: 3f callpcrel
|
||||
58154: 0b nop
|
||||
58155: 0b nop
|
||||
58156: 96 im 22
|
||||
58157: 84 im 4
|
||||
58158: a0 im 32
|
||||
58159: 08 load
|
||||
5815a: 81 im 1
|
||||
5815b: 11 addsp 4
|
||||
5815c: 0b nop
|
||||
5815d: 0b nop
|
||||
5815e: 96 im 22
|
||||
5815f: 84 im 4
|
||||
58160: a0 im 32
|
||||
58161: 0c store
|
||||
58162: 96 im 22
|
||||
58163: 84 im 4
|
||||
58164: a4 im 36
|
||||
58165: 0c store
|
||||
58166: 84 im 4
|
||||
58167: 3d pushspadd
|
||||
58168: 0d popsp
|
||||
58169: 04 poppc
|
||||
|
||||
0005816a <app>:
|
||||
5816a: fd im -3
|
||||
5816b: 3d pushspadd
|
||||
5816c: 0d popsp
|
||||
5816d: 75 loadsp 20
|
||||
5816e: 0b nop
|
||||
5816f: 0b nop
|
||||
58170: 96 im 22
|
||||
58171: 83 im 3
|
||||
58172: c4 im -60
|
||||
58173: 52 storesp 8
|
||||
58174: 54 storesp 16
|
||||
58175: ea im -22
|
||||
58176: bf im 63
|
||||
58177: e8 im -24
|
||||
58178: 3f callpcrel
|
||||
58179: 76 loadsp 24
|
||||
5817a: 53 storesp 12
|
||||
5817b: 73 loadsp 12
|
||||
5817c: 52 storesp 8
|
||||
5817d: 0b nop
|
||||
5817e: 0b nop
|
||||
5817f: 96 im 22
|
||||
58180: 83 im 3
|
||||
58181: d8 im -40
|
||||
58182: 51 storesp 4
|
||||
58183: ea im -22
|
||||
58184: bf im 63
|
||||
58185: da im -38
|
||||
58186: 3f callpcrel
|
||||
58187: 73 loadsp 12
|
||||
58188: 51 storesp 4
|
||||
58189: ff im -1
|
||||
5818a: ba im 58
|
||||
5818b: 3f callpcrel
|
||||
5818c: 96 im 22
|
||||
5818d: 84 im 4
|
||||
5818e: b8 im 56
|
||||
5818f: 08 load
|
||||
58190: 84 im 4
|
||||
58191: 11 addsp 4
|
||||
58192: 08 load
|
||||
58193: 53 storesp 12
|
||||
58194: 54 storesp 16
|
||||
58195: 0b nop
|
||||
58196: 0b nop
|
||||
58197: 96 im 22
|
||||
58198: 83 im 3
|
||||
58199: f8 im -8
|
||||
5819a: 51 storesp 4
|
||||
5819b: ea im -22
|
||||
5819c: bf im 63
|
||||
5819d: c2 im -62
|
||||
5819e: 3f callpcrel
|
||||
5819f: 81 im 1
|
||||
581a0: aa im 42
|
||||
581a1: 0b nop
|
||||
581a2: 96 im 22
|
||||
581a3: 84 im 4
|
||||
581a4: a4 im 36
|
||||
581a5: 0c store
|
||||
581a6: 85 im 5
|
||||
581a7: 3d pushspadd
|
||||
581a8: 0d popsp
|
||||
581a9: 04 poppc
|
||||
...
|
||||
@@ -1,14 +0,0 @@
|
||||
Start of code: 00058000 g *ABS* 00000000 _ramstart
|
||||
BOOT start: 00058000 g *ABS* 00000000 __boot_start__
|
||||
end: 00058020 g *ABS* 00000000 __boot_end__
|
||||
TEXT start: 00058020 g *ABS* 00000000 __text_start__
|
||||
end: 000581ac g *ABS* 00000000 __text_end__
|
||||
RODATA start: 000581ac g *ABS* 00000000 __rodata_start__
|
||||
end: 00058220 g *ABS* 00000000 __rodata_end__
|
||||
End of code: 00058220 g *ABS* 00000000 _ramend
|
||||
Start of data: 00058220 g *ABS* 00000000 _datastart
|
||||
DATA start: 00058220 g .data 00000000 __data_start__
|
||||
end: 00058224 g .data 00000000 __data_end__
|
||||
BSS start: 00058224 g .bss 00000000 __bss_start__
|
||||
end: 0005823c g .bss 00000000 __bss_end__
|
||||
End of data: 0005823c g *ABS* 00000000 _dataend
|
||||
@@ -1,24 +0,0 @@
|
||||
S00D000068656C6C6F2E7372656303
|
||||
S214058000803D0D0B0B9682800400000000000000EA
|
||||
S2140580100B0B9684B408080B0B9684A40C0400007E
|
||||
S2140581009684A4709684BC278E3880717084055337
|
||||
S2140581100C0B0B968283040B0B9682BF51873D088A
|
||||
S2140581209684B80C863D089684B40C853D080B8568
|
||||
S2140581303D089682EA2D9684A4089684B4080C8594
|
||||
S2140581403D0D043C04FE3D0D74520B0B9683AC515D
|
||||
S214058150EAC08D3F0B0B9684A00881110B0B968405
|
||||
S214058160A00C9684A40C843D0D04FD3D0D750B0BEB
|
||||
S2140581709683C45254EABFE83F765373520B0B9668
|
||||
S21405818083D851EABFDA3F7351FFBA3F9684B808E1
|
||||
S21405819084110853540B0B9683F851EABFC23F81EE
|
||||
S2100581A0AA0B9684A40C853D0D04000077
|
||||
S2140581AC537472696E672072656365697665643AA1
|
||||
S2140581BC2025730A0000000048656C6C6F206672FB
|
||||
S2140581CC6F6D206D652E2E2E2E0A00005468697371
|
||||
S2140581DC206973206D656D7265673D25306C782C4E
|
||||
S2140581EC20667265673D25306C780A00546869739D
|
||||
S2140581FC206973207468652073697A65206F66201C
|
||||
S21405820C74686520496E736E204252414D3D256C4F
|
||||
S20705821C780A00D3
|
||||
S208058220000000143C
|
||||
S80405810075
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -1,652 +0,0 @@
|
||||
/*------------------------------------------------------------------------*/
|
||||
/* STM32F100: MMCv3/SDv1/SDv2 (SPI mode) control module */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
/ Copyright (C) 2018, ChaN, all right reserved.
|
||||
/
|
||||
/ * This software is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-------------------------------------------------------------------------*/
|
||||
|
||||
#define SPI_CH 1 /* SPI channel to use = 1: SPI1, 11: SPI1/remap, 2: SPI2 */
|
||||
|
||||
#define FCLK_SLOW() { SPIx_CR1 = (SPIx_CR1 & ~0x38) | 0x28; } /* Set SCLK = PCLK / 64 */
|
||||
#define FCLK_FAST() { SPIx_CR1 = (SPIx_CR1 & ~0x38) | 0x00; } /* Set SCLK = PCLK / 2 */
|
||||
|
||||
#if SPI_CH == 1 /* PA4:MMC_CS, PA5:MMC_SCLK, PA6:MMC_DO, PA7:MMC_DI, PC4:MMC_CD */
|
||||
#define CS_HIGH() GPIOA_BSRR = _BV(4)
|
||||
#define CS_LOW() GPIOA_BSRR = _BV(4+16)
|
||||
#define MMC_CD !(GPIOC_IDR & _BV(4)) /* Card detect (yes:true, no:false, default:true) */
|
||||
#define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
|
||||
#define SPIx_CR1 SPI1_CR1
|
||||
#define SPIx_SR SPI1_SR
|
||||
#define SPIx_DR SPI1_DR
|
||||
#define SPIxENABLE() {\
|
||||
__enable_peripheral(SPI1EN);\
|
||||
__enable_peripheral(IOPAEN);\
|
||||
__enable_peripheral(IOPCEN);\
|
||||
__gpio_conf_bit(GPIOA, 4, OUT_PP); /* PA4: MMC_CS */\
|
||||
__gpio_conf_bit(GPIOA, 5, ALT_PP); /* PA5: MMC_SCLK */\
|
||||
GPIOA_BSRR = _BV(6); __gpio_conf_bit(GPIOA, 6, IN_PUL); /* PA6: MMC_DO with pull-up */\
|
||||
__gpio_conf_bit(GPIOA, 7, ALT_PP); /* PA7: MMC_DI */\
|
||||
GPIOC_BSRR = _BV(4); __gpio_conf_bit(GPIOC, 4, IN_PUL); /* PC4: MMC_CD with pull-up */\
|
||||
SPIx_CR1 = _BV(9)|_BV(8)|_BV(6)|_BV(2); /* Enable SPI1 */\
|
||||
}
|
||||
|
||||
#elif SPI_CH == 11 /* PA15:MMC_CS, PB3:MMC_SCLK, PB4:MMC_DO, PB5:MMC_DI, PB6:MMC_CD */
|
||||
#define CS_HIGH() GPIOA_BSRR = _BV(15)
|
||||
#define CS_LOW() GPIOA_BSRR = _BV(15+16)
|
||||
#define MMC_CD !(GPIOB_IDR & _BV(6)) /* Card detect (yes:true, no:false, default:true) */
|
||||
#define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
|
||||
#define SPIx_CR1 SPI1_CR1
|
||||
#define SPIx_SR SPI1_SR
|
||||
#define SPIx_DR SPI1_DR
|
||||
#define SPIxENABLE() {\
|
||||
AFIO_MAPR |= _BV(1);
|
||||
__enable_peripheral(SPI1EN);\
|
||||
__enable_peripheral(IOPAEN);\
|
||||
__enable_peripheral(IOPBEN);\
|
||||
__gpio_conf_bit(GPIOA, 15, OUT_PP); /* PA15: MMC_CS */\
|
||||
__gpio_conf_bit(GPIOB, 3, ALT_PP); /* PB3: MMC_SCLK */\
|
||||
GPIOB_BSRR = _BV(4); __gpio_conf_bit(GPIOB, 4, IN_PUL); /* PB4: MMC_DO with pull-up */\
|
||||
__gpio_conf_bit(GPIOB, 5, ALT_PP); /* PB5: MMC_DI */\
|
||||
GPIOB_BSRR = _BV(6); __gpio_conf_bit(GPIOB, 6, IN_PUL); /* PB6: MMC_CD with pull-up */\
|
||||
SPIx_CR1 = _BV(9)|_BV(8)|_BV(6)|_BV(2); /* Enable SPI1 */\
|
||||
}
|
||||
|
||||
#elif SPI_CH == 2 /* PB12:MMC_CS, PB13:MMC_SCLK, PB14:MMC_DO, PB15:MMC_DI, PD8:MMC_CD */
|
||||
#define CS_HIGH() GPIOB_BSRR = _BV(12)
|
||||
#define CS_LOW() GPIOB_BSRR = _BV(12+16)
|
||||
#define MMC_CD !(GPIOD_IDR & _BV(8)) /* Card detect (yes:true, no:false, default:true) */
|
||||
#define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
|
||||
#define SPIx_CR1 SPI2_CR1
|
||||
#define SPIx_SR SPI2_SR
|
||||
#define SPIx_DR SPI2_DR
|
||||
#define SPIxENABLE() {\
|
||||
__enable_peripheral(SPI2EN);\
|
||||
__enable_peripheral(IOPBEN);\
|
||||
__enable_peripheral(IOPDEN);\
|
||||
__gpio_conf_bit(GPIOB, 12, OUT_PP); /* PB12: MMC_CS */\
|
||||
__gpio_conf_bit(GPIOB, 13, ALT_PP); /* PB13: MMC_SCLK */\
|
||||
GPIOB_BSRR = _BV(14); __gpio_conf_bit(GPIOB, 14, IN_PUL); /* PB14: MMC_DO with pull-up */\
|
||||
__gpio_conf_bit(GPIOB, 15, ALT_PP); /* PB15: MMC_DI */\
|
||||
GPIOD_BSRR = _BV(8); __gpio_conf_bit(GPIOD, 8, IN_PUL); /* PD8: MMC_CD with pull-up */\
|
||||
SPIx_CR1 = _BV(9)|_BV(8)|_BV(6)|_BV(2); /* Enable SPI1 */\
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Module Private Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
#include "STM32F100.h"
|
||||
#include "diskio.h"
|
||||
|
||||
|
||||
/* MMC/SD command */
|
||||
#define CMD0 (0) /* GO_IDLE_STATE */
|
||||
#define CMD1 (1) /* SEND_OP_COND (MMC) */
|
||||
#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
|
||||
#define CMD8 (8) /* SEND_IF_COND */
|
||||
#define CMD9 (9) /* SEND_CSD */
|
||||
#define CMD10 (10) /* SEND_CID */
|
||||
#define CMD12 (12) /* STOP_TRANSMISSION */
|
||||
#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
|
||||
#define CMD16 (16) /* SET_BLOCKLEN */
|
||||
#define CMD17 (17) /* READ_SINGLE_BLOCK */
|
||||
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
|
||||
#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
|
||||
#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
|
||||
#define CMD24 (24) /* WRITE_BLOCK */
|
||||
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
|
||||
#define CMD32 (32) /* ERASE_ER_BLK_START */
|
||||
#define CMD33 (33) /* ERASE_ER_BLK_END */
|
||||
#define CMD38 (38) /* ERASE */
|
||||
#define CMD55 (55) /* APP_CMD */
|
||||
#define CMD58 (58) /* READ_OCR */
|
||||
|
||||
|
||||
static volatile
|
||||
DSTATUS Stat = STA_NOINIT; /* Physical drive status */
|
||||
|
||||
static volatile
|
||||
UINT Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
|
||||
|
||||
static
|
||||
BYTE CardType; /* Card type flags */
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* SPI controls (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/* Initialize MMC interface */
|
||||
static
|
||||
void init_spi (void)
|
||||
{
|
||||
SPIxENABLE(); /* Enable SPI function */
|
||||
CS_HIGH(); /* Set CS# high */
|
||||
|
||||
for (Timer1 = 10; Timer1; ) ; /* 10ms */
|
||||
}
|
||||
|
||||
|
||||
/* Exchange a byte */
|
||||
static
|
||||
BYTE xchg_spi (
|
||||
BYTE dat /* Data to send */
|
||||
)
|
||||
{
|
||||
SPIx_DR = dat; /* Start an SPI transaction */
|
||||
while ((SPIx_SR & 0x83) != 0x03) ; /* Wait for end of the transaction */
|
||||
return (BYTE)SPIx_DR; /* Return received byte */
|
||||
}
|
||||
|
||||
|
||||
/* Receive multiple byte */
|
||||
static
|
||||
void rcvr_spi_multi (
|
||||
BYTE *buff, /* Pointer to data buffer */
|
||||
UINT btr /* Number of bytes to receive (even number) */
|
||||
)
|
||||
{
|
||||
WORD d;
|
||||
|
||||
|
||||
SPIx_CR1 &= ~_BV(6);
|
||||
SPIx_CR1 |= (_BV(6) | _BV(11)); /* Put SPI into 16-bit mode */
|
||||
|
||||
SPIx_DR = 0xFFFF; /* Start the first SPI transaction */
|
||||
btr -= 2;
|
||||
do { /* Receive the data block into buffer */
|
||||
while ((SPIx_SR & 0x83) != 0x03) ; /* Wait for end of the SPI transaction */
|
||||
d = SPIx_DR; /* Get received word */
|
||||
SPIx_DR = 0xFFFF; /* Start next transaction */
|
||||
buff[1] = d; buff[0] = d >> 8; /* Store received data */
|
||||
buff += 2;
|
||||
} while (btr -= 2);
|
||||
while ((SPIx_SR & 0x83) != 0x03) ; /* Wait for end of the SPI transaction */
|
||||
d = SPIx_DR; /* Get last word received */
|
||||
buff[1] = d; buff[0] = d >> 8; /* Store it */
|
||||
|
||||
SPIx_CR1 &= ~(_BV(6) | _BV(11)); /* Put SPI into 8-bit mode */
|
||||
SPIx_CR1 |= _BV(6);
|
||||
}
|
||||
|
||||
|
||||
#if FF_FS_READONLY == 0
|
||||
/* Send multiple byte */
|
||||
static
|
||||
void xmit_spi_multi (
|
||||
const BYTE *buff, /* Pointer to the data */
|
||||
UINT btx /* Number of bytes to send (even number) */
|
||||
)
|
||||
{
|
||||
WORD d;
|
||||
|
||||
|
||||
SPIx_CR1 &= ~_BV(6);
|
||||
SPIx_CR1 |= (_BV(6) | _BV(11)); /* Put SPI into 16-bit mode */
|
||||
|
||||
d = buff[0] << 8 | buff[1]; buff += 2;
|
||||
SPIx_DR = d; /* Send the first word */
|
||||
btx -= 2;
|
||||
do {
|
||||
d = buff[0] << 8 | buff[1]; buff += 2; /* Word to send next */
|
||||
while ((SPIx_SR & 0x83) != 0x03) ; /* Wait for end of the SPI transaction */
|
||||
SPIx_DR; /* Discard received word */
|
||||
SPIx_DR = d; /* Start next transaction */
|
||||
} while (btx -= 2);
|
||||
while ((SPIx_SR & 0x83) != 0x03) ; /* Wait for end of the SPI transaction */
|
||||
SPIx_DR; /* Discard received word */
|
||||
|
||||
SPIx_CR1 &= ~(_BV(6) | _BV(11)); /* Put SPI into 8-bit mode */
|
||||
SPIx_CR1 |= _BV(6);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait for card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int wait_ready ( /* 1:Ready, 0:Timeout */
|
||||
UINT wt /* Timeout [ms] */
|
||||
)
|
||||
{
|
||||
BYTE d;
|
||||
|
||||
|
||||
Timer2 = wt;
|
||||
do {
|
||||
d = xchg_spi(0xFF);
|
||||
/* This loop takes a time. Insert rot_rdq() here for multitask envilonment. */
|
||||
} while (d != 0xFF && Timer2); /* Wait for card goes ready or timeout */
|
||||
|
||||
return (d == 0xFF) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Deselect card and release SPI */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
void deselect (void)
|
||||
{
|
||||
CS_HIGH(); /* Set CS# high */
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Select card and wait for ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int select (void) /* 1:OK, 0:Timeout */
|
||||
{
|
||||
CS_LOW(); /* Set CS# low */
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
|
||||
if (wait_ready(500)) return 1; /* Wait for card ready */
|
||||
|
||||
deselect();
|
||||
return 0; /* Timeout */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Receive a data packet from the MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int rcvr_datablock ( /* 1:OK, 0:Error */
|
||||
BYTE *buff, /* Data buffer */
|
||||
UINT btr /* Data block length (byte) */
|
||||
)
|
||||
{
|
||||
BYTE token;
|
||||
|
||||
|
||||
Timer1 = 200;
|
||||
do { /* Wait for DataStart token in timeout of 200ms */
|
||||
token = xchg_spi(0xFF);
|
||||
/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
|
||||
} while ((token == 0xFF) && Timer1);
|
||||
if(token != 0xFE) return 0; /* Function fails if invalid DataStart token or timeout */
|
||||
|
||||
rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
|
||||
xchg_spi(0xFF); xchg_spi(0xFF); /* Discard CRC */
|
||||
|
||||
return 1; /* Function succeeded */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a data packet to the MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if FF_FS_READONLY == 0
|
||||
static
|
||||
int xmit_datablock ( /* 1:OK, 0:Failed */
|
||||
const BYTE *buff, /* Ponter to 512 byte data to be sent */
|
||||
BYTE token /* Token */
|
||||
)
|
||||
{
|
||||
BYTE resp;
|
||||
|
||||
|
||||
if (!wait_ready(500)) return 0; /* Wait for card ready */
|
||||
|
||||
xchg_spi(token); /* Send token */
|
||||
if (token != 0xFD) { /* Send data if token is other than StopTran */
|
||||
xmit_spi_multi(buff, 512); /* Data */
|
||||
xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
|
||||
|
||||
resp = xchg_spi(0xFF); /* Receive data resp */
|
||||
if ((resp & 0x1F) != 0x05) return 0; /* Function fails if the data packet was not accepted */
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to the MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE send_cmd ( /* Return value: R1 resp (bit7==1:Failed to send) */
|
||||
BYTE cmd, /* Command index */
|
||||
DWORD arg /* Argument */
|
||||
)
|
||||
{
|
||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* Send a CMD55 prior to ACMD<n> */
|
||||
cmd &= 0x7F;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready except to stop multiple block read */
|
||||
if (cmd != CMD12) {
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
}
|
||||
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command resp */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Diacard following one byte when CMD12 */
|
||||
n = 10; /* Wait for response (10 bytes max) */
|
||||
do {
|
||||
res = xchg_spi(0xFF);
|
||||
} while ((res & 0x80) && --n);
|
||||
|
||||
return res; /* Return received response */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize disk drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_initialize (
|
||||
BYTE drv /* Physical drive number (0) */
|
||||
)
|
||||
{
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
|
||||
|
||||
if (drv) return STA_NOINIT; /* Supports only drive 0 */
|
||||
init_spi(); /* Initialize SPI */
|
||||
|
||||
if (Stat & STA_NODISK) return Stat; /* Is card existing in the soket? */
|
||||
|
||||
FCLK_SLOW();
|
||||
for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI/Idle state */
|
||||
Timer1 = 1000; /* Initialization timeout = 1 sec */
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Is the card supports vcc of 2.7-3.6V? */
|
||||
while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
|
||||
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Card id SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* Not SDv2 card */
|
||||
if (send_cmd(ACMD41, 0) <= 1) { /* SDv1 or MMC? */
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
|
||||
}
|
||||
while (Timer1 && send_cmd(cmd, 0)) ; /* Wait for end of initialization */
|
||||
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty; /* Card type */
|
||||
deselect();
|
||||
|
||||
if (ty) { /* OK */
|
||||
FCLK_FAST(); /* Set fast clock */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
|
||||
} else { /* Failed */
|
||||
Stat = STA_NOINIT;
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get disk status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE drv /* Physical drive number (0) */
|
||||
)
|
||||
{
|
||||
if (drv) return STA_NOINIT; /* Supports only drive 0 */
|
||||
|
||||
return Stat; /* Return disk status */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
UINT count /* Number of sectors to read (1..128) */
|
||||
)
|
||||
{
|
||||
if (drv || !count) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ot BA conversion (byte addressing cards) */
|
||||
|
||||
if (count == 1) { /* Single sector read */
|
||||
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
|
||||
&& rcvr_datablock(buff, 512)) {
|
||||
count = 0;
|
||||
}
|
||||
}
|
||||
else { /* Multiple sector read */
|
||||
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK; /* Return result */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if FF_FS_READONLY == 0
|
||||
DRESULT disk_write (
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
const BYTE *buff, /* Ponter to the data to write */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
UINT count /* Number of sectors to write (1..128) */
|
||||
)
|
||||
{
|
||||
if (drv || !count) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
|
||||
|
||||
if (count == 1) { /* Single sector write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE)) {
|
||||
count = 0;
|
||||
}
|
||||
}
|
||||
else { /* Multiple sector write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (!xmit_datablock(0, 0xFD)) count = 1; /* STOP_TRAN token */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK; /* Return result */
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous drive controls other than data read/write */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_ioctl (
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
BYTE cmd, /* Control command code */
|
||||
void *buff /* Pointer to the conrtol data */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16];
|
||||
DWORD *dp, st, ed, csize;
|
||||
|
||||
|
||||
if (drv) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
||||
|
||||
res = RES_ERROR;
|
||||
|
||||
switch (cmd) {
|
||||
case CTRL_SYNC : /* Wait for end of internal write process of the drive */
|
||||
if (select()) res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get drive capacity in unit of sector (DWORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
||||
csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csize << 10;
|
||||
} else { /* SDC ver 1.XX or MMC ver 3 */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csize << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDC ver 1.XX or MMC */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDC ver 1.XX */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMC */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case CTRL_TRIM : /* Erase a block of sectors (used when _USE_ERASE == 1) */
|
||||
if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
|
||||
if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
|
||||
if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
|
||||
dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
|
||||
if (!(CardType & CT_BLOCK)) {
|
||||
st *= 512; ed *= 512;
|
||||
}
|
||||
if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { /* Erase sector block */
|
||||
res = RES_OK; /* FatFs does not check result of this command */
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
deselect();
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Device timer function */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* This function must be called from timer interrupt routine in period
|
||||
/ of 1 ms to generate card control timing.
|
||||
*/
|
||||
|
||||
void disk_timerproc (void)
|
||||
{
|
||||
WORD n;
|
||||
BYTE s;
|
||||
|
||||
|
||||
n = Timer1; /* 1kHz decrement timer stopped at 0 */
|
||||
if (n) Timer1 = --n;
|
||||
n = Timer2;
|
||||
if (n) Timer2 = --n;
|
||||
|
||||
s = Stat;
|
||||
if (MMC_WP) { /* Write protected */
|
||||
s |= STA_PROTECT;
|
||||
} else { /* Write enabled */
|
||||
s &= ~STA_PROTECT;
|
||||
}
|
||||
if (MMC_CD) { /* Card is in socket */
|
||||
s &= ~STA_NODISK;
|
||||
} else { /* Socket empty */
|
||||
s |= (STA_NODISK | STA_NOINIT);
|
||||
}
|
||||
Stat = s;
|
||||
}
|
||||
|
||||
@@ -1,662 +0,0 @@
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* MMCv3/SDv1/SDv2 Controls via AVR SPI module */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/*
|
||||
/ Copyright (C) 2016, ChaN, all right reserved.
|
||||
/
|
||||
/ * This software is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ any purpose as you like UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-------------------------------------------------------------------------*/
|
||||
|
||||
#include <avr/io.h>
|
||||
#include "diskio.h"
|
||||
#include "mmc_avr.h"
|
||||
|
||||
/* Peripheral controls (Platform dependent) */
|
||||
#define CS_LOW() To be filled /* Set MMC_CS = low */
|
||||
#define CS_HIGH() To be filled /* Set MMC_CS = high */
|
||||
#define MMC_CD To be filled /* Test if card detected. yes:true, no:false, default:true */
|
||||
#define MMC_WP To be filled /* Test if write protected. yes:true, no:false, default:false */
|
||||
#define FCLK_SLOW() To be filled /* Set SPI clock for initialization (100-400kHz) */
|
||||
#define FCLK_FAST() To be filled /* Set SPI clock for read/write (20MHz max) */
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Module Private Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions for MMC/SDC command */
|
||||
#define CMD0 (0) /* GO_IDLE_STATE */
|
||||
#define CMD1 (1) /* SEND_OP_COND (MMC) */
|
||||
#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
|
||||
#define CMD8 (8) /* SEND_IF_COND */
|
||||
#define CMD9 (9) /* SEND_CSD */
|
||||
#define CMD10 (10) /* SEND_CID */
|
||||
#define CMD12 (12) /* STOP_TRANSMISSION */
|
||||
#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
|
||||
#define CMD16 (16) /* SET_BLOCKLEN */
|
||||
#define CMD17 (17) /* READ_SINGLE_BLOCK */
|
||||
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
|
||||
#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
|
||||
#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
|
||||
#define CMD24 (24) /* WRITE_BLOCK */
|
||||
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
|
||||
#define CMD32 (32) /* ERASE_ER_BLK_START */
|
||||
#define CMD33 (33) /* ERASE_ER_BLK_END */
|
||||
#define CMD38 (38) /* ERASE */
|
||||
#define CMD48 (48) /* READ_EXTR_SINGLE */
|
||||
#define CMD49 (49) /* WRITE_EXTR_SINGLE */
|
||||
#define CMD55 (55) /* APP_CMD */
|
||||
#define CMD58 (58) /* READ_OCR */
|
||||
|
||||
|
||||
static volatile DSTATUS Stat = STA_NOINIT; /* Disk status */
|
||||
|
||||
/* 100Hz decrement timers */
|
||||
static volatile BYTE Timer1;
|
||||
static volatile UINT Timer2;
|
||||
|
||||
static BYTE CardType; /* Card type flags (b0:MMC, b1:SDv1, b2:SDv2, b3:Block addressing) */
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Power Control (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* When the target system does not support socket power control, there */
|
||||
/* is nothing to do in these functions and chk_power always returns 1. */
|
||||
|
||||
static
|
||||
void power_on (void)
|
||||
{
|
||||
/* Trun socket power on and wait for 10ms+ (nothing to do if no power controls) */
|
||||
To be filled
|
||||
|
||||
|
||||
/* Configure MOSI/MISO/SCLK/CS pins */
|
||||
To be filled
|
||||
|
||||
|
||||
/* Enable SPI module in SPI mode 0 */
|
||||
To be filled
|
||||
}
|
||||
|
||||
|
||||
static
|
||||
void power_off (void)
|
||||
{
|
||||
/* Disable SPI function */
|
||||
To be filled
|
||||
|
||||
|
||||
/* De-configure MOSI/MISO/SCLK/CS pins (set hi-z) */
|
||||
To be filled
|
||||
|
||||
|
||||
/* Trun socket power off (nothing to do if no power controls) */
|
||||
To be filled
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Transmit/Receive data from/to MMC via SPI (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/* Exchange a byte */
|
||||
static
|
||||
BYTE xchg_spi ( /* Returns received data */
|
||||
BYTE dat /* Data to be sent */
|
||||
)
|
||||
{
|
||||
SPDR = dat;
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
return SPDR;
|
||||
}
|
||||
|
||||
|
||||
/* Receive a data block fast */
|
||||
static
|
||||
void rcvr_spi_multi (
|
||||
BYTE *p, /* Data read buffer */
|
||||
UINT cnt /* Size of data block */
|
||||
)
|
||||
{
|
||||
do {
|
||||
SPDR = 0xFF;
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
*p++ = SPDR;
|
||||
SPDR = 0xFF;
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
*p++ = SPDR;
|
||||
} while (cnt -= 2);
|
||||
}
|
||||
|
||||
|
||||
/* Send a data block fast */
|
||||
static
|
||||
void xmit_spi_multi (
|
||||
const BYTE *p, /* Data block to be sent */
|
||||
UINT cnt /* Size of data block */
|
||||
)
|
||||
{
|
||||
do {
|
||||
SPDR = *p++;
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
SPDR = *p++;
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
} while (cnt -= 2);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait for card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int wait_ready ( /* 1:Ready, 0:Timeout */
|
||||
UINT wt /* Timeout [ms] */
|
||||
)
|
||||
{
|
||||
BYTE d;
|
||||
|
||||
|
||||
wt /= 10;
|
||||
cli(); Timer2 = wt; sei();
|
||||
do {
|
||||
d = xchg_spi(0xFF);
|
||||
cli(); wt = Timer2; sei();
|
||||
} while (d != 0xFF && wt);
|
||||
|
||||
return (d == 0xFF) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Deselect the card and release SPI bus */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
void deselect (void)
|
||||
{
|
||||
CS_HIGH(); /* Set CS# high */
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Select the card and wait for ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int select (void) /* 1:Successful, 0:Timeout */
|
||||
{
|
||||
CS_LOW(); /* Set CS# low */
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
|
||||
|
||||
if (wait_ready(500)) return 1; /* Leading busy check: Wait for card ready */
|
||||
|
||||
deselect(); /* Timeout */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Receive a data packet from MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int rcvr_datablock (
|
||||
BYTE *buff, /* Data buffer to store received data */
|
||||
UINT btr /* Byte count (must be multiple of 4) */
|
||||
)
|
||||
{
|
||||
BYTE token;
|
||||
|
||||
|
||||
Timer1 = 20;
|
||||
do { /* Wait for data packet in timeout of 200ms */
|
||||
token = xchg_spi(0xFF);
|
||||
} while ((token == 0xFF) && Timer1);
|
||||
if (token != 0xFE) return 0; /* If not valid data token, retutn with error */
|
||||
|
||||
rcvr_spi_multi(buff, btr); /* Receive the data block into buffer */
|
||||
xchg_spi(0xFF); /* Discard CRC */
|
||||
xchg_spi(0xFF);
|
||||
|
||||
return 1; /* Return with success */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a data packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
static
|
||||
int xmit_datablock (
|
||||
const BYTE *buff, /* 512 byte data block to be transmitted */
|
||||
BYTE token /* Data/Stop token */
|
||||
)
|
||||
{
|
||||
BYTE resp;
|
||||
|
||||
|
||||
if (!wait_ready(500)) return 0; /* Leading busy check: Wait for card ready to accept data block */
|
||||
|
||||
xchg_spi(token); /* Xmit data token */
|
||||
if (token == 0xFD) return 1; /* Do not send data if token is StopTran */
|
||||
|
||||
xmit_spi_multi(buff, 512); /* Data */
|
||||
xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
|
||||
|
||||
resp = xchg_spi(0xFF); /* Receive data resp */
|
||||
|
||||
return (resp & 0x1F) == 0x05 ? 1 : 0; /* Data was accepted or not */
|
||||
|
||||
/* Busy check is done at next transmission */
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE send_cmd ( /* Returns R1 resp (bit7==1:Send failed) */
|
||||
BYTE cmd, /* Command index */
|
||||
DWORD arg /* Argument */
|
||||
)
|
||||
{
|
||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
|
||||
cmd &= 0x7F;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready except to stop multiple block read */
|
||||
if (cmd != CMD12) {
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
}
|
||||
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + Command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) Stop */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command response */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte when stop reading */
|
||||
n = 10; /* Wait for a valid response in timeout of 10 attempts */
|
||||
do
|
||||
res = xchg_spi(0xFF);
|
||||
while ((res & 0x80) && --n);
|
||||
|
||||
return res; /* Return with the response value */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS mmc_disk_initialize (void)
|
||||
{
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
|
||||
|
||||
power_off(); /* Turn off the socket power to reset the card */
|
||||
for (Timer1 = 10; Timer1; ) ; /* Wait for 100ms */
|
||||
if (Stat & STA_NODISK) return Stat; /* No card in the socket? */
|
||||
|
||||
power_on(); /* Turn on the socket power */
|
||||
FCLK_SLOW();
|
||||
for (n = 10; n; n--) xchg_spi(0xFF); /* 80 dummy clocks */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI mode */
|
||||
Timer1 = 100; /* Initialization timeout of 1000 msec */
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* Is the card SDv2? */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
while (Timer1 && send_cmd(ACMD41, 1UL << 30)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
|
||||
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Check if the card is SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if (send_cmd(ACMD41, 0) <= 1) {
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
|
||||
}
|
||||
while (Timer1 && send_cmd(cmd, 0)); /* Wait for leaving idle state */
|
||||
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
deselect();
|
||||
|
||||
if (ty) { /* Initialization succeded */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
FCLK_FAST();
|
||||
} else { /* Initialization failed */
|
||||
power_off();
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS mmc_disk_status (void)
|
||||
{
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT mmc_disk_read (
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
UINT count /* Sector count (1..128) */
|
||||
)
|
||||
{
|
||||
BYTE cmd;
|
||||
|
||||
|
||||
if (!count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
cmd = count > 1 ? CMD18 : CMD17; /* READ_MULTIPLE_BLOCK : READ_SINGLE_BLOCK */
|
||||
if (send_cmd(cmd, sector) == 0) {
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (cmd == CMD18) send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
DRESULT mmc_disk_write (
|
||||
const BYTE *buff, /* Pointer to the data to be written */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
UINT count /* Sector count (1..128) */
|
||||
)
|
||||
{
|
||||
if (!count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE)) {
|
||||
count = 0;
|
||||
}
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count);
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (!xmit_datablock(0, 0xFD)) count = 1; /* STOP_TRAN token */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_IOCTL
|
||||
DRESULT mmc_disk_ioctl (
|
||||
BYTE cmd, /* Control code */
|
||||
void *buff /* Buffer to send/receive control data */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16], *ptr = buff;
|
||||
DWORD *dp, st, ed, csize;
|
||||
#if _USE_ISDIO
|
||||
SDIO_CTRL *sdi;
|
||||
BYTE rc, *bp;
|
||||
UINT dc;
|
||||
#endif
|
||||
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
res = RES_ERROR;
|
||||
switch (cmd) {
|
||||
case CTRL_SYNC : /* Make sure that no pending write process. Do not remove this or written sector might not left updated. */
|
||||
if (select()) res = RES_OK;
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
||||
csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csize << 10;
|
||||
} else { /* SDC ver 1.XX or MMC*/
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csize << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDv2? */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDv1 */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMCv3 */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case CTRL_TRIM: /* Erase a block of sectors (used when _USE_TRIM in ffconf.h is 1) */
|
||||
if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
|
||||
if (mmc_disk_ioctl(MMC_GET_CSD, csd)) break; /* Get CSD */
|
||||
if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
|
||||
dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
|
||||
if (!(CardType & CT_BLOCK)) {
|
||||
st *= 512; ed *= 512;
|
||||
}
|
||||
if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { /* Erase sector block */
|
||||
res = RES_OK; /* FatFs does not check result of this command */
|
||||
}
|
||||
break;
|
||||
|
||||
/* Following commands are never used by FatFs module */
|
||||
|
||||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
|
||||
if (send_cmd(CMD9, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CSD */
|
||||
res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
|
||||
if (send_cmd(CMD10, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CID */
|
||||
res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
|
||||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||||
for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Receive SD statsu as a data block (64 bytes) */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(ptr, 64)) res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case CTRL_POWER_OFF : /* Power off */
|
||||
power_off();
|
||||
Stat |= STA_NOINIT;
|
||||
res = RES_OK;
|
||||
break;
|
||||
#if _USE_ISDIO
|
||||
case ISDIO_READ:
|
||||
sdi = buff;
|
||||
if (send_cmd(CMD48, 0x80000000 | (DWORD)sdi->func << 28 | (DWORD)sdi->addr << 9 | ((sdi->ndata - 1) & 0x1FF)) == 0) {
|
||||
for (Timer1 = 100; (rc = xchg_spi(0xFF)) == 0xFF && Timer1; ) ;
|
||||
if (rc == 0xFE) {
|
||||
for (bp = sdi->data, dc = sdi->ndata; dc; dc--) *bp++ = xchg_spi(0xFF);
|
||||
for (dc = 514 - sdi->ndata; dc; dc--) xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case ISDIO_WRITE:
|
||||
sdi = buff;
|
||||
if (send_cmd(CMD49, 0x80000000 | (DWORD)sdi->func << 28 | (DWORD)sdi->addr << 9 | ((sdi->ndata - 1) & 0x1FF)) == 0) {
|
||||
xchg_spi(0xFF); xchg_spi(0xFE);
|
||||
for (bp = sdi->data, dc = sdi->ndata; dc; dc--) xchg_spi(*bp++);
|
||||
for (dc = 514 - sdi->ndata; dc; dc--) xchg_spi(0xFF);
|
||||
if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
|
||||
case ISDIO_MRITE:
|
||||
sdi = buff;
|
||||
if (send_cmd(CMD49, 0x84000000 | (DWORD)sdi->func << 28 | (DWORD)sdi->addr << 9 | sdi->ndata >> 8) == 0) {
|
||||
xchg_spi(0xFF); xchg_spi(0xFE);
|
||||
xchg_spi(sdi->ndata);
|
||||
for (dc = 513; dc; dc--) xchg_spi(0xFF);
|
||||
if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
|
||||
}
|
||||
deselect();
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Device Timer Interrupt Procedure */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* This function must be called in period of 10ms */
|
||||
|
||||
void mmc_disk_timerproc (void)
|
||||
{
|
||||
BYTE b;
|
||||
UINT n;
|
||||
|
||||
|
||||
b = Timer1; /* 100Hz decrement timer */
|
||||
if (b) Timer1 = --b;
|
||||
n = Timer2;
|
||||
if (n) Timer2 = --n;
|
||||
|
||||
b = Stat;
|
||||
if (MMC_WP) { /* Write protected */
|
||||
b |= STA_PROTECT;
|
||||
} else { /* Write enabled */
|
||||
b &= ~STA_PROTECT;
|
||||
}
|
||||
if (MMC_CD) { /* Card inserted */
|
||||
b &= ~STA_NODISK;
|
||||
} else { /* Socket empty */
|
||||
b |= (STA_NODISK | STA_NOINIT);
|
||||
}
|
||||
Stat = b; /* Update MMC status */
|
||||
}
|
||||
|
||||
@@ -1,398 +0,0 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Name: osd.c
|
||||
// Created: December 2018
|
||||
// Author(s): Philip Smart
|
||||
// Description: IO Control Processor On Screen Display interface.
|
||||
// This module provides the routines to display data on the status and menu portions
|
||||
// of the Emulation host screen.
|
||||
//
|
||||
// Credits:
|
||||
// Copyright: (c) 2018 Philip Smart <philip.smart@net2net.org>
|
||||
//
|
||||
// History: December 2018 - Initial module written.
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// This source file is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published
|
||||
// by the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This source file is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
|
||||
#include "zpu-types.h"
|
||||
#include "zpu_soc.h"
|
||||
#include "osd.h"
|
||||
#include "sharpmz.h"
|
||||
//#include "../lib/storm_core.h"
|
||||
//#include "../lib/storm_soc_basic.h"
|
||||
|
||||
// Internal variables.
|
||||
//
|
||||
static screen_t statusScreen;
|
||||
static screen_t menuScreen;
|
||||
|
||||
// Method to perform any initialization.
|
||||
//
|
||||
void osdInit(void)
|
||||
{
|
||||
|
||||
// Status screen control parameters.
|
||||
statusScreen.rotation = CG_ROTATE_NORMAL;
|
||||
statusScreen.horizontalZoom = CG_HORZOOM_NORMAL;
|
||||
statusScreen.verticalZoom = CG_VERZOOM_NORMAL;
|
||||
statusScreen.halfPixels = CG_PIXEL_SETTING_NORMAL;
|
||||
statusScreen.fgColour = CG_WHITE;
|
||||
statusScreen.bgColour = CG_BLACK;
|
||||
statusScreen.cgAddr = CHARGENADDR[CG_MZ80A];
|
||||
statusScreen.cgAttr = 0x00000000;
|
||||
statusScreen.colMult = 1;
|
||||
statusScreen.rowMult = 1;
|
||||
statusScreen.col = 0;
|
||||
statusScreen.row = 0;
|
||||
statusScreen.enabled = 0;
|
||||
|
||||
// Menu screen control parameters.
|
||||
menuScreen.rotation = CG_ROTATE_NORMAL;
|
||||
menuScreen.horizontalZoom = CG_HORZOOM_NORMAL;
|
||||
menuScreen.verticalZoom = CG_VERZOOM_NORMAL;
|
||||
menuScreen.halfPixels = CG_PIXEL_SETTING_NORMAL;
|
||||
menuScreen.fgColour = CG_WHITE;
|
||||
menuScreen.bgColour = CG_BLACK;
|
||||
menuScreen.cgAddr = CHARGENADDR[CG_MZ80A];
|
||||
menuScreen.cgAttr = 0x00000000;
|
||||
menuScreen.colMult = 1;
|
||||
menuScreen.rowMult = 1;
|
||||
menuScreen.col = 0;
|
||||
menuScreen.row = 0;
|
||||
menuScreen.enabled = 0;
|
||||
}
|
||||
|
||||
// Method to program a config register in the emulator.
|
||||
//
|
||||
void setConfigRegister(uint32_t addr, uint32_t value)
|
||||
{
|
||||
// Locals.
|
||||
uint32_t din;
|
||||
|
||||
// Wait for any previous transmission to complete.
|
||||
//
|
||||
do {
|
||||
din = IOCTL_CMDADDR;
|
||||
} while( din & STATUS_BUSY_WRITE );
|
||||
|
||||
// Setup the data, then issue write command.
|
||||
//
|
||||
IOCTL_DOUT = (uint32_t)value & 0x000000ff;
|
||||
IOCTL_CMDADDR = CMD_WRITE | ((SHARPMZ_REGISTER_BASE + addr) & 0x0FFFFFFF);
|
||||
}
|
||||
|
||||
// Method to fill the status screen frame buffer memory with a fixed colour.
|
||||
//
|
||||
void osdFillStatus(uint32_t colour, uint16_t startLine, uint16_t endLine)
|
||||
{
|
||||
// Locals
|
||||
uint32_t din;
|
||||
uint32_t u;
|
||||
|
||||
// Sanity checks.
|
||||
if(startLine > STATUS_SCREEN_MAX_LINES) startLine = STATUS_SCREEN_MAX_LINES;
|
||||
if(endLine > STATUS_SCREEN_MAX_LINES) endLine = STATUS_SCREEN_MAX_LINES;
|
||||
|
||||
// Use columns as each byte is 8 pixels wide.
|
||||
for(u=startLine*STATUS_SCREEN_MAX_COLUMNS; u < endLine*STATUS_SCREEN_MAX_COLUMNS; u++)
|
||||
{
|
||||
// Wait until last operation completes before next.
|
||||
while( ((din = IOCTL_CMDADDR) & STATUS_BUSY_WRITE) );
|
||||
|
||||
// Load output with required fill colour.
|
||||
IOCTL_DOUT = colour & 0x00ffffff;
|
||||
|
||||
// Send command to write to one set of 8 pixels.
|
||||
IOCTL_CMDADDR = CMD_WRITE | ((STATUS_SCREEN_BASE_ADDR + u) & 0x0FFFFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
// Method to clear the status screen frame buffer memory.
|
||||
//
|
||||
void osdClearStatus(void)
|
||||
{
|
||||
osdFillStatus(0x00000000, 0, STATUS_SCREEN_MAX_LINES);
|
||||
}
|
||||
|
||||
// Method to fill the menu screen frame buffer memory with a fixed colour.
|
||||
//
|
||||
void osdFillMenu(uint32_t colour, uint16_t startLine, uint16_t endLine)
|
||||
{
|
||||
// Locals
|
||||
uint32_t din;
|
||||
uint32_t u;
|
||||
|
||||
// Sanity checks.
|
||||
if(startLine > MENU_SCREEN_MAX_LINES) startLine = MENU_SCREEN_MAX_LINES;
|
||||
if(endLine > MENU_SCREEN_MAX_LINES) endLine = MENU_SCREEN_MAX_LINES;
|
||||
|
||||
// Use columns as each byte is 8 pixels wide.
|
||||
for(u=startLine*MENU_SCREEN_MAX_COLUMNS; u < endLine*MENU_SCREEN_MAX_COLUMNS; u++)
|
||||
{
|
||||
// Wait until last operation completes before next.
|
||||
while( ((din = IOCTL_CMDADDR) & STATUS_BUSY_WRITE) );
|
||||
|
||||
// Load output required fill, colour is set by mctrl registers.
|
||||
IOCTL_DOUT = colour & 0x000000ff;
|
||||
|
||||
// Send command to write to one set of 8 pixels.
|
||||
IOCTL_CMDADDR = CMD_WRITE | ((MENU_SCREEN_BASE_ADDR + u) & 0x0FFFFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
// Method to clear the menu screen frame buffer memory.
|
||||
//
|
||||
void osdClearMenu(void)
|
||||
{
|
||||
osdFillMenu(0x00000000, 0, MENU_SCREEN_MAX_LINES);
|
||||
}
|
||||
|
||||
// Method to clear the status and menu screen frame buffer memorys.
|
||||
//
|
||||
void osdClearScreen(void)
|
||||
{
|
||||
osdFillStatus(0x00000000, 0, STATUS_SCREEN_MAX_LINES);
|
||||
osdFillMenu(0x00000000, 0, MENU_SCREEN_MAX_LINES);
|
||||
}
|
||||
|
||||
// Method to setup the address of the required character generator rom.
|
||||
//
|
||||
void osdSelectCG(uint32_t screen, uint32_t charGenSet)
|
||||
{
|
||||
// Sanity check.
|
||||
if(charGenSet >= MAX_CHARGEN_SETS)
|
||||
charGenSet = CG_MZ80A;
|
||||
|
||||
// Save the parameters.
|
||||
if(screen == STATUS_SCREEN)
|
||||
{
|
||||
statusScreen.cgAddr = CHARGENADDR[charGenSet];
|
||||
} else
|
||||
{
|
||||
menuScreen.cgAddr = CHARGENADDR[charGenSet];
|
||||
}
|
||||
}
|
||||
|
||||
// Method to setup the attributes for future character writes.
|
||||
//
|
||||
void osdSetCGAttr(uint32_t screen, uint32_t rotation, uint32_t horizontalZoom, uint32_t verticalZoom, uint32_t halfPixels, uint32_t fgColour, uint32_t bgColour)
|
||||
{
|
||||
// Locals.
|
||||
uint32_t cgAttr;
|
||||
uint32_t rowMult;
|
||||
uint32_t colMult;
|
||||
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return;
|
||||
if(rotation >= MAX_ROTATIONS)
|
||||
rotation = CG_ROTATE_NORMAL;
|
||||
if(horizontalZoom >= MAX_HORIZONTAL_ZOOM)
|
||||
horizontalZoom = CG_HORZOOM_NORMAL;
|
||||
if(verticalZoom >= MAX_VERTICAL_ZOOM)
|
||||
verticalZoom = CG_VERZOOM_NORMAL;
|
||||
if(halfPixels >= MAX_PIXEL_SETTINGS)
|
||||
halfPixels = CG_PIXEL_SETTING_NORMAL;
|
||||
if(fgColour >= MAX_COLOURS)
|
||||
fgColour = CG_WHITE;
|
||||
if(bgColour >= MAX_COLOURS)
|
||||
bgColour = CG_BLACK;
|
||||
|
||||
// Setup the attributes for future character writes.
|
||||
cgAttr = STATUSFGCOLOURS[fgColour] | STATUSBGCOLOURS[bgColour] | ROTATIONMAP[rotation] | HORZOOMMAP[horizontalZoom] | VERZOOMMAP[verticalZoom] | PIXELSETTINGMAP[halfPixels];
|
||||
|
||||
// Setup the control parameters.
|
||||
colMult = horizontalZoom == CG_HORZOOM_NORMAL ? 1 : 2;
|
||||
rowMult = verticalZoom == CG_VERZOOM_NORMAL ? 1 : 2;
|
||||
|
||||
// Save the parameters.
|
||||
if(screen == STATUS_SCREEN)
|
||||
{
|
||||
statusScreen.rotation = rotation;
|
||||
statusScreen.horizontalZoom = horizontalZoom;
|
||||
statusScreen.verticalZoom = verticalZoom;
|
||||
statusScreen.halfPixels = halfPixels;
|
||||
statusScreen.fgColour = fgColour;
|
||||
statusScreen.bgColour = bgColour;
|
||||
statusScreen.cgAttr = cgAttr;
|
||||
statusScreen.colMult = colMult;
|
||||
statusScreen.rowMult = rowMult;
|
||||
} else
|
||||
{
|
||||
menuScreen.rotation = rotation;
|
||||
menuScreen.horizontalZoom = horizontalZoom;
|
||||
menuScreen.verticalZoom = verticalZoom;
|
||||
menuScreen.halfPixels = halfPixels;
|
||||
menuScreen.fgColour = fgColour;
|
||||
menuScreen.bgColour = bgColour;
|
||||
menuScreen.cgAttr = cgAttr;
|
||||
menuScreen.colMult = colMult;
|
||||
menuScreen.rowMult = rowMult;
|
||||
}
|
||||
}
|
||||
|
||||
// Method to return current row.
|
||||
//
|
||||
uint32_t osdGetRow(uint32_t screen)
|
||||
{
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return(0);
|
||||
|
||||
return(screen = STATUS_SCREEN ? statusScreen.row : menuScreen.row);
|
||||
}
|
||||
|
||||
// Method to return current column.
|
||||
//
|
||||
uint32_t osdGetColumn(uint32_t screen)
|
||||
{
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return(0);
|
||||
|
||||
return(screen = STATUS_SCREEN ? statusScreen.col : menuScreen.col);
|
||||
}
|
||||
|
||||
// Method to set the screen position for next character write.
|
||||
//
|
||||
void osdSetPosition(uint32_t screen, uint32_t row, uint32_t col)
|
||||
{
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return;
|
||||
|
||||
if(screen == STATUS_SCREEN)
|
||||
{
|
||||
if(row >= STATUS_SCREEN_MAX_ROWS)
|
||||
row = 0;
|
||||
if(col >= STATUS_SCREEN_MAX_COLUMNS)
|
||||
col = 0;
|
||||
statusScreen.row = row;
|
||||
statusScreen.col = col;
|
||||
} else
|
||||
{
|
||||
if(row >= MENU_SCREEN_MAX_ROWS)
|
||||
row = 0;
|
||||
if(col >= MENU_SCREEN_MAX_COLUMNS)
|
||||
col = 0;
|
||||
menuScreen.row = row;
|
||||
menuScreen.col = col;
|
||||
}
|
||||
}
|
||||
|
||||
// Method to make visible (enable) a screen buffer.
|
||||
//
|
||||
void osdEnable(uint32_t screen, uint32_t enable)
|
||||
{
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return;
|
||||
if(enable != 0 && enable != 1)
|
||||
enable = 0;
|
||||
|
||||
if(screen == STATUS_SCREEN)
|
||||
{
|
||||
statusScreen.enabled = enable;
|
||||
} else
|
||||
{
|
||||
menuScreen.enabled = enable;
|
||||
}
|
||||
// Set the state into the emulator control registers.
|
||||
setConfigRegister(REGISTER_DISPLAY3, (statusScreen.enabled << 1) | menuScreen.enabled );
|
||||
}
|
||||
|
||||
// Method to write a character onto the screen buffers.
|
||||
// Returns: 0 = Normal write.
|
||||
// bit 1 = 1 - Column wrapped around to 0.
|
||||
// bit 2 = 1 - Row wrapped around to 0.
|
||||
//
|
||||
uint8_t osdWriteChar(uint8_t screen, uint8_t dispChar, uint8_t mapToAscii)
|
||||
{
|
||||
// Locals
|
||||
uint32_t lineWrap = 0;
|
||||
|
||||
// Sanity check.
|
||||
if(screen != STATUS_SCREEN && screen != MENU_SCREEN)
|
||||
return(lineWrap);
|
||||
if(mapToAscii > 1)
|
||||
mapToAscii = 0;
|
||||
|
||||
// Process any specific framebuffer settings first.
|
||||
if(screen == STATUS_SCREEN)
|
||||
{
|
||||
IOCTL_CHRCOLS = STATUS_SCREEN_MAX_COLUMNS;
|
||||
IOCTL_CGADDR = statusScreen.cgAddr;
|
||||
IOCTL_DOUT = statusScreen.cgAttr | dispChar;
|
||||
statusScreen.charAddr = (STATUS_SCREEN_BASE_ADDR + (statusScreen.row * STATUS_SCREEN_LINE_WIDTH) + statusScreen.col) & 0x0FFFFFFF;
|
||||
IOCTL_CMDADDR = CMD_WRITECHAR | statusScreen.charAddr;
|
||||
// uart0_printf("CMDADDR=");
|
||||
// uart0_print_hex_dword(IOCTL_CMDADDR);
|
||||
// uart0_printf("\r\n");
|
||||
statusScreen.col += statusScreen.colMult;
|
||||
if(statusScreen.col >= STATUS_SCREEN_MAX_COLUMNS)
|
||||
{
|
||||
lineWrap |= 1;
|
||||
statusScreen.col = 0;
|
||||
statusScreen.row += statusScreen.rowMult;
|
||||
if(statusScreen.row >= STATUS_SCREEN_MAX_ROWS)
|
||||
{
|
||||
lineWrap |= 2;
|
||||
statusScreen.row = 0;
|
||||
}
|
||||
}
|
||||
} else
|
||||
{
|
||||
IOCTL_CHRCOLS = MENU_SCREEN_MAX_COLUMNS;
|
||||
IOCTL_CGADDR = menuScreen.cgAddr;
|
||||
IOCTL_DOUT = menuScreen.cgAttr | dispChar;
|
||||
//IOCTL_CMDADDR = CMD_WRITECHAR | (MENU_SCREEN_BASE_ADDR + (((menuScreen.row * MENU_SCREEN_LINE_WIDTH * menuScreen.rowMult) + menuScreen.col * menuScreen.colMult) & 0x0FFFFFFF));
|
||||
//menuScreen.charAddr = (MENU_SCREEN_BASE_ADDR + (menuScreen.row * MENU_SCREEN_LINE_WIDTH) + menuScreen.col) & 0x0FFFFFFF;
|
||||
menuScreen.charAddr = (MENU_SCREEN_BASE_ADDR + menuScreen.row + menuScreen.col) & 0x0FFFFFFF;
|
||||
IOCTL_CMDADDR = CMD_WRITECHAR | menuScreen.charAddr;
|
||||
uart0_printf("CMDADDR=");
|
||||
uart0_print_hex_dword(IOCTL_CMDADDR);
|
||||
// uart0_printf(",ADDR=");
|
||||
// uart0_print_hex_dword(charAddr);
|
||||
// uart0_printf(",ROW=");
|
||||
// uart0_print_hex_byte(menuScreen.row);
|
||||
// uart0_printf(",COL=");
|
||||
// uart0_print_hex_byte(menuScreen.col);
|
||||
// uart0_printf(",DISPCHAR=");
|
||||
// uart0_print_hex_dword(dispChar);
|
||||
uart0_printf("\r\n");
|
||||
menuScreen.col += menuScreen.colMult;
|
||||
if(menuScreen.col >= MENU_SCREEN_MAX_COLUMNS)
|
||||
{
|
||||
menuScreen.col = 0;
|
||||
menuScreen.row += menuScreen.rowMult;
|
||||
lineWrap |= 1;
|
||||
if(menuScreen.row >= MENU_SCREEN_MAX_ROWS)
|
||||
{
|
||||
lineWrap = 2;
|
||||
menuScreen.row = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Write the character once the IO processor is idle.
|
||||
while( (IOCTL_CMDADDR & STATUS_BUSY_WRITECHAR) != 0 );
|
||||
|
||||
// Return any line wrap actions which occurred to the position.
|
||||
return(lineWrap);
|
||||
}
|
||||
@@ -1,176 +0,0 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Name: osd.h
|
||||
// Created: December 2018
|
||||
// Author(s): Philip Smart
|
||||
// Description: IO Control Processor On Screen Display header.
|
||||
//
|
||||
// Credits:
|
||||
// Copyright: (c) 2018 Philip Smart <philip.smart@net2net.org>
|
||||
//
|
||||
// History: December 2018 - Initial module written.
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// This source file is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published
|
||||
// by the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This source file is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
#ifndef OSD_H
|
||||
#define OSD_H
|
||||
|
||||
// Debug output enabled by function definition difference.
|
||||
//
|
||||
#ifdef DEBUG
|
||||
#define osd_x_debugf(a, ...) printf(a, ##__VA_ARGS__);
|
||||
#define osd_debugf(a, ...) printf(a, ##__VA_ARGS__);
|
||||
#else
|
||||
#define osd_debugf(a, ...)
|
||||
#define osd__x_debugf(a, ...)
|
||||
#endif
|
||||
|
||||
// Status and Menu screen definitions.
|
||||
//
|
||||
#define STATUS_SCREEN 0
|
||||
#define STATUS_SCREEN_BASE_ADDR 0x320000
|
||||
#define STATUS_SCREEN_SIZE 4096
|
||||
#define STATUS_SCREEN_MAX_COLUMNS 80
|
||||
#define STATUS_SCREEN_LINE_WIDTH 640
|
||||
#define STATUS_SCREEN_MAX_ROWS 6
|
||||
#define STATUS_SCREEN_MAX_LINES 51
|
||||
#define MENU_SCREEN 1
|
||||
#define MENU_SCREEN_BASE_ADDR 0x322000
|
||||
#define MENU_SCREEN_SIZE 8192
|
||||
#define MENU_SCREEN_MAX_COLUMNS 32
|
||||
#define MENU_SCREEN_MAX_LINES 256
|
||||
#define MENU_SCREEN_LINE_WIDTH 256
|
||||
#define MENU_SCREEN_MAX_ROWS 16
|
||||
#define VIDEO_CONFIG_ADDR 0x324000
|
||||
|
||||
// Command/Mode/Status bits.
|
||||
//
|
||||
#define CMD_WRITECHAR 0x20000000 // 0b00100000000000000000000000000000
|
||||
#define CMD_READ 0x40000000 // 0b01000000000000000000000000000000
|
||||
#define CMD_WRITE 0x80000000 // 0b10000000000000000000000000000000
|
||||
#define MODE_HALFPIXEL 0x00200000 // 0b00000000001000000000000000000000
|
||||
#define MODE_V2X 0x00400000 // 0b00000000010000000000000000000000
|
||||
#define MODE_H2X 0x00800000 // 0b00000000100000000000000000000000
|
||||
#define MODE_ROTATE_0 0x00000000 // 0b00000000000000000000000000000000
|
||||
#define MODE_ROTATE_90L 0x01000000 // 0b00000001000000000000000000000000
|
||||
#define MODE_ROTATE_90R 0x02000000 // 0b00000010000000000000000000000000
|
||||
#define MODE_ROTATE_180 0x03000000 // 0b00000011000000000000000000000000
|
||||
#define MODE_BG_GREEN 0x04000000 // 0b00000100000000000000000000000000
|
||||
#define MODE_BG_RED 0x08000000 // 0b00001000000000000000000000000000
|
||||
#define MODE_BG_BLUE 0x10000000 // 0b00010000000000000000000000000000
|
||||
#define MODE_FG_GREEN 0x20000000 // 0b00100000000000000000000000000000
|
||||
#define MODE_FG_RED 0x40000000 // 0b01000000000000000000000000000000
|
||||
#define MODE_FG_BLUE 0x80000000 // 0b10000000000000000000000000000000
|
||||
#define STATUS_BUSY_WRITECHAR 0x20000000 // 0b00100000000000000000000000000000
|
||||
#define STATUS_DATA_AVAIL 0x40000000 // 0b01000000000000000000000000000000
|
||||
#define STATUS_BUSY_WRITE 0x80000000 // 0b10000000000000000000000000000000
|
||||
|
||||
// Character Generator Sets and addresses in the Emulator ROM.
|
||||
//
|
||||
#define CG_MZ80K 0
|
||||
#define CG_MZ80C 1
|
||||
#define CG_MZ1200 2
|
||||
#define CG_MZ80A 3
|
||||
#define CG_MZ700LO 4
|
||||
#define CG_MZ700HI 5
|
||||
#define CG_MZ800LO 6
|
||||
#define CG_MZ800HI 7
|
||||
#define CG_MZ80B 8
|
||||
#define CG_MZ2000 9
|
||||
#define MAX_CHARGEN_SETS 10
|
||||
static const uint32_t CHARGENADDR[MAX_CHARGEN_SETS] =
|
||||
{ 0x500000, 0x501000, 0x502000, 0x502800, 0x503000, 0x503800, 0x504000, 0x505000, 0x506000, 0x507000 };
|
||||
|
||||
// Attributes definitions.
|
||||
//
|
||||
#define CG_ROTATE_NORMAL 0
|
||||
#define CG_ROTATE_90L 1
|
||||
#define CG_ROTATE_90R 2
|
||||
#define CG_ROTATE_180 3
|
||||
#define MAX_ROTATIONS 4
|
||||
static const uint32_t ROTATIONMAP[MAX_ROTATIONS] = { MODE_ROTATE_0, MODE_ROTATE_90L, MODE_ROTATE_90R, MODE_ROTATE_180 };
|
||||
#define CG_HORZOOM_NORMAL 0
|
||||
#define CG_HORZOOM_X2 1
|
||||
#define MAX_HORIZONTAL_ZOOM 2
|
||||
static const uint32_t HORZOOMMAP[MAX_HORIZONTAL_ZOOM] = { 0x0, MODE_H2X };
|
||||
#define CG_VERZOOM_NORMAL 0
|
||||
#define CG_VERZOOM_X2 1
|
||||
#define MAX_VERTICAL_ZOOM 2
|
||||
static const uint32_t VERZOOMMAP[MAX_VERTICAL_ZOOM] = { 0x0, MODE_V2X };
|
||||
#define CG_PIXEL_SETTING_NORMAL 0
|
||||
#define CG_PIXEL_SETTING_HALF 1
|
||||
#define MAX_PIXEL_SETTINGS 2
|
||||
static const uint32_t PIXELSETTINGMAP[MAX_PIXEL_SETTINGS] = { 0x0, MODE_HALFPIXEL };
|
||||
#define CG_BLACK 0
|
||||
#define CG_BLUE 1
|
||||
#define CG_GREEN 2
|
||||
#define CG_CYAN 3
|
||||
#define CG_RED 4
|
||||
#define CG_PURPLE 5
|
||||
#define CG_YELLOW 6
|
||||
#define CG_WHITE 7
|
||||
#define MAX_COLOURS 8
|
||||
static const uint32_t STATUSFGCOLOURS[MAX_COLOURS] = { 0x00000000, MODE_FG_BLUE, MODE_FG_GREEN, MODE_FG_BLUE | MODE_FG_GREEN, MODE_FG_RED, MODE_FG_RED | MODE_FG_BLUE, MODE_FG_RED | MODE_FG_GREEN, MODE_FG_BLUE | MODE_FG_GREEN | MODE_FG_RED };
|
||||
static const uint32_t STATUSBGCOLOURS[MAX_COLOURS] = { 0x00000000, MODE_BG_BLUE, MODE_BG_GREEN, MODE_BG_BLUE | MODE_BG_GREEN, MODE_BG_RED, MODE_BG_RED | MODE_BG_BLUE, MODE_BG_RED | MODE_BG_GREEN, MODE_BG_BLUE | MODE_BG_GREEN | MODE_BG_RED };
|
||||
|
||||
// Registers
|
||||
//
|
||||
#define REGISTER_CMDADDR 0
|
||||
#define REGISTER_DOUT 1
|
||||
#define REGISTER_DIN 1
|
||||
#define REGISTER_CHRCOLS 2
|
||||
#define REGISTER_CHRCFG 3
|
||||
#define REGISTER_CGADDR 4
|
||||
|
||||
// Structure to hold control parameters per screen area.
|
||||
//
|
||||
typedef struct
|
||||
{
|
||||
uint32_t rotation;
|
||||
uint32_t horizontalZoom;
|
||||
uint32_t verticalZoom;
|
||||
uint32_t halfPixels;
|
||||
uint32_t fgColour;
|
||||
uint32_t bgColour;
|
||||
uint32_t cgAddr;
|
||||
uint32_t cgAttr;
|
||||
uint32_t charAddr;
|
||||
uint32_t colMult;
|
||||
uint32_t rowMult;
|
||||
uint32_t col;
|
||||
uint32_t row;
|
||||
uint32_t enabled;
|
||||
} screen_t;
|
||||
|
||||
// Prototypes.
|
||||
//
|
||||
void osdInit(void);
|
||||
void setConfigRegister(uint32_t, uint32_t);
|
||||
void osdFillStatus(uint32_t, uint16_t, uint16_t);
|
||||
void osdClearStatus(void);
|
||||
void osdFillMenu(uint32_t, uint16_t, uint16_t);
|
||||
void osdClearMenu(void);
|
||||
void osdClearScreen(void);
|
||||
void osdSelectCG(uint32_t, uint32_t);
|
||||
void osdSetCGAttr(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
|
||||
uint32_t osdGetRow(uint32_t);
|
||||
uint32_t osdGetColumn(uint32_t);
|
||||
void osdSetPosition(uint32_t, uint32_t, uint32_t);
|
||||
void osdEnable(uint32_t, uint32_t);
|
||||
uint8_t osdWriteChar(uint8_t, uint8_t, uint8_t);
|
||||
|
||||
|
||||
|
||||
#endif // OSD_H
|
||||
@@ -1,159 +0,0 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Name: sharpmz.h
|
||||
// Created: December 2018
|
||||
// Author(s): Philip Smart
|
||||
// Description: IO Control Processor Emulated host definitions header.
|
||||
//
|
||||
// Credits:
|
||||
// Copyright: (c) 2018 Philip Smart <philip.smart@net2net.org>
|
||||
//
|
||||
// History: December 2018 - Initial module written.
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// This source file is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published
|
||||
// by the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This source file is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
#ifndef SHARPMZ_H
|
||||
#define SHARPMZ_H
|
||||
|
||||
// Defaults.
|
||||
//
|
||||
#define MZ_TAPE_HEADER_STACK_ADDR 0x10f0
|
||||
#define MZ_TAPE_HEADER_SIZE 128
|
||||
#define MAX_FILENAME_SIZE 1024
|
||||
#define MAX_TAPE_QUEUE 5
|
||||
|
||||
// Memory blocks within the Emulator.
|
||||
//
|
||||
#define SHARPMZ_MEMBANK_ALL 0xff
|
||||
#define SHARPMZ_MEMBANK_SYSROM 0
|
||||
#define SHARPMZ_MEMBANK_SYSRAM 1
|
||||
#define SHARPMZ_MEMBANK_KEYMAP 2
|
||||
#define SHARPMZ_MEMBANK_VRAM 3
|
||||
#define SHARPMZ_MEMBANK_CMT_HDR 4
|
||||
#define SHARPMZ_MEMBANK_CMT_DATA 5
|
||||
#define SHARPMZ_MEMBANK_CGROM 6
|
||||
#define SHARPMZ_MEMBANK_CGRAM 7
|
||||
#define SHARPMZ_MEMBANK_MAXBANKS 8
|
||||
|
||||
// Name of the configuration file.
|
||||
//
|
||||
#define SHARPMZ_CONFIG_FILENAME "SHARPMZ.CFG"
|
||||
|
||||
// Name of the core.
|
||||
//
|
||||
#define SHARPMZ_CORE_NAME "SharpMZ"
|
||||
|
||||
// Maximum number of machines currently supported by the emulation.
|
||||
//
|
||||
#define MAX_MZMACHINES 8
|
||||
|
||||
// Maximum number of sub-roms per machine.
|
||||
//
|
||||
#define MAX_MROMOPTIONS 2
|
||||
|
||||
// Numeric index of each machine.
|
||||
//
|
||||
#define MZ80K_IDX 0 // 000
|
||||
#define MZ80C_IDX 1 // 001
|
||||
#define MZ1200_IDX 2 // 010
|
||||
#define MZ80A_IDX 3 // 011
|
||||
#define MZ700_IDX 4 // 100
|
||||
#define MZ800_IDX 5 // 101
|
||||
#define MZ80B_IDX 6 // 110
|
||||
#define MZ2000_IDX 7 // 111
|
||||
|
||||
// Maximum number of images which can be loaded.
|
||||
//
|
||||
#define MAX_IMAGE_TYPES 6
|
||||
|
||||
// Numeric index of each main rom image category.
|
||||
//
|
||||
#define MROM_IDX 0
|
||||
#define MROM_80C_IDX 1
|
||||
#define CGROM_IDX 2
|
||||
#define KEYMAP_IDX 3
|
||||
#define USERROM_IDX 4
|
||||
#define FDCROM_IDX 5
|
||||
|
||||
// Numeric index of monitor rom subtypes.
|
||||
//
|
||||
#define MONITOR 0
|
||||
#define MONITOR_80C 1
|
||||
|
||||
// Numeric index of Option rom subtypes.
|
||||
//
|
||||
#define USERROM 0
|
||||
#define FDCROM 1
|
||||
|
||||
// Tape(CMT) Data types.
|
||||
//
|
||||
#define SHARPMZ_CMT_MC 1 // machine code program.
|
||||
#define SHARPMZ_CMT_BASIC 2 // MZ-80 Basic program.
|
||||
#define SHARPMZ_CMT_DATA 3 // MZ-80 data file.
|
||||
#define SHARPMZ_CMT_700DATA 4 // MZ-700 data file.
|
||||
#define SHARPMZ_CMT_700BASIC 5 // MZ700 Basic program.
|
||||
|
||||
// Tape(CMT) Register bits.
|
||||
//
|
||||
#define REGISTER_CMT_PLAY_READY 0x01
|
||||
#define REGISTER_CMT_PLAYING 0x02
|
||||
#define REGISTER_CMT_RECORD_READY 0x04
|
||||
#define REGISTER_CMT_RECORDING 0x08
|
||||
#define REGISTER_CMT_ACTIVE 0x10
|
||||
#define REGISTER_CMT_SENSE 0x20
|
||||
#define REGISTER_CMT_WRITEBIT 0x40
|
||||
#define REGISTER_CMT2_APSS 0x01
|
||||
#define REGISTER_CMT2_DIRECTION 0x02
|
||||
#define REGISTER_CMT2_EJECT 0x04
|
||||
#define REGISTER_CMT2_PLAY 0x08
|
||||
#define REGISTER_CMT2_STOP 0x10
|
||||
|
||||
// Numeric id of bit for a given CMT register flag.
|
||||
//
|
||||
#define CMT_PLAY_READY 0 // Tape play back buffer, 0 = empty, 1 = full.
|
||||
#define CMT_PLAYING 1 // Tape playback, 0 = stopped, 1 = in progress.
|
||||
#define CMT_RECORD_READY 2 // Tape record buffer full.
|
||||
#define CMT_RECORDING 3 // Tape recording, 0 = stopped, 1 = in progress.
|
||||
#define CMT_ACTIVE 4 // Tape transfer in progress, 0 = no activity, 1 = activity.
|
||||
#define CMT_SENSE 5 // Tape state Sense out.
|
||||
#define CMT_WRITEBIT 6 // Write bit to MZ.
|
||||
#define CMT_READBIT 7 // Receive bit from MZ.
|
||||
#define CMT_MOTOR 8 // Motor on/off.
|
||||
|
||||
// Numeric id of SharpMZ system registers.
|
||||
//
|
||||
#define SHARPMZ_REGISTER_BASE 0x01000000
|
||||
#define REGISTER_MODEL 0
|
||||
#define REGISTER_DISPLAY 1
|
||||
#define REGISTER_DISPLAY2 2
|
||||
#define REGISTER_DISPLAY3 3
|
||||
#define REGISTER_CPU 4
|
||||
#define REGISTER_AUDIO 5
|
||||
#define REGISTER_CMT 6
|
||||
#define REGISTER_CMT2 7
|
||||
#define REGISTER_USERROM 8
|
||||
#define REGISTER_FDCROM 9
|
||||
#define REGISTER_10 10
|
||||
#define REGISTER_11 11
|
||||
#define REGISTER_12 12
|
||||
#define REGISTER_SETUP 13
|
||||
#define REGISTER_DEBUG 14
|
||||
#define REGISTER_DEBUG2 15
|
||||
#define MAX_REGISTERS 16
|
||||
|
||||
// Prototypes.
|
||||
//
|
||||
|
||||
#endif // SHARPMZ_H
|
||||
Reference in New Issue
Block a user