107 lines
5.6 KiB
Plaintext
107 lines
5.6 KiB
Plaintext
Z80 v0.2 (2022-XX-XX)
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=====================
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This is an important update that addresses a number of issues and also includes
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new features. Please note that the changes introduced in this release break the
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binary compatibility with the previous version.
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Changes:
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1. Changed the license from GPL to LGPL (by popular request).
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2. Moved the public header from <emulation/CPU/Z80.h> to <Z80.h>.
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3. Removed the Xcode project.
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4. Switched the build system from Premake to CMake.
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5. Switched to Zeta v0.1.
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6. Added pkg-config support.
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7. Added the .vimrc dotfile.
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8. Added the CITATION.cff file.
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9. Added the file_id.diz file.
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10. Added the THANKS file.
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11. Added detailed documentation.
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12. Added tests.
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13. Added public macros for checking the library version.
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14. Added public macros with bit masks for working with flags.
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15. Added public macros for accessing the 16-bit registers.
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16. Added the `z80_execute` function for running a simplified emulation without
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RESET and interrupts.
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17. Added the `z80_refresh_address` function for getting the refresh address of
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the current M1 cycle.
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18. Added the `z80_in_cycle` and `z80_out_cycle` functions for obtaining the
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clock cycle at which the I/O M-cycle begins, relative to the start of the
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instruction.
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19. Fixed a bug in the `sll` instruction.
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20. Fixed a bug in the `INX` and `OUTX` macros affecting the S and N flags.
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21. Fixed a bug in the `OUTX` macro affecting the MSByte of the port number.
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22. Fixed the clock cycles of the `dec XY` and `in (c)` instructions.
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23. Fixed the `read_16` function so that the order of the memory read operations
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is not determined by the order in which the compiler evaluates expressions.
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24. Fixed the order in which the memory write operations are performed when the
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SP register is involved. This affects the NMI response, the INT response in
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modes 1 and 2, and the following instructions: `ex (sp),{hl|XY}`, `push TT`,
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`push XY`, `call WORD`, `call Z,WORD` and `rst N`.
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25. Fixed the handling of illegal instructions to avoid stack overflows in long
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sequences of DDh/FDh prefixes.
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26. Fixed several implicit conversions to avoid warnings about loss of sign and
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precision.
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27. Fixed some bitwise operations to avoid undefined behavior and arithmetic
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right shifts on signed integers.
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28. Fixed violations of the C standard in several identifiers.
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29. Renamed the 8-bit register lists: X/Y to J/K; J/K and P/Q to O/P.
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30. Replaced all P/V overflow computation functions with a single, faster macro.
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31. Replaced all register resolution functions with macros.
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32. Replaced all `ld {J,K|O,P}` instructions that have the same destination and
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source register with NOPs. In addition, the "illegal" forms of the `ld O,P`,
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`ld O,BYTE`, `U [a,]P` and `V O` instructions are now executed without using
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the illegal instruction handler.
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33. Reimplemented the HALT state. The emulation should now be fully accurate.
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HALTskip is also supported.
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34. Renamed the `z80_reset` function to `z80_instant_reset`.
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35. Added optional emulation of the special RESET, along with the new
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`z80_special_reset` function.
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36. Added the `Z80::fetch_opcode` and `Z80::fetch` callbacks for performing
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opcode fetch operations and memory read operations on instruction data
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respectively.
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37. Added the `Z80::nop` callback for performing disregarded opcode fetch
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operations during internal NOP M-cycles.
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38. Added emulation of the NMI acknowledge M-cycle through the new `Z80::nmia`
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callback.
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39. Added emulation of the INT acknowledge M-cycle through the new `Z80::inta`
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callback, which replaces `Z80::int_data`.
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40. Added optional full emulation of the interrupt mode 0, along with the new
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`Z80::int_fetch` callback for performing bus read operations on instruction
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data. If not enabled at compile-time, the old simplified emulation is built,
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which supports only the most typical instructions.
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41. Added four callbacks for notifying the execution of important instructions:
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`Z80::ld_i_a`, `Z80::ld_r_a`, `Z80::reti` and `Z80::retn`.
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42. Added hooking functionality through the `ld h,h` instruction and the new
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`Z80::hook` callback.
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43. Added the `Z80::illegal` callback for delegating the emulation of illegal
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instructions.
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44. Added accurate flag behavior in the following instructions: `ldir`, `lddr`,
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`cpir`, `cpdr`, `inir`, `indr`, `otir` and `otdr`.
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45. Added emulation of the interrupt acceptance deferral that occurs during the
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`reti` and `retn` instructions.
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46. Added MEMPTR emulation. The `bit N,(hl)` instruction now produces a correct
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value of F.
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47. Added optional emulation of the Q "register". If enabled at compile-time,
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the `ccf` and `scf` instructions produce a correct value of F.
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48. Added emulation options that can be configured at runtime.
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49. Added emulation of the `out (c),255` instruction (Zilog Z80 CMOS).
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50. Added optional emulation of the bug affecting the `ld a,{i|r}` instructions
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(Zilog Z80 NMOS). If enabled at compile-time, the P/V flag is reset when an
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INT is accepted during the execution of these instructions.
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51. Removed `Z80::state`. Replaced with individual members for the registers,
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the interrupt enable flip-flops and the interrupt mode.
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52. Removed the superfluous EI flag. The previous opcode is checked instead,
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which is faster and makes the `Z80` object smaller.
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53. Removed all module-related stuff.
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54. Optimizations in flag computation and condition evaluation.
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55. New source code comments and improvements to existing ones.
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56. Improved code aesthetics.
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57. Other improvements, optimizations and minor changes.
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Z80 v0.1 (2018-11-10)
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=====================
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Initial public release.
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