357 lines
10 KiB
Systemverilog
357 lines
10 KiB
Systemverilog
//=======================================================================================================
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//
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// Name: emu.sv
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// Created: June 2018
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// Author(s): Philip Smart
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// Description: Sharp MZ series compatible logic.
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//
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// This module is the main bridge between the emulator (sharpmz.vhd) and the MiSTer
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// framework (hps_io.v/sys_top.v).
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//
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// Copyright: (C) 2018 Sorgelig
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// (C) 2018 Philip Smart <philip.smart@net2net.org>
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//
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// History: June 2018 - Initial creation.
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//
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//=======================================================================================================
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// This source file is free software: you can redistribute it and-or modify
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// it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//=======================================================================================================
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module emu
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(
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//Master input clocks
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input CLK_50M,
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//Async reset from top-level module.
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//Can be used as initial reset.
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input RESET,
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//Must be passed to hps_io module
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inout [44:0] HPS_BUS,
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//Base video clock. Usually equals to CLK_SYS.
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output CLK_VIDEO,
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//Multiple resolutions are supported using different CE_PIXEL rates.
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//Must be based on CLK_VIDEO
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output CE_PIXEL,
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//Video aspect ratio for HDMI. Most retro systems have ratio 4:3.
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output [7:0] VIDEO_ARX,
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output [7:0] VIDEO_ARY,
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// These video signals are defined in sys_top.v, via the video_mixer we output the video from the emulator onto these
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// signals, which then get passed as follows:
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// emu -> video_mixer -> vga_osd -> vga_out
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output [7:0] VGA_R,
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output [7:0] VGA_G,
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output [7:0] VGA_B,
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output VGA_HS,
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output VGA_VS,
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output VGA_DE, // = ~(VBlank | HBlank)
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output LED_USER, // 1 - ON, 0 - OFF.
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// b[1]: 0 - LED status is system status OR'd with b[0]
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// 1 - LED status is controled solely by b[0]
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// hint: supply 2'b00 to let the system control the LED.
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output [1:0] LED_POWER,
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output [1:0] LED_DISK,
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output [7:0] LED_MB,
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output [15:0] AUDIO_L,
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output [15:0] AUDIO_R,
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output AUDIO_S, // 1 - signed audio samples, 0 - unsigned
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output [1:0] AUDIO_MIX, // 0 - no mix, 1 - 25%, 2 - 50%, 3 - 100% (mono)
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// input TAPE_IN,
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// SD-SPI
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output SD_SCK,
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output SD_MOSI,
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input SD_MISO,
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output SD_CS,
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input SD_CD,
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//High latency DDR3 RAM interface
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//Use for non-critical time purposes
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output DDRAM_CLK,
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input DDRAM_BUSY,
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output [7:0] DDRAM_BURSTCNT,
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output [28:0] DDRAM_ADDR,
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input [63:0] DDRAM_DOUT,
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input DDRAM_DOUT_READY,
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output DDRAM_RD,
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output [63:0] DDRAM_DIN,
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output [7:0] DDRAM_BE,
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output DDRAM_WE,
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//SDRAM interface with lower latency
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// ,output SDRAM_CLK,
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// output SDRAM_CKE,
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// output [12:0] SDRAM_A,
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// output [1:0] SDRAM_BA,
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// inout [15:0] SDRAM_DQ,
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// output SDRAM_DQML,
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// output SDRAM_DQMH,
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// output SDRAM_nCS,
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// output SDRAM_nCAS,
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// output SDRAM_nRAS,
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// output SDRAM_nWE
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input UART_RX,
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output UART_TX
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);
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//assign {SD_SCK, SD_MOSI, SD_CS} = 'Z;
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//assign {SDRAM_DQ, SDRAM_A, SDRAM_BA, SDRAM_CLK, SDRAM_CKE, SDRAM_DQML, SDRAM_DQMH, SDRAM_nWE, SDRAM_nCAS, SDRAM_nRAS, SDRAM_nCS} = 'Z;
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assign {DDRAM_CLK, DDRAM_BURSTCNT, DDRAM_ADDR, DDRAM_DIN, DDRAM_BE, DDRAM_RD, DDRAM_WE} = 0;
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assign LED_USER = ioctl_download;
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assign LED_DISK = 0;
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assign LED_POWER = 0;
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assign VIDEO_ARX = status[1] ? 8'd16 : 8'd4;
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assign VIDEO_ARY = status[1] ? 8'd9 : 8'd3;
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wire [2:0] scale = status[4:2];
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// Menu is handled in the MiSTer c++ program.
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//
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`include "build_id.v"
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localparam CONF_STR =
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{
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"SHARP MZ SERIES;;",
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"J,Fire;",
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"V,v1.02.",`BUILD_DATE
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};
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///////////////// CLOCKS ////////////////////////
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wire clk_sys;
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///////////////// HPS ///////////////////////////
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wire [31:0] status;
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wire [1:0] buttons;
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wire [10:0] ps2_key;
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wire [24:0] ps2_mouse;
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wire ioctl_download;
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wire ioctl_upload;
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wire [7:0] ioctl_index;
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wire ioctl_wr;
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wire ioctl_rd;
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wire [24:0] ioctl_addr;
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wire [15:0] ioctl_dout;
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wire [15:0] ioctl_din;
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wire forced_scandoubler;
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hps_io #(.STRLEN(($size(CONF_STR)>>3))) hps_io
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(
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.clk_sys(clk_sys),
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.HPS_BUS(HPS_BUS),
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.conf_str(CONF_STR),
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.buttons(buttons),
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.status(status),
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.forced_scandoubler(forced_scandoubler),
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.ioctl_download(ioctl_download),
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.ioctl_upload(ioctl_upload),
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.ioctl_index(ioctl_index),
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.ioctl_wr(ioctl_wr),
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.ioctl_rd(ioctl_rd),
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.ioctl_addr(ioctl_addr),
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.ioctl_dout(ioctl_dout),
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.ioctl_din(ioctl_din),
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.ioctl_wait(0),
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.sd_conf(0),
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.sd_ack_conf(),
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//.ps2_kbd_led_use(0),
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//.ps2_kbd_led_status(0),
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.ps2_key(ps2_key),
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.ps2_mouse(ps2_mouse)
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// unused
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//.joystick_0(),
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//.joystick_1(),
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//.new_vmode(),
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//.img_mounted(),
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//.img_readonly(),
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//.img_size(),
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//.sd_lba(),
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//.sd_rd(),
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//.sd_wr(),
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//.sd_ack(),
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//.sd_buff_addr(),
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//.sd_buff_dout(),
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//.sd_buff_din(),
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//.sd_buff_wr(),
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//.ps2_kbd_clk_out(),
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//.ps2_kbd_data_out(),
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//.ps2_kbd_clk_in(),
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//.ps2_kbd_data_in(),
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//.ps2_mouse_clk_out(),
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//.ps2_mouse_data_out(),
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//.ps2_mouse_data_in(),
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//.ps2_mouse_clk_in(),
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//.joystick_analog_0(),
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//.joystick_analog_1(),
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//.RTC(),
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//.TIMESTAMP()
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);
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///////////////// RESET /////////////////////////
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//wire reset = RESET | status[0] | buttons[1] | status[6] | ioctl_download;
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wire reset = RESET;
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wire warm_reset = status[0] | buttons[1]; //| ioctl_download;
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//////////////// Machine ////////////////////////
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wire [7:0] audio_l_emu;
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wire [7:0] audio_r_emu;
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assign AUDIO_L = {audio_l_emu,8'd0};
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assign AUDIO_R = {audio_r_emu,8'd0};
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assign AUDIO_S = 1;
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assign AUDIO_MIX = 0;
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wire clk_video_in;
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wire [7:0] R_emu;
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wire [7:0] G_emu;
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wire [7:0] B_emu;
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wire hblank_emu;
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wire vblank_emu;
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wire hsync_emu;
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wire vsync_emu;
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bridge sharp_mz
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(
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// Clocks Input to Emulator.
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.clkmaster(CLK_50M),
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// System clock.
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.clksys(clk_sys),
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// Clocks output by the emulator.
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.clkvid(clk_video_in),
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// Reset
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.cold_reset(reset),
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.warm_reset(warm_reset),
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// LED on MB
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.main_leds(LED_MB),
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// PS2 via USB.
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.ps2_key(ps2_key),
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// VGA on IO daughter card.
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.vga_hb_o(hblank_emu),
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.vga_vb_o(vblank_emu),
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.vga_hs_o(hsync_emu),
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.vga_vs_o(vsync_emu),
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.vga_r_o(R_emu),
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.vga_g_o(G_emu),
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.vga_b_o(B_emu),
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// AUDIO on IO daughter card.
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.audio_l_o(audio_l_emu),
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.audio_r_o(audio_r_emu),
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.uart_rx(UART_RX),
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.uart_tx(UART_TX),
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.sd_sck(SD_SCK),
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.sd_mosi(SD_MOSI),
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.sd_miso(SD_MISO),
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.sd_cs(SD_CS),
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.sd_cd(SD_CD),
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// HPS Interface
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.ioctl_download(ioctl_download), // HPS Downloading to FPGA.
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.ioctl_upload(ioctl_upload), // HPS Uploading from FPGA.
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.ioctl_clk(clk_sys), // HPS I/O Clock.
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.ioctl_wr(ioctl_wr), // HPS Write Enable to FPGA.
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.ioctl_rd(ioctl_rd), // HPS Read Enable from FPGA.
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.ioctl_addr(ioctl_addr), // HPS Address in FPGA to write into.
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.ioctl_dout(ioctl_dout), // HPS Data to be written into FPGA.
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.ioctl_din(ioctl_din) // HPS Data to be read into HPS.
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);
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// If ce_pix is same as pixel clock, uncomment below and remove CE_PIXEL from .ce_pix_out below.
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//
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//assign CE_PIXEL=1;
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//assign CLK_VIDEO = clk_sys;
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assign CLK_VIDEO = clk_video_in;
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assign CE_PIXEL = clk_video_in;
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assign VGA_R = R_emu;
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assign VGA_G = G_emu;
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assign VGA_B = B_emu;
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assign VGA_VS = vsync_emu;
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assign VGA_HS = hsync_emu;
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assign VGA_DE = ~(vblank_emu | hblank_emu);
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//video_mixer #(.HALF_DEPTH(0)) video_mixer
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//video_mixer #(.LINE_LENGTH(320), .HALF_DEPTH(1)) video_mixer
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//(
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// .clk_sys(clk_sys),
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// .ce_pix(clk_video_in), // Video pixel clock from core.
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// //.ce_pix_out(CE_PIXEL),
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//
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// .scanlines({scale == 4, scale == 3, scale == 2}),
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// .scandoubler(scale || forced_scandoubler),
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// .hq2x(scale==1),
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//
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// .mono(0),
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//
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// // Input signals into the mixer, originating from the emulator.
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// .R(R_emu),
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// .G(G_emu),
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// .B(B_emu),
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//
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// // Positive pulses.
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// .HSync(hsync_emu),
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// .VSync(vsync_emu),
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// .HBlank(hblank_emu),
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// .VBlank(vblank_emu),
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//
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// .VGA_R(VGA_R),
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// .VGA_G(VGA_G),
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// .VGA_B(VGA_B),
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// .VGA_VS(VGA_VS),
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// .VGA_HS(VGA_HS),
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// .VGA_DE(VGA_DE)
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//
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// // Outputs of the mixer are bound to the VGA_x signals defined in the sys_top module and passed into this module as parameters.
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// // These signals then feed the vga_osd -> vga_out modules in systop.v
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//);
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// Uncomment below and comment out video_mixer to pass original signal to sys_top.v.
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// To output original signal, edit sys_top.v and comment out vga_osd and vga_out, uncomment the assign statements.
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//
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//assign VGA_R = R_emu;
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//assign VGA_G = G_emu;
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//assign VGA_B = B_emu;
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//assign VGA_HS = hsync_emu;
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//assign VGA_VS = vsync_emu;
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//assign VGA_DE = ~(vblank_emu | hblank_emu);
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endmodule
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