Move IDE from x86 to common code.

This commit is contained in:
sorgelig
2021-06-28 06:51:39 +08:00
parent 02af31d730
commit b8b02da1a6
13 changed files with 216 additions and 510 deletions

View File

@@ -30,7 +30,7 @@
<NMakeOutput>MiSTer</NMakeOutput>
<NMakeCleanCommandLine>git.lnk ./clean.sh</NMakeCleanCommandLine>
<NMakePreprocessorDefinitions>__arm__;__GNUC__;__USE_GNU ;_GNU_SOURCE;VDATE="000000";_FILE_OFFSET_BITS=64;_LARGEFILE64_SOURCE;$(NMakePreprocessorDefinitions)</NMakePreprocessorDefinitions>
<NMakeIncludeSearchPath>c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\libc\usr\include;c:\Work\Git\opt\gcc75\lib\gcc\arm-linux-gnueabihf\7.5.0\include;c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\include\c++\7.5.0;c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\include\c++\7.5.0\arm-linux-gnueabihf;$(NMakeIncludeSearchPath);lib\libco;lib\miniz;lib\lodepng</NMakeIncludeSearchPath>
<NMakeIncludeSearchPath>c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\libc\usr\include;c:\Work\Git\opt\gcc75\lib\gcc\arm-linux-gnueabihf\7.5.0\include;c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\include\c++\7.5.0;c:\Work\Git\opt\gcc75\arm-linux-gnueabihf\include\c++\7.5.0\arm-linux-gnueabihf;$(NMakeIncludeSearchPath);lib\libco;lib\miniz;lib\lodepng;lib\libchdr\include</NMakeIncludeSearchPath>
<OutDir>$(TEMP)</OutDir>
<IntDir>$(TEMP)</IntDir>
<AdditionalOptions>
@@ -59,6 +59,8 @@
<ClCompile Include="file_io.cpp" />
<ClCompile Include="fpga_io.cpp" />
<ClCompile Include="hardware.cpp" />
<ClCompile Include="ide.cpp" />
<ClCompile Include="ide_cdrom.cpp" />
<ClCompile Include="input.cpp" />
<ClCompile Include="joymapping.cpp" />
<ClCompile Include="lib\libco\arm.c" />
@@ -81,6 +83,7 @@
<ClCompile Include="support\arcade\mra_loader.cpp" />
<ClCompile Include="support\archie\archie.cpp" />
<ClCompile Include="support\c64\c64.cpp" />
<ClCompile Include="support\chd\mister_chd.cpp" />
<ClCompile Include="support\megacd\megacd.cpp" />
<ClCompile Include="support\megacd\megacdd.cpp" />
<ClCompile Include="support\minimig\minimig_boot.cpp" />
@@ -96,8 +99,6 @@
<ClCompile Include="support\snes\snes.cpp" />
<ClCompile Include="support\st\st_tos.cpp" />
<ClCompile Include="support\x86\x86.cpp" />
<ClCompile Include="support\x86\x86_cdrom.cpp" />
<ClCompile Include="support\x86\x86_ide.cpp" />
<ClCompile Include="support\x86\x86_share.cpp" />
<ClCompile Include="sxmlc.c" />
<ClCompile Include="user_io.cpp" />
@@ -122,6 +123,8 @@
<ClInclude Include="fpga_reset_manager.h" />
<ClInclude Include="fpga_system_manager.h" />
<ClInclude Include="hardware.h" />
<ClInclude Include="ide.h" />
<ClInclude Include="ide_cdrom.h" />
<ClInclude Include="input.h" />
<ClInclude Include="joymapping.h" />
<ClInclude Include="lib\imlib2\Imlib2.h" />
@@ -147,6 +150,7 @@
<ClInclude Include="support\arcade\mra_loader.h" />
<ClInclude Include="support\archie\archie.h" />
<ClInclude Include="support\c64\c64.h" />
<ClInclude Include="support\chd\mister_chd.h" />
<ClInclude Include="support\megacd\megacd.h" />
<ClInclude Include="support\minimig\miminig_fs_messages.h" />
<ClInclude Include="support\minimig\minimig_boot.h" />
@@ -161,8 +165,6 @@
<ClInclude Include="support\snes\snes.h" />
<ClInclude Include="support\st\st_tos.h" />
<ClInclude Include="support\x86\x86.h" />
<ClInclude Include="support\x86\x86_cdrom.h" />
<ClInclude Include="support\x86\x86_ide.h" />
<ClInclude Include="support\x86\x86_share.h" />
<ClInclude Include="sxmlc.h" />
<ClInclude Include="user_io.h" />

View File

@@ -202,15 +202,18 @@
<ClCompile Include="support\x86\x86_share.cpp">
<Filter>Source Files\support</Filter>
</ClCompile>
<ClCompile Include="support\x86\x86_ide.cpp">
<Filter>Source Files\support</Filter>
</ClCompile>
<ClCompile Include="support\x86\x86_cdrom.cpp">
<Filter>Source Files\support</Filter>
</ClCompile>
<ClCompile Include="shmem.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="ide.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="ide_cdrom.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="support\chd\mister_chd.cpp">
<Filter>Source Files\support</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="battery.h">
@@ -393,14 +396,17 @@
<ClInclude Include="support\x86\x86_share.h">
<Filter>Header Files\support</Filter>
</ClInclude>
<ClInclude Include="support\x86\x86_ide.h">
<Filter>Header Files\support</Filter>
</ClInclude>
<ClInclude Include="support\x86\x86_cdrom.h">
<Filter>Header Files\support</Filter>
</ClInclude>
<ClInclude Include="shmem.h">
<Filter>Header Files</Filter>
</ClInclude>
<ClInclude Include="ide.h">
<Filter>Header Files</Filter>
</ClInclude>
<ClInclude Include="ide_cdrom.h">
<Filter>Header Files</Filter>
</ClInclude>
<ClInclude Include="support\chd\mister_chd.h">
<Filter>Header Files\support</Filter>
</ClInclude>
</ItemGroup>
</Project>

View File

@@ -12,13 +12,12 @@
#include <sstream>
#include <sys/stat.h>
#include "../../spi.h"
#include "../../user_io.h"
#include "../../file_io.h"
#include "../../hardware.h"
#include "x86.h"
#include "x86_ide.h"
#include "x86_cdrom.h"
#include "support/x86/x86.h"
#include "spi.h"
#include "user_io.h"
#include "file_io.h"
#include "hardware.h"
#include "ide.h"
#if 0
#define dbg_printf printf
@@ -36,10 +35,40 @@
#define dbg2_printf(...) void()
#endif
#define IOWR(base, reg, value, ver) x86_dma_set((base) + ((ver) ? (reg) : ((reg)<<2)), (value))
#define IDE0_BASE 0xF000
#define IDE1_BASE 0xF100
#define ide_send_data(databuf, size) x86_dma_sendbuf(ide->base + 255, (size), (uint32_t*)(databuf))
#define ide_recv_data(databuf, size) x86_dma_recvbuf(ide->base + 255, (size), (uint32_t*)(databuf))
#define ide_send_data(databuf, size) ide_sendbuf(ide, 255, (size), (uint16_t*)(databuf))
#define ide_recv_data(databuf, size) ide_recvbuf(ide, 255, (size), (uint16_t*)(databuf))
void ide_reg_set(ide_config *ide, uint16_t reg, uint16_t value)
{
EnableIO();
spi8(UIO_DMA_WRITE);
spi32_w(ide->base + reg);
spi_w(value);
DisableIO();
}
void ide_sendbuf(ide_config *ide, uint16_t reg, uint32_t length, uint16_t *data)
{
EnableIO();
fpga_spi_fast(UIO_DMA_WRITE);
fpga_spi_fast(ide->base + reg);
fpga_spi_fast(0);
fpga_spi_fast_block_write(data, length);
DisableIO();
}
void ide_recvbuf(ide_config *ide, uint16_t reg, uint32_t length, uint16_t *data)
{
EnableIO();
fpga_spi_fast(UIO_DMA_READ);
fpga_spi_fast(ide->base + reg);
fpga_spi_fast(0);
fpga_spi_fast_block_read(data, length);
DisableIO();
}
const uint32_t ide_io_max_size = 32;
uint8_t ide_buf[ide_io_max_size * 512];
@@ -103,9 +132,10 @@ void ide_print_regs(regs_t *regs)
void ide_get_regs(ide_config *ide)
{
uint32_t data[3];
x86_dma_recvbuf(ide->base, 3, data);
ide_recvbuf(ide, 0, 6, (uint16_t*)data);
ide->regs.io_done = (uint8_t)(data[0] & 1);
ide->regs.io_fast = (uint8_t)(data[0] & 2);
ide->regs.features = (uint8_t)(data[0] >> 8);
ide->regs.sector_count = (uint8_t)(data[0] >> 16);
ide->regs.sector = (uint8_t)(data[0] >> 24);
@@ -145,7 +175,7 @@ void ide_set_regs(ide_config *ide)
};
//hexdump(data, 12, ide->base);
x86_dma_sendbuf(ide->base, 3, (uint32_t*)data);
ide_sendbuf(ide, 0, 6, (uint16_t*)data);
}
static void ide_set_geometry(drive_t *drive, uint16_t sectors, uint16_t heads)
@@ -162,16 +192,15 @@ static void ide_set_geometry(drive_t *drive, uint16_t sectors, uint16_t heads)
drive->cylinders = cylinders;
}
void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int sectors, int heads)
void ide_img_set(uint32_t drvnum, fileTYPE *f, int cd, int sectors, int heads)
{
int drvnum = num;
int drv = (ver == 3) ? (num & 1) : 0;
if (ver == 3) num >>= 1;
int drv = (drvnum & 1);
int port = (drvnum >> 1);
drive_t *drive = &ide_inst[num].drive[drv];
drive_t *drive = &ide_inst[port].drive[drv];
ide_inst[num].base = baseaddr;
ide_inst[num].drive[drv].drvnum = drvnum;
ide_inst[port].base = port ? IDE1_BASE : IDE0_BASE;
ide_inst[port].drive[drv].drvnum = drvnum;
drive->f = f;
@@ -182,34 +211,27 @@ void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int
//drive->total_sectors = 0;
drive->present = f ? 1 : 0;
ide_inst[num].state = IDE_STATE_RESET;
ide_inst[num].bitoff = num * 3;
ide_inst[port].state = IDE_STATE_RESET;
ide_inst[port].bitoff = port * 3;
drive->cd = drive->present && (ver == 3) && cd;
drive->cd = drive->present && cd;
if (ver == 3)
if (f && drive->placeholder && !drive->cd)
{
if (f && drive->placeholder && !drive->cd)
{
printf("Cannot hot-mount HDD image to CD!\n");
FileClose(drive->f);
drive->f = 0;
f = 0;
drive->present = 0;
}
drive->placeholder = drive->allow_placeholder;
if (drive->placeholder && drive->present && !drive->cd) drive->placeholder = 0;
if (drive->placeholder) drive->cd = 1;
IOWR(ide_inst[num].base, 6, ((drive->present || drive->placeholder) ? 9 : 8) << (drv * 4), 1);
IOWR(ide_inst[num].base, 6, 0x200, 1);
}
else if (!drive->present)
{
return;
printf("Cannot hot-mount HDD image to CD!\n");
FileClose(drive->f);
drive->f = 0;
f = 0;
drive->present = 0;
}
drive->placeholder = drive->allow_placeholder;
if (drive->placeholder && drive->present && !drive->cd) drive->placeholder = 0;
if (drive->placeholder) drive->cd = 1;
ide_reg_set(&ide_inst[port], 6, ((drive->present || drive->placeholder) ? 9 : 8) << (drv * 4));
ide_reg_set(&ide_inst[port], 6, 0x200);
if(drive->f)
{
if (!drive->chd_f) drive->total_sectors = (drive->f->size / 512);
@@ -221,101 +243,6 @@ void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int
{
if (drive->present) ide_set_geometry(drive, sectors, heads);
/*uint16_t identify[256] =
{
0x0040, //word 0
drive->cylinders, //word 1
0x0000, //word 2 reserved
drive->heads, //word 3
0x0000, //word 4 obsolete
0x0000, //word 5 obsolete
drive->spt, //word 6
0x0000, //word 7 vendor specific
0x0000, //word 8 vendor specific
0x0000, //word 9 vendor specific
('A' << 8) | 'O', //word 10
('H' << 8) | 'D', //word 11
('0' << 8) | '0', //word 12
('0' << 8) | '0', //word 13
('0' << 8) | ' ', //word 14
(' ' << 8) | ' ', //word 15
(' ' << 8) | ' ', //word 16
(' ' << 8) | ' ', //word 17
(' ' << 8) | ' ', //word 18
(' ' << 8) | ' ', //word 19
0, //word 20 buffer type
0, //word 21 cache size
0, //word 22 number of ecc bytes
0,0,0,0, //words 23..26 firmware revision
(' ' << 8) | ' ', //words 27..46 model number
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
(' ' << 8) | ' ',
0x8010, //word 47 max multiple sectors
0, //word 48 dword io
1 << 9, //word 49 lba supported
0, //word 50 reserved
0, //word 51 pio timing
0, //word 52 pio timing
1, //word 53 valid fields
drive->cylinders, //word 54
drive->heads, //word 55
drive->spt, //word 56
(uint16_t)(drive->total_sectors & 0xFFFF), //word 57
(uint16_t)(drive->total_sectors >> 16), //word 58
0, //word 59 multiple sectors
(uint16_t)(drive->total_sectors & 0xFFFF), //word 60 LBA-28
(uint16_t)(drive->total_sectors >> 16), //word 61 LBA-28
0, //word 62 single word dma modes
0, //word 63 multiple word dma modes
0, //word 64 pio modes
0,0,0,0, //word 65..68
0,0,0,0,0,0,0,0,0,0,0, //word 69..79
0, //word 80 ata modes
0, //word 81 minor version number
0, //word 82 supported commands
0, //word 83
0, //word 84
0, //word 85
0, //word 86
0, //word 87
0, //word 88
0,0,0,0, //word 89..92
0, //word 93
0,0,0,0,0,0, //word 94..99
(uint16_t)(drive->total_sectors & 0xFFFF), //word 100 LBA-48
(uint16_t)(drive->total_sectors >> 16), //word 101 LBA-48
0, //word 102 LBA-48
0, //word 103 LBA-48
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, //word 104..127
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, //word 128..255
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
};*/
uint16_t identify[256] =
{
0x0040, //word 0
@@ -513,9 +440,9 @@ void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int
drive->load_state = (drive->f || drive->chd_f) ? 1 : 3;
}
if (ide_inst[num].drive[drv].present)
if (ide_inst[port].drive[drv].present)
{
char *name = ide_inst[num].drive[drv].f->name;
char *name = ide_inst[port].drive[drv].f->name;
for (int i = 0; i < 20; i++)
{
if (*name) drive->id[27 + i] = ((*name++) << 8) | 0x20;
@@ -524,20 +451,8 @@ void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int
//hexdump(drive->id, 256);
}
if (ver < 3)
{
for (int i = 0; i < 128; i++) IOWR(ide_inst[num].base, 0, drive->present ? (drive->id[2 * i + 1] << 16) | drive->id[2 * i + 0] : 0, ver);
IOWR(ide_inst[num].base, 1, drive->cylinders, ver);
IOWR(ide_inst[num].base, 2, drive->heads, ver);
IOWR(ide_inst[num].base, 3, drive->spt, ver);
IOWR(ide_inst[num].base, 4, drive->spt * drive->heads, ver);
IOWR(ide_inst[num].base, 5, drive->spt * drive->heads * drive->cylinders, ver);
IOWR(ide_inst[num].base, 6, 0, ver); // base LBA
}
printf("HDD%d:\n present %d\n hd_cylinders %d\n hd_heads %d\n hd_spt %d\n hd_total_sectors %d\n\n",
(ver < 3) ? num : (num * 2 + drv), drive->present, drive->cylinders, drive->heads, drive->spt, drive->total_sectors);
drvnum, drive->present, drive->cylinders, drive->heads, drive->spt, drive->total_sectors);
}
static uint32_t get_lba(ide_config *ide)
@@ -619,8 +534,17 @@ static void process_read(ide_config *ide, int multi)
ide->regs.status = ATA_STATUS_RDP | ATA_STATUS_RDY | ATA_STATUS_DRQ | ATA_STATUS_IRQ;
if (!ide->regs.sector_count) ide->regs.status |= ATA_STATUS_END;
ide_set_regs(ide);
ide_send_data(ide_buf, cnt * 128);
if (ide->regs.io_fast)
{
ide_set_regs(ide);
ide_send_data(ide_buf, cnt * 256);
}
else
{
ide_send_data(ide_buf, cnt * 256);
ide->regs.status &= ~ATA_STATUS_RDP;
ide_set_regs(ide);
}
if (!ide->regs.sector_count)
{
@@ -673,7 +597,7 @@ static void process_write(ide_config *ide, int multi)
break;
}
ide_recv_data(ide_buf, cnt * 128);
ide_recv_data(ide_buf, cnt * 256);
if (ide->regs.cmd == 0xFA)
{
@@ -683,7 +607,7 @@ static void process_write(ide_config *ide, int multi)
static const char* names[6] = { "fdd0", "fdd1", "ide00", "ide01", "ide10", "ide11" };
printf("Request for new image for drive %s: %s\n", names[drvnum], filename);
x86_set_image(drvnum, filename);
if(is_x86()) x86_set_image(drvnum, filename);
}
else
{
@@ -714,9 +638,9 @@ static int handle_hdd(ide_config *ide)
ide->regs.drv = drv;
}
ide->regs.io_size = 1;
ide->regs.status = ATA_STATUS_RDP | ATA_STATUS_RDY | ATA_STATUS_DRQ | ATA_STATUS_IRQ | ATA_STATUS_END;
ide->regs.status = ATA_STATUS_RDY | ATA_STATUS_DRQ | ATA_STATUS_IRQ | ATA_STATUS_END;
ide_send_data(ide->drive[ide->regs.drv].id, 256);
ide_set_regs(ide);
ide_send_data(ide->drive[ide->regs.drv].id, 128);
break;
case 0xC4: // read multiple
@@ -840,7 +764,7 @@ void ide_io(int num, int req)
}
else if (ide->state == IDE_STATE_WAIT_PKT_MODE)
{
ide_recv_data(ide_buf, 128);
ide_recv_data(ide_buf, 256);
printf("mode select data:\n");
hexdump(ide_buf, ide->regs.cylinder);
cdrom_reply(ide, 0);

View File

@@ -1,7 +1,7 @@
#ifndef X86_IDE_H
#define X86_IDE_H
#ifndef IDE_H
#define IDE_H
#include "../chd/mister_chd.h"
#include "support/chd/mister_chd.h"
#define ATA_STATUS_BSY 0x80 // busy
#define ATA_STATUS_RDY 0x40 // ready
@@ -35,6 +35,7 @@
typedef struct
{
uint8_t io_done;
uint8_t io_fast;
uint8_t features;
uint8_t sector_count;
uint8_t sector;
@@ -64,7 +65,7 @@ typedef struct
uint8_t attr;
uint8_t mode2;
uint8_t number;
int chd_offset;
int chd_offset;
} track_t;
typedef struct
@@ -94,11 +95,11 @@ typedef struct
uint32_t play_start_lba;
uint32_t play_end_lba;
chd_file *chd_f;
int chd_hunknum;
uint8_t *chd_hunkbuf;
uint32_t chd_total_size;
uint32_t chd_last_partial_lba;
chd_file *chd_f;
int chd_hunknum;
uint8_t *chd_hunkbuf;
uint32_t chd_total_size;
uint32_t chd_last_partial_lba;
uint16_t id[256];
} drive_t;
@@ -115,7 +116,7 @@ typedef struct
drive_t drive[2];
} ide_config;
#include "x86_cdrom.h"
#include "ide_cdrom.h"
extern ide_config ide_inst[2];
extern const uint32_t ide_io_max_size;
@@ -125,11 +126,16 @@ void ide_print_regs(regs_t *regs);
void ide_get_regs(ide_config *ide);
void ide_set_regs(ide_config *ide);
void ide_sendbuf(ide_config *ide, uint16_t reg, uint32_t length, uint16_t *data);
void ide_recvbuf(ide_config *ide, uint16_t reg, uint32_t length, uint16_t *data);
void ide_reg_set(ide_config *ide, uint16_t reg, uint16_t value);
uint16_t ide_check(int status = 0);
void ide_set(uint32_t num, uint32_t baseaddr, fileTYPE *f, int ver, int cd, int sectors = 0, int heads = 0);
void ide_io(int num, int req);
int ide_img_mount(fileTYPE *f, const char *name, int rw);
void ide_img_set(uint32_t drvnum, fileTYPE *f, int cd, int sectors = 0, int heads = 0);
int ide_is_placeholder(int num);
void ide_reset(uint8_t hotswap[4]);
int ide_img_mount(fileTYPE *f, const char *name, int rw);
void ide_io(int num, int req);
#endif

View File

@@ -11,16 +11,14 @@
#include <string>
#include <sstream>
#include <sys/stat.h>
#include <libchdr/chd.h>
#include "../../spi.h"
#include "../../user_io.h"
#include "../../file_io.h"
#include "../../hardware.h"
#include "../../cd.h"
#include "../../lib/libchdr/include/libchdr/chd.h"
#include "x86.h"
#include "x86_ide.h"
#include "x86_cdrom.h"
#include "spi.h"
#include "user_io.h"
#include "file_io.h"
#include "hardware.h"
#include "cd.h"
#include "ide.h"
#if 0
#define dbg_printf printf
@@ -32,11 +30,9 @@
#define dbg_hexdump(...) void()
#endif
#define IOWR(base, reg, value, ver) x86_dma_set((base) + ((ver) ? (reg) : ((reg)<<2)), value)
#define ide_send_data(databuf, size) x86_dma_sendbuf(ide->base + 255, (size), (uint32_t*)(databuf))
#define ide_recv_data(databuf, size) x86_dma_recvbuf(ide->base + 255, (size), (uint32_t*)(databuf))
#define ide_reset_buf() x86_dma_set(ide->base + 3, 0)
#define ide_send_data(databuf, size) ide_sendbuf(ide, 255, (size), (uint16_t*)(databuf))
#define ide_recv_data(databuf, size) ide_recvbuf(ide, 255, (size), (uint16_t*)(databuf))
#define ide_reset_buf() ide_reg_set(ide, 7, 0)
#define BYTES_PER_RAW_REDBOOK_FRAME 2352
#define BYTES_PER_COOKED_REDBOOK_FRAME 2048
@@ -924,9 +920,9 @@ static int read_subchannel(drive_t *drv, uint8_t* cmdbuf)
static void pkt_send(ide_config *ide, void *data, uint16_t size)
{
ide_send_data(data, (size + 3) / 4);
ide->regs.pkt_io_size = (size + 1) / 2;
ide_send_data(data, ide->regs.pkt_io_size);
ide->regs.pkt_io_size = (size+1)/2;
ide->regs.cylinder = size;
ide->regs.sector_count = 2;
@@ -1182,7 +1178,7 @@ void cdrom_handle_pkt(ide_config *ide)
drive_t *drv = &ide->drive[ide->regs.drv];
uint8_t cmdbuf[16];
ide_recv_data(cmdbuf, 3);
ide_recv_data(cmdbuf, 6);
ide_reset_buf();
dbg_hexdump(cmdbuf, 12, 0);
@@ -1333,7 +1329,7 @@ int cdrom_handle_cmd(ide_config *ide)
case 0xA1: // identify packet
//print_regs(&ide->regs);
dbg_printf("identify packet\n");
ide_send_data(ide->drive[ide->regs.drv].id, 128);
ide_send_data(ide->drive[ide->regs.drv].id, 256);
drv = ide->regs.drv;
memset(&ide->regs, 0, sizeof(ide->regs));
ide->regs.drv = drv;

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@@ -59,7 +59,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "recent.h"
#include "support.h"
#include "bootcore.h"
#include "support/x86/x86_ide.h"
#include "ide.h"
/*menu states*/
enum MENU

View File

@@ -11,13 +11,11 @@
void lba_to_hunkinfo(chd_file *chd_f, int lba, int *hunknumber, int *hunkoffset)
{
const chd_header *chd_header = chd_get_header(chd_f);
int sectors_per_hunk = chd_header->hunkbytes / chd_header->unitbytes;
*hunknumber = lba / sectors_per_hunk;
*hunkoffset = lba % sectors_per_hunk;
return;
const chd_header *chd_header = chd_get_header(chd_f);
int sectors_per_hunk = chd_header->hunkbytes / chd_header->unitbytes;
*hunknumber = lba / sectors_per_hunk;
*hunkoffset = lba % sectors_per_hunk;
return;
}
@@ -40,7 +38,7 @@ chd_error mister_load_chd(const char *filename, toc_t *cd_toc)
return err;
}
//TODO: deal with non v5 chd versions
//TODO: deal with non v5 chd versions
const chd_header *chd_header = chd_get_header(cd_toc->chd_f);
if (!chd_header)
{
@@ -50,14 +48,14 @@ chd_error mister_load_chd(const char *filename, toc_t *cd_toc)
mister_chd_log("hunkbytes %d unitbytes %d logical length %llu\n", chd_header->hunkbytes, chd_header->unitbytes, chd_header->logicalbytes);
//Load track info
int sector_cnt = 0;
for(cd_toc->last = 0; cd_toc->last < 99; cd_toc->last++)
{
char tmp[512];
int track_id = 0, frames = 0, pregap = 0, postgap = 0;
char track_type[64], subtype[32], pgtype[32], pgsub[32];
if(chd_get_metadata(cd_toc->chd_f, CDROM_TRACK_METADATA2_TAG, cd_toc->last, tmp, sizeof(tmp), NULL, NULL, NULL) == CHDERR_NONE)
{
if (sscanf(tmp, CDROM_TRACK_METADATA2_FORMAT, &track_id, track_type, subtype, &frames, &pregap, pgtype, pgsub, &postgap) != 8) break ;
@@ -65,7 +63,7 @@ chd_error mister_load_chd(const char *filename, toc_t *cd_toc)
if (sscanf(tmp, CDROM_TRACK_METADATA_FORMAT, &track_id, track_type, subtype, &frames) != 4) break;
} else {
//No more tracks
break;
break;
}
bool pregap_valid = true;
@@ -88,7 +86,7 @@ chd_error mister_load_chd(const char *filename, toc_t *cd_toc)
cd_toc->tracks[cd_toc->last].start += pregap;
}
} else {
} else {
if (pregap_valid)
{
cd_toc->tracks[cd_toc->last].start = pregap;
@@ -133,7 +131,7 @@ chd_error mister_load_chd(const char *filename, toc_t *cd_toc)
sector_cnt += ((frames + CD_TRACK_PADDING - 1) / CD_TRACK_PADDING) * CD_TRACK_PADDING;
mister_chd_log("Track %d: Type: %s PreGap: %d PreGapType: %s Frames: %d start: %d end %d\n", cd_toc->last, track_type, pregap, pgtype, frames, cd_toc->tracks[cd_toc->last].start, cd_toc->tracks[cd_toc->last].end);
}
}
return CHDERR_NONE;
}

View File

@@ -12,12 +12,12 @@
#include "../../user_io.h"
#include "../../input.h"
#include "../../cfg.h"
#include "../../ide.h"
#include "minimig_boot.h"
#include "minimig_fdd.h"
#include "minimig_hdd.h"
#include "minimig_config.h"
#include "minimig_share.h"
#include "../x86/x86_ide.h"
const char *config_memory_chip_msg[] = { "512K", "1M", "1.5M", "2M" };
const char *config_memory_slow_msg[] = { "none", "512K", "1M", "1.5M" };

View File

@@ -27,12 +27,12 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include <string.h>
#include "../../hardware.h"
#include "../../file_io.h"
#include "minimig_hdd.h"
#include "../../menu.h"
#include "minimig_config.h"
#include "../../debug.h"
#include "../../user_io.h"
#include "../x86/x86_ide.h"
#include "../../ide.h"
#include "minimig_hdd.h"
#include "minimig_config.h"
#define CMD_IDECMD 0x04
#define CMD_IDEDAT 0x08
@@ -762,7 +762,7 @@ uint8_t OpenHardfile(uint8_t unit, const char* filename)
}
if (!present && vhd) present = ide_img_mount(&hdf->file, minimig_config.hardfile[unit].filename, 1);
ide_set(unit, (unit & 2) ? 0xF100 : 0xF000, present ? &hdf->file : 0, 3, cd, hdf->sectors, hdf->heads);
ide_img_set(unit, present ? &hdf->file : 0, cd, hdf->sectors, hdf->heads);
if (present) return 1;
}
else
@@ -794,7 +794,7 @@ uint8_t OpenHardfile(uint8_t unit, const char* filename)
}
// close if opened earlier.
if (is_minimig() && (ide_check() & 0x8000)) ide_set(unit, (unit & 2) ? 0xF100 : 0xF000, 0, 3, 0);
if (is_minimig() && (ide_check() & 0x8000)) ide_img_set(unit, 0, 0);
FileClose(&hdf->file);
return 0;
}

View File

@@ -37,41 +37,19 @@
#include "../../file_io.h"
#include "../../fpga_io.h"
#include "../../shmem.h"
#include "../../ide.h"
#include "x86_share.h"
#include "x86_ide.h"
#include "x86_cdrom.h"
#define FLOPPY0_BASE_OLD 0x8800
#define HDD0_BASE_OLD 0x8840
#define FLOPPY1_BASE_OLD 0x9800
#define HDD1_BASE_OLD 0x9840
#define PC_BUS_BASE_OLD 0x88a0
#define SOUND_BASE_OLD 0x9000
#define PIT_BASE_OLD 0x8880
#define VGA_BASE_OLD 0x8900
#define RTC_BASE_OLD 0x8c00
#define SD_BASE_OLD 0x0A00
#define FDD0_BASE 0xF200
#define FDD1_BASE 0xF300
#define RTC_BASE 0xF400
#define IMG_TYPE_FDD0_OLD 0x0800
#define IMG_TYPE_FDD1_OLD 0x1800
#define IMG_TYPE_HDD0_OLD 0x0000
#define IMG_TYPE_HDD1_OLD 0x1000
#define CFG_VER 3
#define HDD0_BASE_NEW 0xF000
#define HDD1_BASE_NEW 0xF100
#define FDD0_BASE_NEW 0xF200
#define FDD1_BASE_NEW 0xF300
#define RTC_BASE_NEW 0xF400
#define SHMEM_ADDR 0x30000000
#define BIOS_SIZE 0x10000
#define CFG_VER 3
#define SHMEM_ADDR 0x30000000
#define BIOS_SIZE 0x10000
static int newcore = 0;
static int v3 = 0;
#define IOWR(base, reg, value) x86_dma_set((base) + (newcore ? (reg) : ((reg)<<2)), value)
#define IOWR(base, reg, value) x86_dma_set((base) + (reg), value)
typedef struct
{
@@ -81,20 +59,6 @@ typedef struct
static x86_config config;
static uint32_t old_cpu_clock = 0;
static uint32_t cpu_get_clock()
{
uint32_t clock;
EnableIO();
spi8(UIO_DMA_WRITE);
clock = spi_w(0);
clock = (spi_w(0) << 16) | clock;
DisableIO();
return clock ? clock : 90500000;
}
/*
static uint32_t dma_get(uint32_t address)
{
@@ -107,56 +71,50 @@ static uint32_t dma_get(uint32_t address)
}
*/
void x86_dma_set(uint32_t address, uint32_t data)
static void x86_dma_set(uint32_t address, uint32_t data)
{
EnableIO();
spi8(UIO_DMA_WRITE);
spi32_w(address);
if (v3) spi_w((uint16_t)data); else spi32_w(data);
spi_w((uint16_t)data);
DisableIO();
}
void x86_dma_sendbuf(uint32_t address, uint32_t length, uint32_t *data)
static void x86_dma_sendbuf(uint32_t address, uint32_t length, uint32_t *data)
{
EnableIO();
fpga_spi_fast(UIO_DMA_WRITE);
fpga_spi_fast(address);
fpga_spi_fast(0);
if (newcore)
if(address < FDD0_BASE) fpga_spi_fast_block_write((uint16_t*)data, length * 2);
else
{
if(address < FDD0_BASE_NEW) fpga_spi_fast_block_write((uint16_t*)data, length * 2);
else
{
uint8_t *buf = (uint8_t*)data;
length *= 4;
while (length--) if (v3) spi_w(*buf++); else spi32_w(*buf++);
}
uint8_t *buf = (uint8_t*)data;
length *= 4;
while (length--) spi_w(*buf++);
}
else while (length--) spi32_w(*data++);
DisableIO();
}
void x86_dma_recvbuf(uint32_t address, uint32_t length, uint32_t *data)
static void x86_dma_recvbuf(uint32_t address, uint32_t length, uint32_t *data)
{
EnableIO();
fpga_spi_fast(UIO_DMA_READ);
fpga_spi_fast(address);
fpga_spi_fast(0);
if (newcore)
if (address < FDD0_BASE) fpga_spi_fast_block_read((uint16_t*)data, length * 2);
else if (address == FDD0_BASE)
{
if (address < FDD0_BASE_NEW || (!v3 && address == FDD0_BASE_NEW)) fpga_spi_fast_block_read((uint16_t*)data, length * 2);
else if (v3 && address == FDD0_BASE_NEW)
{
while (length--) *data++ = spi_w(0);
}
else
{
uint8_t *buf = (uint8_t*)data;
length *= 4;
while (length--) *buf++ = v3 ? spi_w(0) : spi32_w(0);
}
while (length--) *data++ = spi_w(0);
}
else
{
uint8_t *buf = (uint8_t*)data;
length *= 4;
while (length--) *buf++ = spi_w(0);
}
else while (length--) *data++ = spi32_w(0);
DisableIO();
}
@@ -225,63 +183,10 @@ static uint32_t img_write(fileTYPE *f, uint32_t lba, void *buf, uint32_t cnt)
return FileWriteAdv(f, buf, cnt * 512);
}
static int floppy_wait_cycles;
static void set_clock()
{
uint32_t cpu_clock = cpu_get_clock();
old_cpu_clock = cpu_clock;
IOWR(FLOPPY0_BASE_OLD, 0x7, (int)(floppy_wait_cycles / (1000000000.0 / cpu_clock)));
IOWR(FLOPPY0_BASE_OLD, 0x8, (int)(1000000.0 / (1000000000.0 / cpu_clock)));
IOWR(FLOPPY0_BASE_OLD, 0x9, (int)(1666666.0 / (1000000000.0 / cpu_clock)));
IOWR(FLOPPY0_BASE_OLD, 0xA, (int)(2000000.0 / (1000000000.0 / cpu_clock)));
IOWR(FLOPPY0_BASE_OLD, 0xB, (int)(500000.0 / (1000000000.0 / cpu_clock)));
IOWR(VGA_BASE_OLD, 0, cpu_clock);
//-------------------------------------------------------------------------- sound
/*
0-255.[15:0]: cycles in period
256.[12:0]: cycles in 80us
257.[9:0]: cycles in 1 sample: 96000 Hz
*/
double cycle_in_ns = (1000000000.0 / cpu_clock); //33.333333;
for (int i = 0; i < 256; i++)
{
double f = 1000000.0 / (256.0 - i);
double cycles_in_period = 1000000000.0 / (f * cycle_in_ns);
IOWR(SOUND_BASE_OLD, i, (int)cycles_in_period);
}
IOWR(SOUND_BASE_OLD, 256, (int)(80000.0 / (1000000000.0 / cpu_clock)));
IOWR(SOUND_BASE_OLD, 257, (int)((1000000000.0 / 96000.0) / (1000000000.0 / cpu_clock)));
//-------------------------------------------------------------------------- pit
/*
0.[7:0]: cycles in sysclock 1193181 Hz
*/
IOWR(PIT_BASE_OLD, 0, (int)((1000000000.0 / 1193181.0) / (1000000000.0 / cpu_clock)));
/*
128.[26:0]: cycles in second
129.[12:0]: cycles in 122.07031 us
*/
IOWR(RTC_BASE_OLD, 128, (int)(1000000000.0 / (1000000000.0 / cpu_clock)));
IOWR(RTC_BASE_OLD, 129, (int)(122070.0 / (1000000000.0 / cpu_clock)));
}
static void fdd_set(int num, char* filename)
{
if (!newcore && num) return;
floppy_type[num] = FDD_TYPE_1440;
uint32_t base = newcore ? FDD0_BASE_NEW : FLOPPY0_BASE_OLD;
fileTYPE *fdd_image = num ? &fdd1_image : &fdd0_image;
int floppy = ide_img_mount(fdd_image, filename, 1);
@@ -344,7 +249,6 @@ static void fdd_set(int num, char* filename)
}
int floppy_total_sectors = floppy_spt * floppy_heads * floppy_cylinders;
floppy_wait_cycles = 200000000 / floppy_spt;
printf("floppy:\n");
printf(" cylinders: %d\n", floppy_cylinders);
@@ -353,22 +257,19 @@ static void fdd_set(int num, char* filename)
printf(" total_sectors: %d\n\n", floppy_total_sectors);
uint32_t subaddr = num << 7;
IOWR(base + subaddr, 0x0, floppy ? 1 : 0);
IOWR(base + subaddr, 0x1, (floppy && (fdd_image->mode & O_RDWR)) ? 0 : 1);
IOWR(base + subaddr, 0x2, floppy_cylinders);
IOWR(base + subaddr, 0x3, floppy_spt);
IOWR(base + subaddr, 0x4, floppy_total_sectors);
IOWR(base + subaddr, 0x5, floppy_heads);
IOWR(base + subaddr, 0x6, 0); // base LBA
IOWR(base + subaddr, 0xC, 0);
if(!newcore) set_clock();
IOWR(FDD0_BASE + subaddr, 0x0, floppy ? 1 : 0);
IOWR(FDD0_BASE + subaddr, 0x1, (floppy && (fdd_image->mode & O_RDWR)) ? 0 : 1);
IOWR(FDD0_BASE + subaddr, 0x2, floppy_cylinders);
IOWR(FDD0_BASE + subaddr, 0x3, floppy_spt);
IOWR(FDD0_BASE + subaddr, 0x4, floppy_total_sectors);
IOWR(FDD0_BASE + subaddr, 0x5, floppy_heads);
IOWR(FDD0_BASE + subaddr, 0x6, 0); // base LBA
IOWR(FDD0_BASE + subaddr, 0xC, 0);
}
static void hdd_set(int num, char* filename)
{
if (!v3 && num > 1) return;
uint32_t base = newcore ? ((num & (v3 ? 2 : 1)) ? HDD1_BASE_NEW : HDD0_BASE_NEW) : (num ? HDD1_BASE_OLD : HDD0_BASE_OLD);
if (num > 1) return;
int present = 0;
int cd = 0;
@@ -384,7 +285,7 @@ static void hdd_set(int num, char* filename)
}
if(!present && vhd) present = ide_img_mount(&ide_image[num], filename, 1);
ide_set(num, base, present ? &ide_image[num] : 0, v3 ? 3 : newcore ? 2 : 0, cd);
ide_img_set(num, present ? &ide_image[num] : 0, cd);
}
static uint8_t bin2bcd(unsigned val)
@@ -392,13 +293,6 @@ static uint8_t bin2bcd(unsigned val)
return ((val / 10) << 4) + (val % 10);
}
static void check_ver()
{
uint16_t flg = ide_check();
newcore = ((flg & 0xC000) == 0xC000);
v3 = ((flg & 0xF000) == 0xE000);
}
void x86_init()
{
user_io_8bit_set_status(UIO_STATUS_RESET, UIO_STATUS_RESET);
@@ -408,14 +302,6 @@ void x86_init()
load_bios(user_io_make_filepath(home, "boot0.rom"), 0);
load_bios(user_io_make_filepath(home, "boot1.rom"), 1);
check_ver();
if (!newcore)
{
IOWR(PC_BUS_BASE_OLD, 0, 0x00FFF0EA);
IOWR(PC_BUS_BASE_OLD, 1, 0x000000F0);
}
uint8_t cfg = ide_check();
uint8_t hotswap[4] = {
0,
@@ -457,7 +343,7 @@ void x86_init()
0x00, //0x0E: REG E - POST status
0x00, //0x0F: REG F - shutdown status
(uint8_t)((get_fdd_bios_type(floppy_type[0])<<4) | (newcore ? get_fdd_bios_type(floppy_type[1]) : 0)),
(uint8_t)((get_fdd_bios_type(floppy_type[0])<<4) | get_fdd_bios_type(floppy_type[1])),
0x00, //0x11: configuration bits; not used
0x00, //0x12: hard disk types; 0-none, 1:E-type, F-type 16+ (unused)
0x00, //0x13: advanced configuration bits; not used
@@ -530,14 +416,16 @@ void x86_init()
cmos[0x2E] = sum >> 8;
cmos[0x2F] = sum & 0xFF;
for (unsigned int i = 0; i < sizeof(cmos) / sizeof(cmos[0]); i++) IOWR(newcore ? RTC_BASE_NEW : RTC_BASE_OLD, i, cmos[i]);
for (unsigned int i = 0; i < sizeof(cmos) / sizeof(cmos[0]); i++) IOWR(RTC_BASE, i, cmos[i]);
x86_share_reset();
user_io_8bit_set_status(0, UIO_STATUS_RESET);
}
static void img_io(fileTYPE *img, uint32_t basereg, uint8_t read, int sz)
static void fdd_io(uint8_t read)
{
fileTYPE *img = &fdd0_image;
struct sd_param_t
{
uint32_t lba;
@@ -547,9 +435,9 @@ static void img_io(fileTYPE *img, uint32_t basereg, uint8_t read, int sz)
static struct sd_param_t sd_params = {};
static uint32_t secbuf[128 * 16];
x86_dma_recvbuf(basereg, sizeof(sd_params) >> 2, (uint32_t*)&sd_params);
x86_dma_recvbuf(FDD0_BASE, sizeof(sd_params) >> 2, (uint32_t*)&sd_params);
if (sz == 1 && (sd_params.lba >> 15))
if (sd_params.lba >> 15)
{
// Floppy B:
sd_params.lba &= 0x7FFF;
@@ -563,9 +451,9 @@ static void img_io(fileTYPE *img, uint32_t basereg, uint8_t read, int sz)
if (img->size)
{
if (img_read(img, sd_params.lba, &secbuf, sz))
if (img_read(img, sd_params.lba, &secbuf, 1))
{
x86_dma_sendbuf(basereg + 255, sz * 128, secbuf);
x86_dma_sendbuf(FDD0_BASE + 255, 128, secbuf);
res = 1;
}
}
@@ -576,15 +464,15 @@ static void img_io(fileTYPE *img, uint32_t basereg, uint8_t read, int sz)
if (!res)
{
memset(secbuf, 0, sz * 512);
x86_dma_sendbuf(basereg + 255, sz * 128, secbuf);
memset(secbuf, 0, 512);
x86_dma_sendbuf(FDD0_BASE + 255, 128, secbuf);
}
}
else
{
//printf("Write: 0x%08x, 0x%08x, %d\n", basereg, sd_params.lba, sd_params.cnt);
x86_dma_recvbuf(basereg + 255, sd_params.cnt * 128, secbuf);
x86_dma_recvbuf(FDD0_BASE + 255, sd_params.cnt * 128, secbuf);
if (img->size)
{
if (sd_params.cnt > 0 && sd_params.cnt <= 16)
@@ -613,127 +501,19 @@ static void img_io(fileTYPE *img, uint32_t basereg, uint8_t read, int sz)
}
}
void img_io_old(uint8_t sd_req)
{
struct sd_param_t
{
uint32_t addr;
uint32_t lba;
uint32_t bl_cnt;
};
static struct sd_param_t sd_params = {};
static uint32_t secbuf[128 * 4];
x86_dma_recvbuf(SD_BASE_OLD + (4 << 2), sizeof(sd_params) >> 2, (uint32_t*)&sd_params);
fileTYPE *img;
switch (sd_params.addr)
{
case IMG_TYPE_HDD0_OLD:
//printf("HDD0 req\n");
img = &ide_image[0];
break;
case IMG_TYPE_HDD1_OLD:
//printf("HDD1 req\n");
img = &ide_image[1];
break;
default:
//printf("FDD req\n");
img = &fdd0_image;
break;
}
int res = 0;
if (sd_req == 1)
{
//printf("Read(old): 0x%08x, 0x%08x, %d\n", sd_params.addr, sd_params.lba, sd_params.bl_cnt);
if (img->size)
{
if (sd_params.bl_cnt > 0 && sd_params.bl_cnt <= 4)
{
if (img_read(img, sd_params.lba, secbuf, sd_params.bl_cnt))
{
x86_dma_sendbuf(sd_params.addr, sd_params.bl_cnt * 128, secbuf);
res = 1;
}
}
else
{
printf("Error: Block count %d is out of range 1..4.\n", sd_params.bl_cnt);
}
}
else
{
printf("Error: image is not ready.\n");
}
ide_check(res ? 1 : 2);
}
else if (sd_req == 2)
{
//printf("Write(old): 0x%08x, 0x%08x, %d\n", sd_params.addr, sd_params.lba, sd_params.bl_cnt);
if (img->size)
{
if (sd_params.bl_cnt > 0 && sd_params.bl_cnt <= 4)
{
if (img->mode & O_RDWR)
{
x86_dma_recvbuf(sd_params.addr, sd_params.bl_cnt * 128, secbuf);
if (img_write(img, sd_params.lba, secbuf, sd_params.bl_cnt))
{
res = 1;
}
}
else
{
printf("Error: image is read-only.\n");
}
}
else
{
printf("Error: Block count %d is out of range 1..4.\n", sd_params.bl_cnt);
}
}
else
{
printf("Error: image is not ready.\n");
}
ide_check(res ? 1 : 2);
}
}
void x86_poll()
{
if (!newcore)
{
uint32_t cpu_clock = cpu_get_clock();
if (cpu_clock != old_cpu_clock) set_clock();
}
x86_share_poll();
uint16_t sd_req = ide_check();
if (sd_req)
{
if (sd_req & 0x8000)
{
if (v3) ide_io(0, sd_req & 7);
else if (sd_req & 3) img_io(&ide_image[0], HDD0_BASE_NEW, sd_req & 1, 16);
ide_io(0, sd_req & 7);
sd_req >>= 3;
ide_io(1, sd_req & 7);
sd_req >>= 3;
if (v3) ide_io(1, sd_req & 7);
else if (sd_req & 3) img_io(&ide_image[1], HDD1_BASE_NEW, sd_req & 1, 16);
sd_req >>= 3;
if (sd_req & 3) img_io(&fdd0_image, FDD0_BASE_NEW, sd_req & 1, 1);
}
else
{
img_io_old((uint8_t)sd_req);
}
sd_req >>= 3;
if (sd_req & 3) fdd_io(sd_req & 1);
}
}
@@ -742,7 +522,7 @@ void x86_set_image(int num, char *filename)
memset(config.img_name[num], 0, sizeof(config.img_name[0]));
strcpy(config.img_name[num], filename);
if (num < 2) fdd_set(num, filename);
else if (v3 && ide_is_placeholder(num - 2)) hdd_set(num - 2, filename);
else if (ide_is_placeholder(num - 2)) hdd_set(num - 2, filename);
}
void x86_config_save()
@@ -753,8 +533,6 @@ void x86_config_save()
void x86_config_load()
{
check_ver();
static x86_config tmp;
memset(&config, 0, sizeof(config));
if (FileLoadConfig("ao486sys.cfg", &tmp, sizeof(tmp)) && (tmp.ver == CFG_VER))

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@@ -12,8 +12,4 @@ void x86_config_load();
void x86_config_save();
void x86_set_fdd_boot(uint32_t boot);
void x86_dma_set(uint32_t address, uint32_t data);
void x86_dma_sendbuf(uint32_t address, uint32_t length, uint32_t *data);
void x86_dma_recvbuf(uint32_t address, uint32_t length, uint32_t *data);
#endif

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@@ -33,9 +33,9 @@
#include "video.h"
#include "audio.h"
#include "shmem.h"
#include "ide.h"
#include "support.h"
#include "support/x86/x86_ide.h"
static char core_path[1024] = {};
static char rbf_path[1024] = {};