scheduler option.

This commit is contained in:
sorgelig
2019-11-26 12:41:14 +08:00
parent c7785fa2f0
commit 77c177bb97
3 changed files with 26 additions and 1 deletions

View File

@@ -883,10 +883,13 @@ struct DirentComp
{
bool operator()(const direntext_t& de1, const direntext_t& de2)
{
#ifdef USE_SCHEDULER
if (++iterations % YieldIterations == 0)
{
scheduler_yield();
}
#endif
if ((de1.de.d_type == DT_DIR) && !strcmp(de1.altname, "..")) return true;
if ((de2.de.d_type == DT_DIR) && !strcmp(de2.altname, "..")) return false;
@@ -1035,11 +1038,12 @@ int ScanDirectory(char* path, int mode, const char *extension, int options, cons
for (size_t i = 0; (d && (de = readdir(d)))
|| (z && i < mz_zip_reader_get_num_files(z)); i++)
{
#ifdef USE_SCHEDULER
if (0 < i && i % YieldIterations == 0)
{
scheduler_yield();
}
#endif
struct dirent _de = {};
if (z) {
mz_zip_reader_get_filename(z, i, &_de.d_name[0], sizeof(_de.d_name));

View File

@@ -67,8 +67,27 @@ int main(int argc, char *argv[])
FindStorage();
user_io_init((argc > 1) ? argv[1] : "");
#ifdef USE_SCHEDULER
scheduler_init();
scheduler_run();
#else
while (1)
{
if (!is_fpga_ready(1))
{
printf("FPGA is not ready. JTAG uploading?\n");
printf("Waiting for FPGA to be ready...\n");
//enable reset in advance
fpga_core_reset(1);
while (!is_fpga_ready(0)) sleep(1);
reboot(0);
}
user_io_poll();
input_poll(0);
HandleUI();
}
#endif
return 0;
}

View File

@@ -1,6 +1,8 @@
#ifndef SCHEDULER_H
#define SCHEDULER_H
#define USE_SCHEDULER
void scheduler_init(void);
void scheduler_run(void);
void scheduler_yield(void);