From e7bdf5b6fae90e7de8247682a05bf79a82c2e8f8 Mon Sep 17 00:00:00 2001
From: sorgelig <pour.garbage@gmail.com>
Date: Thu, 12 Jul 2018 04:30:57 +0800
Subject: [PATCH] T80: fix INIR/INDR timings.

---
 t80/T80_MCode.vhd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/t80/T80_MCode.vhd b/t80/T80_MCode.vhd
index 2eaf211..ff1f4dc 100644
--- a/t80/T80_MCode.vhd
+++ b/t80/T80_MCode.vhd
@@ -1901,6 +1901,7 @@ begin
 				MCycles <= "100";
 				case to_integer(unsigned(MCycle)) is
 				when 1 =>
+					TStates <= "101";
 					Set_Addr_To <= aBC;
 					Set_BusB_To <= "1010";
 					Set_BusA_To <= "0000";
@@ -1917,7 +1918,6 @@ begin
 					else
 						IncDec_16 <= "1110";
 					end if;
-					TStates <= "100";
 					Write <= '1';
 					I_BTR <= '1';
 				when 4 =>