mister-devel/ZX-Spectrum_MISTer
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Integrate ROM into core. Use names for joystick buttons.

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This commit is contained in:
sorgelig
2017-07-03 01:07:14 +08:00
parent 6704221cae
commit 47e1e5b202
5 changed files with 4134 additions and 12 deletions
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4120
bios.mif Normal file
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rom/spectrum.rom
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rom/spectrum.rom_test
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8
sys/hps_io.v
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@@ -36,8 +36,8 @@ module hps_io #(parameter STRLEN=0, PS2DIV=1000, WIDE=0) // WIDE=1 for 16 bit fi
// parameter STRLEN and the actual length of conf_str have to match
input [(8*STRLEN)-1:0] conf_str,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [15:0] joystick_0,
output reg [15:0] joystick_1,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
@@ -147,8 +147,8 @@ always@(posedge clk_sys) begin
case(cmd)
// buttons and switches
'h01: cfg <= io_din[7:0];
'h02: joystick_0 <= io_din[7:0];
'h03: joystick_1 <= io_din[7:0];
'h02: joystick_0 <= io_din;
'h03: joystick_1 <= io_din;
// store incoming ps2 mouse bytes
'h04: begin

18
zxspectrum.sv
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@@ -120,7 +120,8 @@ localparam CONF_STR = {
"-;",
"OAB,Memory,Spectrum 128K,Pentagon 256K,Scorpion 256K,Spectrum 48K;",
"ODE,Features,ULA+ & Timex,ULA+,Timex,None;",
"V,v3.60.",`BUILD_DATE
"J,Fire 1,Fire 2;",
"V,v3.61.",`BUILD_DATE
};
@@ -214,8 +215,8 @@ wire ps2_kbd_data;
wire ps2_mouse_clk;
wire ps2_mouse_data;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire [15:0] joystick_0;
wire [15:0] joystick_1;
wire [1:0] buttons;
wire forced_scandoubler;
wire [31:0] status;
@@ -324,9 +325,9 @@ end
reg init_reset = 1;
always @(posedge clk_sys) begin
reg old_download;
old_download <= ioctl_download;
if(old_download & ~ioctl_download) init_reset <= 0;
reg old_rst = 0;
old_rst <= status[0];
if(old_rst & ~status[0]) init_reset <= 0;
end
reg NMI;
@@ -390,7 +391,7 @@ always @(posedge clk_sys) begin
rom_stb <= (~old_we && extmem_we);
end
dpram #(8,17,98304) rom
dpram #(8,17,98304,"bios.mif") rom
(
.clock(clk_sys),
@@ -790,7 +791,7 @@ ddram tape_buff
endmodule
module dpram #(parameter DATAWIDTH=8, ADDRWIDTH=8, NUMWORDS=1<<ADDRWIDTH)
module dpram #(parameter DATAWIDTH=8, ADDRWIDTH=8, NUMWORDS=1<<ADDRWIDTH, INITFILE="")
(
input clock,
@@ -842,6 +843,7 @@ defparam
altsyncram_component.width_byteena_a = 1,
altsyncram_component.width_byteena_b = 1,
altsyncram_component.init_file = INITFILE,
altsyncram_component.clock_enable_input_a = "BYPASS",
altsyncram_component.clock_enable_input_b = "BYPASS",
altsyncram_component.clock_enable_output_a = "BYPASS",