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https://github.com/MiSTer-devel/Vectrex_MiSTer.git
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55ad7b2036
* First Set of Overlay Code * fixed rom load bug * added color to overlay * added borders * added borders * some status fixes * added more overlays and fixed script * fixes * fixed md * new sys * fixed md * new sys * change aspect ratio
18 lines
987 B
Plaintext
18 lines
987 B
Plaintext
set_global_assignment -name VHDL_FILE rtl/bios_rom.vhd
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set_global_assignment -name VHDL_FILE rtl/gen_rom.vhd
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set_global_assignment -name VHDL_FILE rtl/gen_dpram.vhd
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set_global_assignment -name VHDL_FILE rtl/gen_ram.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/compressor.sv
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set_global_assignment -name VHDL_FILE rtl/sp0256.vhd
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set_global_assignment -name VHDL_FILE rtl/sp0256_al2_decoded.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/ym2149.sv
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
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set_global_assignment -name VHDL_FILE rtl/m6522a.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu09l_128a.vhd
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set_global_assignment -name VERILOG_FILE rtl/mc6809is.v
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set_global_assignment -name VERILOG_FILE rtl/mc6809.v
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set_global_assignment -name VHDL_FILE rtl/vectrex.vhd
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set_global_assignment -name SDC_FILE Vectrex.sdc
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/alphablend.sv
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set_global_assignment -name SYSTEMVERILOG_FILE Vectrex.sv
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