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adjust video timing to be as close as possible to original VT52 when using VT52 font add bitmaps of fonts update readme.md update the python script that generates the font bit map to be more flexible
127 lines
4.5 KiB
Verilog
127 lines
4.5 KiB
Verilog
/* ================================================================
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* VT52
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*
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* Copyright (C) 2024 Fred Van Eijk
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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* ================================================================
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*/
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module char_buffer #(
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parameter ADDR_BITS = 11,
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parameter COLS = 80,
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parameter ROWS = 25, // One extra row for scroll buffer
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parameter INIT_FILE = "mem/empty.hex"
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) (
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input wire clk,
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input wire reset,
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input wire [7:0] din,
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input wire [ADDR_BITS-1:0] waddr,
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input wire wen,
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input wire scroll,
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input wire vblank,
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input wire [ADDR_BITS-1:0] raddr,
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output reg [7:0] dout,
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output reg scroll_busy,
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output reg scroll_done,
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input wire font_8x8
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);
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reg [7:0] mem [(ROWS*COLS)-1:0];
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reg [ADDR_BITS-1:0] scroll_addr;
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reg scrolling;
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reg scroll_pending;
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integer i;
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initial begin
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for (i = 0; i < ROWS*COLS; i = i + 1) begin
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mem[i] = 8'h20; // Initialize all to space
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end
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$readmemh(INIT_FILE, mem);
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end
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always @(posedge clk) begin
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if (reset) begin
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for (i = 0; i < ROWS*COLS; i = i + 1) begin
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mem[i] = 8'h20; // Initialize all to space
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end
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$readmemh(INIT_FILE, mem);
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scrolling <= 0;
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scroll_busy <= 0;
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scroll_done <= 0;
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scroll_addr <= 0;
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scroll_pending <= 0;
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end
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else begin
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scroll_done <= 0; // Single cycle pulse
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// Handle new scroll requests
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if (scroll && !scrolling && !scroll_pending) begin
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scroll_pending <= 1; // Queue the scroll operation
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scroll_busy <= 1; // Indicate we're waiting to scroll
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end
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// Start scroll operation on vblank rising edge if there's a pending scroll
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if (vblank && scroll_pending && !scrolling) begin
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scrolling <= 1;
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scroll_addr <= 0;
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scroll_pending <= 0; // Clear pending flag
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end
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// Perform scroll operation
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if (scrolling) begin
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if (scroll_addr < (ROWS-1)*COLS) begin
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mem[scroll_addr] <= mem[scroll_addr + COLS];
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scroll_addr <= scroll_addr + 1;
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end
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else begin
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mem[scroll_addr] <= 8'h20; // Clear current position
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if (scroll_addr < (ROWS*COLS - 1)) begin
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scroll_addr <= scroll_addr + 1;
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end
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else begin
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scrolling <= 0;
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scroll_busy <= 0;
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scroll_done <= 1;
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end
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end
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end
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else begin
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// Normal write operation with character validation
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if (wen && (waddr < ROWS*COLS)) begin
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// Validate character based on font mode
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if (!font_8x8 || !din[7]) begin // 8-bit for 8x16, 7-bit for 8x8
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mem[waddr] <= din;
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end
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else begin
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mem[waddr] <= 8'h20; // Write space for invalid characters
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end
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end
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end
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// Read operation
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dout <= (raddr < ROWS*COLS) ? mem[raddr] : 8'h20;
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end
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end
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endmodule |